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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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Declarations
gen/lib/Target/AArch64/AArch64GenRegisterInfo.inc 5054 extern const TargetRegisterClass FPR32RegClass;
References
gen/lib/Target/AArch64/AArch64GenFastISel.inc 1029 return fastEmitInst_r(AArch64::FRECPEv1i32, &AArch64::FPR32RegClass, Op0, Op0IsKill);
1079 return fastEmitInst_r(AArch64::FRSQRTEv1i32, &AArch64::FPR32RegClass, Op0, Op0IsKill);
1453 return fastEmitInst_r(AArch64::SCVTFv1i32, &AArch64::FPR32RegClass, Op0, Op0IsKill);
1567 return fastEmitInst_r(AArch64::UCVTFv1i32, &AArch64::FPR32RegClass, Op0, Op0IsKill);
2717 return fastEmitInst_r(AArch64::FABSSr, &AArch64::FPR32RegClass, Op0, Op0IsKill);
2805 return fastEmitInst_r(AArch64::FRINTPSr, &AArch64::FPR32RegClass, Op0, Op0IsKill);
2893 return fastEmitInst_r(AArch64::FRINTMSr, &AArch64::FPR32RegClass, Op0, Op0IsKill);
2981 return fastEmitInst_r(AArch64::FRINTISr, &AArch64::FPR32RegClass, Op0, Op0IsKill);
3069 return fastEmitInst_r(AArch64::FNEGSr, &AArch64::FPR32RegClass, Op0, Op0IsKill);
3146 return fastEmitInst_r(AArch64::FCVTSHr, &AArch64::FPR32RegClass, Op0, Op0IsKill);
3217 return fastEmitInst_r(AArch64::FCVTSDr, &AArch64::FPR32RegClass, Op0, Op0IsKill);
3521 return fastEmitInst_r(AArch64::FRINTXSr, &AArch64::FPR32RegClass, Op0, Op0IsKill);
3609 return fastEmitInst_r(AArch64::FRINTASr, &AArch64::FPR32RegClass, Op0, Op0IsKill);
3697 return fastEmitInst_r(AArch64::FSQRTSr, &AArch64::FPR32RegClass, Op0, Op0IsKill);
3785 return fastEmitInst_r(AArch64::FRINTZSr, &AArch64::FPR32RegClass, Op0, Op0IsKill);
3966 return fastEmitInst_r(AArch64::SCVTFUWSri, &AArch64::FPR32RegClass, Op0, Op0IsKill);
3996 return fastEmitInst_r(AArch64::SCVTFUXSri, &AArch64::FPR32RegClass, Op0, Op0IsKill);
4131 return fastEmitInst_r(AArch64::UCVTFUWSri, &AArch64::FPR32RegClass, Op0, Op0IsKill);
4161 return fastEmitInst_r(AArch64::UCVTFUXSri, &AArch64::FPR32RegClass, Op0, Op0IsKill);
4744 return fastEmitInst_rr(AArch64::FCMEQ32, &AArch64::FPR32RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4832 return fastEmitInst_rr(AArch64::FCMGE32, &AArch64::FPR32RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
4920 return fastEmitInst_rr(AArch64::FCMGT32, &AArch64::FPR32RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
5017 return fastEmitInst_rr(AArch64::FCMPSrr, &AArch64::FPR32RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
5045 return fastEmitInst_rr(AArch64::FRECPS32, &AArch64::FPR32RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
5088 return fastEmitInst_rr(AArch64::FRSQRTS32, &AArch64::FPR32RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
6171 return fastEmitInst_rr(AArch64::FADDSrr, &AArch64::FPR32RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
6289 return fastEmitInst_rr(AArch64::FDIVSrr, &AArch64::FPR32RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
6377 return fastEmitInst_rr(AArch64::FMAXSrr, &AArch64::FPR32RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
6472 return fastEmitInst_rr(AArch64::FMAXNMSrr, &AArch64::FPR32RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
6567 return fastEmitInst_rr(AArch64::FMINSrr, &AArch64::FPR32RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
6662 return fastEmitInst_rr(AArch64::FMINNMSrr, &AArch64::FPR32RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
6757 return fastEmitInst_rr(AArch64::FMULSrr, &AArch64::FPR32RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
6845 return fastEmitInst_rr(AArch64::FSUBSrr, &AArch64::FPR32RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
7873 return fastEmitInst_ri(AArch64::CPYi32, &AArch64::FPR32RegClass, Op0, Op0IsKill, imm1);
8196 return fastEmitInst_ri(AArch64::SQSHLUs, &AArch64::FPR32RegClass, Op0, Op0IsKill, imm1);
8234 return fastEmitInst_ri(AArch64::SQSHLs, &AArch64::FPR32RegClass, Op0, Op0IsKill, imm1);
8272 return fastEmitInst_ri(AArch64::UQSHLs, &AArch64::FPR32RegClass, Op0, Op0IsKill, imm1);
gen/lib/Target/AArch64/AArch64GenRegisterInfo.inc 8198 &AArch64::FPR32RegClass,
lib/Target/AArch64/AArch64AsmPrinter.cpp 603 RC = &AArch64::FPR32RegClass;
lib/Target/AArch64/AArch64FastISel.cpp 1887 RC = &AArch64::FPR32RegClass;
2733 RC = &AArch64::FPR32RegClass;
2864 unsigned ResultReg = createResultReg(&AArch64::FPR32RegClass);
3039 RC = &AArch64::FPR32RegClass;
4865 case MVT::f32: RC = &AArch64::FPR32RegClass; break;
lib/Target/AArch64/AArch64ISelLowering.cpp 139 addRegisterClass(MVT::f32, &AArch64::FPR32RegClass);
3214 RC = &AArch64::FPR32RegClass;
5991 return std::make_pair(0U, &AArch64::FPR32RegClass);
lib/Target/AArch64/AArch64InstrInfo.cpp 528 AArch64::FPR32RegClass.hasSubClassEq(RC)) {
636 } else if (MRI.constrainRegClass(DstReg, &AArch64::FPR32RegClass)) {
637 RC = &AArch64::FPR32RegClass;
2676 if (AArch64::FPR32RegClass.contains(DestReg) &&
2677 AArch64::FPR32RegClass.contains(SrcReg)) {
2705 &AArch64::FPR32RegClass);
2707 &AArch64::FPR32RegClass);
2726 &AArch64::FPR32RegClass);
2728 &AArch64::FPR32RegClass);
2749 if (AArch64::FPR32RegClass.contains(DestReg) &&
2756 AArch64::FPR32RegClass.contains(SrcReg)) {
2834 } else if (AArch64::FPR32RegClass.hasSubClassEq(RC))
2965 } else if (AArch64::FPR32RegClass.hasSubClassEq(RC))
3286 } else if (AArch64::FPR32RegClass.contains(SrcReg)) {
3329 FillRC = &AArch64::FPR32RegClass;
4290 RC = &AArch64::FPR32RegClass;
4306 RC = &AArch64::FPR32RegClass;
4317 RC = &AArch64::FPR32RegClass;
4323 RC = &AArch64::FPR32RegClass;
4480 RC = &AArch64::FPR32RegClass;
4496 RC = &AArch64::FPR32RegClass;
4512 RC = &AArch64::FPR32RegClass;
4523 RC = &AArch64::FPR32RegClass;
lib/Target/AArch64/AArch64InstructionSelector.cpp 321 return &AArch64::FPR32RegClass;
357 return &AArch64::FPR32RegClass;
379 if (RC != &AArch64::FPR32RegClass)
724 MRI.createVirtualRegister(&AArch64::FPR32RegClass);
1545 DefSize == 32 ? AArch64::FPR32RegClass : AArch64::FPR64RegClass;
3824 if (RC != &AArch64::FPR32RegClass && RC != &AArch64::FPR64RegClass) {
3891 if (RC != &AArch64::FPR32RegClass && RC != &AArch64::FPR64RegClass) {
3984 SrcReg = MRI.createVirtualRegister(&AArch64::FPR32RegClass);
3993 DstReg = MRI.createVirtualRegister(&AArch64::FPR32RegClass);
lib/Target/AArch64/AArch64PBQPRegAlloc.cpp 37 return AArch64::FPR32RegClass.contains(reg) ||
lib/Target/AArch64/AArch64RegisterInfo.cpp 105 return &AArch64::FPR32RegClass;