|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc 8971 DiagnosticPredicate DP(Operand.isGPR64WithShiftExtend<AArch64::GPR64RegClassID, 16>());
8980 DiagnosticPredicate DP(Operand.isGPR64WithShiftExtend<AArch64::GPR64RegClassID, 32>());
8989 DiagnosticPredicate DP(Operand.isGPR64WithShiftExtend<AArch64::GPR64RegClassID, 64>());
8998 DiagnosticPredicate DP(Operand.isGPR64WithShiftExtend<AArch64::GPR64RegClassID, 8>());
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc14903 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
14905 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
14915 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
14917 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg())) {
14924 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
14926 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
14928 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
14954 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
14966 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg())) {
14973 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
14977 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
15087 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
15089 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
15091 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
15106 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
15119 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
15178 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg())) {
15188 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
15190 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
15200 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
15202 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg())) {
15209 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
15211 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
15213 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
15255 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
15257 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
15259 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
15330 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
15332 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
15334 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
15360 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
15362 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
15364 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
15384 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
15396 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
15408 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
15420 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
15432 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
15444 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
15456 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
15468 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
15712 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
15722 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
15724 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
15760 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
15770 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
15772 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
15798 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
15800 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
15839 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
15851 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
15863 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
15875 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
15911 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
15923 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
15959 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
15971 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
16338 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
16340 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
16342 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
16384 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
16386 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
16388 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
16457 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
16459 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
17001 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
17013 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
17025 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
17037 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
17073 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
17085 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
17121 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
17133 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
17219 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(3).getReg()) &&
19434 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
19460 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
19514 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
19542 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
19556 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
19570 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
19664 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
19690 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
19768 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
19794 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
20046 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
20376 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
20378 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
20665 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
20667 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
20710 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
20712 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
20725 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
20739 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
20757 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
20787 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
20817 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
20847 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
20877 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
20907 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
20937 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
20963 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
20967 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
20980 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
20997 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
21023 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
21027 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
21040 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
21053 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
21057 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
21070 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
21087 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
21117 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
21143 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
21147 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
21160 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
21267 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
21293 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
21371 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
21397 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
21475 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
21501 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
21552 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
21578 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
21591 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
21617 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
21696 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
21722 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
21800 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
21826 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
21929 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
21955 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
21968 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22007 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22034 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22036 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
22038 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
22062 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22064 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
22066 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
22135 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22138 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
22147 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22150 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg())) {
22157 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22159 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
22161 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
22215 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22218 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
22227 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22229 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
22231 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
22455 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
22648 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22651 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg())) {
22672 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22675 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg())) {
22723 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22725 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
22734 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22736 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
22747 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22749 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
22760 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22762 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
22855 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22869 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22883 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22895 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22907 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22909 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
22921 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22923 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
22935 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22947 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22959 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22961 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
22973 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22975 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
23011 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23023 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23035 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23037 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
23049 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23051 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
23087 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23099 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23111 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23113 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
23125 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23127 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
23163 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23175 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23187 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23189 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
23201 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23203 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
23215 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23227 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23239 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23241 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
23253 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23255 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
23291 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23303 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23315 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23317 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
23329 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23331 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
23367 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23379 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23391 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23393 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
23405 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23407 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
24832 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
24834 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
24890 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
24964 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
24966 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
25208 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
25210 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
25227 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
25257 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
25287 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
25317 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
25347 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
25377 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
25407 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
25437 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
25463 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
25467 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
25480 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
25560 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
25677 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
25835 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
25837 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
25847 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
25849 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg())) {
25856 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
25859 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
25868 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
25871 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg())) {
25878 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
25880 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
25882 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
25908 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
25920 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg())) {
25927 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
25931 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
26007 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26010 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
26019 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26022 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg())) {
26029 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26031 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
26033 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
26048 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
26061 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
26119 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26121 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
26130 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26132 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
26143 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26145 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
26156 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26158 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
26171 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26197 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26209 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26247 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26259 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26295 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26307 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26367 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26379 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26439 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26451 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26511 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26523 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26559 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26571 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26631 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26643 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26703 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26715 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc15619 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
15621 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
15631 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
15633 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg())) {
15640 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
15642 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
15644 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
15670 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
15682 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg())) {
15689 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
15693 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
15803 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
15805 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
15807 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
15822 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
15835 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
15894 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg())) {
15904 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
15906 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
15916 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
15918 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg())) {
15925 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
15927 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
15929 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
15971 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
15973 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
15975 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
16046 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
16048 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
16050 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
16076 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
16078 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
16080 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
16100 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
16112 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
16124 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
16136 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
16148 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
16160 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
16172 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
16184 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
16428 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
16438 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
16440 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
16476 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
16486 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
16488 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
16514 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
16516 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
16555 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
16567 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
16579 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
16591 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
16627 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
16639 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
16675 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
16687 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
17054 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
17056 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
17058 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
17100 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
17102 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
17104 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
17173 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
17175 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
17717 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
17729 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
17741 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
17753 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
17789 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
17801 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
17837 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
17849 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
17935 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(3).getReg()) &&
20150 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
20176 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
20230 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
20258 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
20272 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
20286 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
20380 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
20406 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
20484 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
20510 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
20762 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
21092 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
21094 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
21381 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
21383 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
21426 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
21428 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
21441 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
21455 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
21473 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
21503 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
21533 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
21563 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
21593 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
21623 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
21653 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
21679 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
21683 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
21696 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
21713 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
21739 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
21743 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
21756 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
21769 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
21773 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
21786 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
21803 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
21833 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
21859 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
21863 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
21876 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
21983 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
22009 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
22087 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
22113 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
22191 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
22217 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
22268 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22294 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22307 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22333 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22412 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
22438 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
22516 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
22542 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
22645 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22671 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22684 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22723 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22750 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22752 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
22754 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
22778 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22780 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
22782 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
22851 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22854 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
22863 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22866 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg())) {
22873 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22875 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
22877 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
22931 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22934 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
22943 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
22945 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
22947 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
23171 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
23364 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23367 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg())) {
23388 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23391 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg())) {
23439 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23441 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
23450 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23452 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
23463 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23465 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
23476 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23478 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
23571 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23585 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23599 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23611 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23623 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23625 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
23637 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23639 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
23651 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23663 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23675 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23677 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
23689 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23691 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
23727 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23739 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23751 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23753 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
23765 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23767 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
23803 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23815 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23827 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23829 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
23841 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23843 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
23879 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23891 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23903 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23905 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
23917 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23919 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
23931 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23943 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23955 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23957 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
23969 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
23971 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
24007 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
24019 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
24031 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
24033 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
24045 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
24047 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
24083 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
24095 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
24107 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
24109 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
24121 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
24123 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
25548 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
25550 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
25606 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
25680 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
25682 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
25924 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
25926 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
25943 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
25973 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
26003 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
26033 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
26063 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
26093 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
26123 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
26153 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
26179 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26183 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
26196 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26276 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26393 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26551 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
26553 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
26563 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
26565 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg())) {
26572 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26575 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
26584 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26587 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg())) {
26594 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26596 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
26598 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
26624 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
26636 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg())) {
26643 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26647 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
26723 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26726 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
26735 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26738 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg())) {
26745 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26747 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
26749 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
26764 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
26777 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(2).getReg()) &&
26835 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26837 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
26846 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26848 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
26859 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26861 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
26872 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26874 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(1).getReg()) &&
26887 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26913 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26925 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26963 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
26975 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
27011 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
27023 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
27083 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
27095 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
27155 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
27167 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
27227 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
27239 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
27275 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
27287 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
27347 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
27359 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
27419 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
27431 MRI.getRegClass(AArch64::GPR64RegClassID).contains(MI->getOperand(0).getReg()) &&
gen/lib/Target/AArch64/AArch64GenDAGISel.inc99911 /*224850*/ OPC_EmitInteger, MVT::i32, AArch64::GPR64RegClassID,
99918 /*224864*/ OPC_EmitInteger, MVT::i32, AArch64::GPR64RegClassID,
100023 /*225035*/ OPC_EmitInteger, MVT::i32, AArch64::GPR64RegClassID,
100030 /*225049*/ OPC_EmitInteger, MVT::i32, AArch64::GPR64RegClassID,
100126 /*225205*/ OPC_EmitInteger, MVT::i32, AArch64::GPR64RegClassID,
100133 /*225219*/ OPC_EmitInteger, MVT::i32, AArch64::GPR64RegClassID,
100229 /*225375*/ OPC_EmitInteger, MVT::i32, AArch64::GPR64RegClassID,
100236 /*225389*/ OPC_EmitInteger, MVT::i32, AArch64::GPR64RegClassID,
100332 /*225545*/ OPC_EmitInteger, MVT::i32, AArch64::GPR64RegClassID,
100339 /*225559*/ OPC_EmitInteger, MVT::i32, AArch64::GPR64RegClassID,
100435 /*225715*/ OPC_EmitInteger, MVT::i32, AArch64::GPR64RegClassID,
100441 /*225727*/ OPC_EmitInteger, MVT::i32, AArch64::GPR64RegClassID,
100524 /*225856*/ OPC_EmitInteger, MVT::i32, AArch64::GPR64RegClassID,
100614 /*226000*/ OPC_EmitInteger, MVT::i32, AArch64::GPR64RegClassID,
gen/lib/Target/AArch64/AArch64GenGlobalISel.inc 1318 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
1332 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
1353 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
1367 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
1402 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
1403 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
1437 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
1438 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
1472 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
1485 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
1501 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
1514 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
1530 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
1531 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
1559 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
1560 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
1602 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
1603 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
1630 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
1631 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
1644 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
1645 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
1658 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
1659 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
1756 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
1757 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
1758 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
4170 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
4205 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
4240 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
4269 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
4298 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
4299 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
4333 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
4334 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
4368 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
4369 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
4397 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
4398 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
4426 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
4432 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
4433 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
4447 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
4462 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
4475 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
4489 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
4490 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
4514 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
4515 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
4516 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
5231 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
5238 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
5239 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
5253 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
5259 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
5373 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
5374 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
5503 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
5504 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
5505 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
5537 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
5538 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
5539 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
5759 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
5765 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
5779 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
5780 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
5980 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
5998 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
5999 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
6012 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
6013 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
6026 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
6031 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
6033 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
6046 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
6047 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
6052 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
6066 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
6067 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
6068 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
6356 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
6362 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
6376 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
6377 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
6397 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
6415 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
6416 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
6429 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
6430 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
6443 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
6448 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
6450 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
6463 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
6464 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
6469 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
6483 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
6484 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
6485 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
6887 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
6892 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
6907 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
6913 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
6927 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
6932 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
6947 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
6952 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
6967 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
6972 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
6987 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
6988 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
7008 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
7026 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
7027 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
7040 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
7041 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
7054 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
7059 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
7061 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
7074 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
7079 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
7080 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
7094 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
7095 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
7100 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
7114 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
7115 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
7128 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
7129 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
7130 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
9482 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
9493 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
9504 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
9515 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
9526 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
9537 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
9643 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
9653 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
9662 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
9673 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
9682 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
9692 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
10421 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
10432 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
10443 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
10462 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
11315 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
11326 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
11337 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
11356 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
12229 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
12240 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
13779 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
13959 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
13994 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
14012 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
14047 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
14065 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
14359 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
15196 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
15214 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
15232 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
15250 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
15267 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
15284 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
15301 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
15318 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
15335 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
16316 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
16380 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
16440 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
17649 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
17653 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
17654 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR64RegClassID,
17670 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
17674 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
17675 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR64RegClassID,
17691 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
17695 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
17696 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR64RegClassID,
17712 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
17716 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
17717 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR64RegClassID,
17733 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
17737 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
17738 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR64RegClassID,
18073 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
18077 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
18092 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
18096 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
18111 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
18115 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
18130 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
18134 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
18149 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
18153 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
18487 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
18491 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
18506 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
18510 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
18525 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
18529 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
18544 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
18548 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
18563 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
18567 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
18991 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
18995 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
19016 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
19020 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
19041 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
19045 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
19066 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
19070 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
19091 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
19095 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
19525 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
19529 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
19550 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
19554 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
19575 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
19579 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
19600 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
19604 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
19625 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
19629 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
19969 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
19973 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
19988 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
19992 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
20007 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
20011 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
20026 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
20030 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
20045 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
20049 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
20383 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
20387 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
20402 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
20406 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
20421 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
20425 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
20440 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
20444 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
20459 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
20463 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
20797 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
20801 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
20816 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
20820 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
20835 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
20839 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
20854 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
20858 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
20873 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
20877 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
21211 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
21215 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
21230 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
21234 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
21249 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
21253 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
21268 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
21272 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
21287 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
21291 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
21625 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
21629 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
21644 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
21648 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
21663 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
21667 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
21682 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
21686 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
21701 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
21705 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
22039 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
22043 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
22058 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
22062 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
22077 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
22081 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
22096 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
22100 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
22115 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
22119 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
22161 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
22270 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
22302 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
22334 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
22366 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
22398 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
22430 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
22462 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
22494 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
22526 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
22558 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
22590 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
22622 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
22654 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
22686 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
22718 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
22750 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
22782 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
22814 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
22846 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
22878 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
22910 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
22942 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
22974 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
23006 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
28308 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR64RegClassID,
28384 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR64RegClassID,
34251 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
34252 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
34253 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR64RegClassID,
34287 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
34288 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
34289 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR64RegClassID,
34872 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
34876 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR64RegClassID,
34891 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
36057 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
36071 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
36166 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
36262 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
36430 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
36463 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
36496 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
36529 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
36562 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
36595 GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
36673 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
36678 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR64RegClassID,
36743 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
36770 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
36797 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
36824 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
36845 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
36872 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
36899 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
36926 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
36950 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR64RegClassID,
37150 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
37227 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
37585 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
37586 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
37636 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
37731 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
37732 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
37800 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
37895 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
37933 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
37952 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
37977 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
38002 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
38003 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
38025 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
38026 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
38027 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
38173 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
38174 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
38175 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
41051 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
41067 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
41083 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
41099 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
41116 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
41127 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
41138 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
41325 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
41341 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
41357 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
41373 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
41390 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
41401 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
41412 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
41514 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
41538 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
41562 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
41663 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
41805 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
42065 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
43232 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
43301 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
43302 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
43418 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
43435 GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
43467 GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
43490 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
43631 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
43632 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
43661 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
43662 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
gen/lib/Target/AArch64/AArch64GenInstrInfo.inc 6444 static const MCOperandInfo OperandInfo43[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6444 static const MCOperandInfo OperandInfo43[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6444 static const MCOperandInfo OperandInfo43[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6457 static const MCOperandInfo OperandInfo56[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6458 static const MCOperandInfo OperandInfo57[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6458 static const MCOperandInfo OperandInfo57[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6458 static const MCOperandInfo OperandInfo57[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6459 static const MCOperandInfo OperandInfo58[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6460 static const MCOperandInfo OperandInfo59[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6460 static const MCOperandInfo OperandInfo59[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6469 static const MCOperandInfo OperandInfo68[] = { { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6471 static const MCOperandInfo OperandInfo70[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
6471 static const MCOperandInfo OperandInfo70[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
6472 static const MCOperandInfo OperandInfo71[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6478 static const MCOperandInfo OperandInfo77[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6478 static const MCOperandInfo OperandInfo77[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6485 static const MCOperandInfo OperandInfo84[] = { { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6489 static const MCOperandInfo OperandInfo88[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6490 static const MCOperandInfo OperandInfo89[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6494 static const MCOperandInfo OperandInfo93[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6494 static const MCOperandInfo OperandInfo93[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6494 static const MCOperandInfo OperandInfo93[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6504 static const MCOperandInfo OperandInfo103[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6504 static const MCOperandInfo OperandInfo103[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6504 static const MCOperandInfo OperandInfo103[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6508 static const MCOperandInfo OperandInfo107[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, };
6511 static const MCOperandInfo OperandInfo110[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6512 static const MCOperandInfo OperandInfo111[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6512 static const MCOperandInfo OperandInfo111[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6517 static const MCOperandInfo OperandInfo116[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6517 static const MCOperandInfo OperandInfo116[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6523 static const MCOperandInfo OperandInfo122[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6523 static const MCOperandInfo OperandInfo122[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6526 static const MCOperandInfo OperandInfo125[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6526 static const MCOperandInfo OperandInfo125[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6526 static const MCOperandInfo OperandInfo125[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6526 static const MCOperandInfo OperandInfo125[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6526 static const MCOperandInfo OperandInfo125[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6526 static const MCOperandInfo OperandInfo125[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6526 static const MCOperandInfo OperandInfo125[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6527 static const MCOperandInfo OperandInfo126[] = { { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6528 static const MCOperandInfo OperandInfo127[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6528 static const MCOperandInfo OperandInfo127[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6528 static const MCOperandInfo OperandInfo127[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6528 static const MCOperandInfo OperandInfo127[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6529 static const MCOperandInfo OperandInfo128[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6530 static const MCOperandInfo OperandInfo129[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6544 static const MCOperandInfo OperandInfo143[] = { { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6546 static const MCOperandInfo OperandInfo145[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6546 static const MCOperandInfo OperandInfo145[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6546 static const MCOperandInfo OperandInfo145[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6547 static const MCOperandInfo OperandInfo146[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6547 static const MCOperandInfo OperandInfo146[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6548 static const MCOperandInfo OperandInfo147[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
6548 static const MCOperandInfo OperandInfo147[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
6557 static const MCOperandInfo OperandInfo156[] = { { AArch64::FPR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6587 static const MCOperandInfo OperandInfo186[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6588 static const MCOperandInfo OperandInfo187[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::FPR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6589 static const MCOperandInfo OperandInfo188[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6598 static const MCOperandInfo OperandInfo197[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6599 static const MCOperandInfo OperandInfo198[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::FPR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6600 static const MCOperandInfo OperandInfo199[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6616 static const MCOperandInfo OperandInfo215[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::FPR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6622 static const MCOperandInfo OperandInfo221[] = { { AArch64::FPR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6623 static const MCOperandInfo OperandInfo222[] = { { AArch64::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6624 static const MCOperandInfo OperandInfo223[] = { { AArch64::FPR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6635 static const MCOperandInfo OperandInfo234[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6635 static const MCOperandInfo OperandInfo234[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6639 static const MCOperandInfo OperandInfo238[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6641 static const MCOperandInfo OperandInfo240[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6643 static const MCOperandInfo OperandInfo242[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6643 static const MCOperandInfo OperandInfo242[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6645 static const MCOperandInfo OperandInfo244[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6652 static const MCOperandInfo OperandInfo251[] = { { AArch64::FPR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::FPR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6653 static const MCOperandInfo OperandInfo252[] = { { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6654 static const MCOperandInfo OperandInfo253[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
6654 static const MCOperandInfo OperandInfo253[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
6654 static const MCOperandInfo OperandInfo253[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
6656 static const MCOperandInfo OperandInfo255[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6660 static const MCOperandInfo OperandInfo259[] = { { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::QQQQRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6662 static const MCOperandInfo OperandInfo261[] = { { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::DDDDRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6664 static const MCOperandInfo OperandInfo263[] = { { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::FPR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6666 static const MCOperandInfo OperandInfo265[] = { { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6668 static const MCOperandInfo OperandInfo267[] = { { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::QQQRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6670 static const MCOperandInfo OperandInfo269[] = { { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::DDDRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6672 static const MCOperandInfo OperandInfo271[] = { { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::QQRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6674 static const MCOperandInfo OperandInfo273[] = { { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::DDRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6676 static const MCOperandInfo OperandInfo275[] = { { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::FPR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::FPR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6680 static const MCOperandInfo OperandInfo279[] = { { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::QQRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::QQRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6684 static const MCOperandInfo OperandInfo283[] = { { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::QQQRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::QQQRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6688 static const MCOperandInfo OperandInfo287[] = { { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::QQQQRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::QQQQRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6690 static const MCOperandInfo OperandInfo289[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6690 static const MCOperandInfo OperandInfo289[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6693 static const MCOperandInfo OperandInfo292[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6694 static const MCOperandInfo OperandInfo293[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6695 static const MCOperandInfo OperandInfo294[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6695 static const MCOperandInfo OperandInfo294[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6700 static const MCOperandInfo OperandInfo299[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6700 static const MCOperandInfo OperandInfo299[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6701 static const MCOperandInfo OperandInfo300[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6704 static const MCOperandInfo OperandInfo303[] = { { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6704 static const MCOperandInfo OperandInfo303[] = { { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6707 static const MCOperandInfo OperandInfo306[] = { { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6710 static const MCOperandInfo OperandInfo309[] = { { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6713 static const MCOperandInfo OperandInfo312[] = { { AArch64::FPR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6718 static const MCOperandInfo OperandInfo317[] = { { AArch64::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6722 static const MCOperandInfo OperandInfo321[] = { { AArch64::FPR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6727 static const MCOperandInfo OperandInfo326[] = { { AArch64::FPR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6729 static const MCOperandInfo OperandInfo328[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6730 static const MCOperandInfo OperandInfo329[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6730 static const MCOperandInfo OperandInfo329[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6734 static const MCOperandInfo OperandInfo333[] = { { AArch64::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6738 static const MCOperandInfo OperandInfo337[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
6740 static const MCOperandInfo OperandInfo339[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6740 static const MCOperandInfo OperandInfo339[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6740 static const MCOperandInfo OperandInfo339[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6740 static const MCOperandInfo OperandInfo339[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6745 static const MCOperandInfo OperandInfo344[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
6747 static const MCOperandInfo OperandInfo346[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6756 static const MCOperandInfo OperandInfo355[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6767 static const MCOperandInfo OperandInfo366[] = { { AArch64::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6768 static const MCOperandInfo OperandInfo367[] = { { AArch64::FPR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6769 static const MCOperandInfo OperandInfo368[] = { { AArch64::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6770 static const MCOperandInfo OperandInfo369[] = { { AArch64::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6776 static const MCOperandInfo OperandInfo375[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6776 static const MCOperandInfo OperandInfo375[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6782 static const MCOperandInfo OperandInfo381[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6782 static const MCOperandInfo OperandInfo381[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6803 static const MCOperandInfo OperandInfo402[] = { { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::FPR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6806 static const MCOperandInfo OperandInfo405[] = { { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::QQRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6808 static const MCOperandInfo OperandInfo407[] = { { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::QQQRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6810 static const MCOperandInfo OperandInfo409[] = { { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::QQQQRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6813 static const MCOperandInfo OperandInfo412[] = { { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6813 static const MCOperandInfo OperandInfo412[] = { { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6815 static const MCOperandInfo OperandInfo414[] = { { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6816 static const MCOperandInfo OperandInfo415[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6820 static const MCOperandInfo OperandInfo419[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6821 static const MCOperandInfo OperandInfo420[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6832 static const MCOperandInfo OperandInfo431[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, };
6844 static const MCOperandInfo OperandInfo443[] = { { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6844 static const MCOperandInfo OperandInfo443[] = { { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
gen/lib/Target/AArch64/AArch64GenRegisterBank.inc 93 (1u << (AArch64::GPR64RegClassID - 0)) |
gen/lib/Target/AArch64/AArch64GenRegisterInfo.inc 3454 { GPR64, GPR64Bits, 74, 32, sizeof(GPR64Bits), AArch64::GPR64RegClassID, 1, true },
6854 const MCRegisterClass &MCR = AArch64MCRegisterClasses[AArch64::GPR64RegClassID];
7098 &AArch64MCRegisterClasses[GPR64RegClassID],
lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp 952 bool IsStoreXReg = TRI->getRegClass(AArch64::GPR64RegClassID)->contains(StRt);
lib/Target/AArch64/AArch64RegisterBankInfo.cpp 248 case AArch64::GPR64RegClassID:
lib/Target/AArch64/AArch64RegisterInfo.cpp 550 case AArch64::GPR64RegClassID:
lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp 1112 AArch64MCRegisterClasses[AArch64::GPR64RegClassID].contains(Reg.RegNum);
1432 AArch64MCRegisterClasses[AArch64::GPR64RegClassID].contains(getReg()));
1447 uint32_t Reg = RI->getRegClass(AArch64::GPR64RegClassID).getRegister(
5606 AArch64MCRegisterClasses[AArch64::GPR64RegClassID];