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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Mips/MipsGenAsmMatcher.inc 7275 { 7098 /* negu */, Mips::SUBu, Convert__GPR32AsmReg1_0__regZERO__GPR32AsmReg1_0, AMFBS_HasStdEnc_NotInMicroMips, { MCK_GPR32AsmReg }, },
7278 { 7098 /* negu */, Mips::SUBu, Convert__GPR32AsmReg1_0__regZERO__GPR32AsmReg1_1, AMFBS_HasStdEnc_NotInMicroMips, { MCK_GPR32AsmReg, MCK_GPR32AsmReg }, },
7856 { 9072 /* subu */, Mips::SUBu, Convert__GPR32AsmReg1_0__GPR32AsmReg1_0__GPR32AsmReg1_1, AMFBS_HasStdEnc_NotInMicroMips, { MCK_GPR32AsmReg, MCK_GPR32AsmReg }, },
7861 { 9072 /* subu */, Mips::SUBu, Convert__GPR32AsmReg1_0__GPR32AsmReg1_1__GPR32AsmReg1_2, AMFBS_HasStdEnc_NotInMicroMips, { MCK_GPR32AsmReg, MCK_GPR32AsmReg, MCK_GPR32AsmReg }, },
gen/lib/Target/Mips/MipsGenAsmWriter.inc 9459 case Mips::SUBu:
gen/lib/Target/Mips/MipsGenDAGISel.inc16268 /* 30097*/ OPC_EmitNode1, TARGET_VAL(Mips::SUBu), 0,
18227 /* 34121*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::SUBu), 0,
24635 /* 46132*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::SUBu), 0|OPFL_GlueOutput,
gen/lib/Target/Mips/MipsGenFastISel.inc 2386 return fastEmitInst_rr(Mips::SUBu, &Mips::GPR32RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2480 return fastEmitInst_rr(Mips::SUBu, &Mips::GPR32RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/Mips/MipsGenGlobalISel.inc 1257 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/Mips::SUBu,
12678 GIR_BuildMI, /*InsnID*/2, /*Opcode*/Mips::SUBu,
gen/lib/Target/Mips/MipsGenInstrInfo.inc16701 { Mips::SUBu, Mips::SUBu, Mips::SUBu_MM },
16701 { Mips::SUBu, Mips::SUBu, Mips::SUBu_MM },
16812 { Mips::SUBu, Mips::SUBu, Mips::SUBU_MMR6 },
16812 { Mips::SUBu, Mips::SUBu, Mips::SUBU_MMR6 },
gen/lib/Target/Mips/MipsGenMCCodeEmitter.inc 5044 case Mips::SUBu:
lib/Target/Mips/AsmParser/MipsAsmParser.cpp 4647 TOut.emitRRR(Mips::SUBu, TmpReg, Mips::ZERO, TReg, Inst.getLoc(), STI);
4678 TOut.emitRRR(Mips::SUBu, ATReg, Mips::ZERO, TReg, Inst.getLoc(), STI);
lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp 106 return ArePtrs64bit() ? Mips::DSUBu : Mips::SUBu;
lib/Target/Mips/MicroMipsSizeReduction.cpp 260 {RT_OneInstr, OpCodes(Mips::SUBu, Mips::SUBU16_MM),
lib/Target/Mips/MipsExpandPseudo.cpp 353 Opcode = Mips::SUBu;
531 Opcode = Mips::SUBu;