|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/WebAssembly/WebAssemblyGenInstrInfo.inc 2625 { 1070, 2, 1, 0, 0, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, ImplicitList2, ImplicitList1, OperandInfo174, -1 ,nullptr }, // Inst #1070 = PCALL_INDIRECT_v16i8
2627 { 1072, 2, 1, 0, 0, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, ImplicitList2, ImplicitList1, OperandInfo174, -1 ,nullptr }, // Inst #1072 = PCALL_INDIRECT_v2f64
2629 { 1074, 2, 1, 0, 0, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, ImplicitList2, ImplicitList1, OperandInfo174, -1 ,nullptr }, // Inst #1074 = PCALL_INDIRECT_v2i64
2631 { 1076, 2, 1, 0, 0, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, ImplicitList2, ImplicitList1, OperandInfo174, -1 ,nullptr }, // Inst #1076 = PCALL_INDIRECT_v4f32
2633 { 1078, 2, 1, 0, 0, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, ImplicitList2, ImplicitList1, OperandInfo174, -1 ,nullptr }, // Inst #1078 = PCALL_INDIRECT_v4i32
2635 { 1080, 2, 1, 0, 0, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, ImplicitList2, ImplicitList1, OperandInfo174, -1 ,nullptr }, // Inst #1080 = PCALL_INDIRECT_v8i16
2735 { 1180, 2, 1, 0, 0, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, nullptr, ImplicitList1, OperandInfo174, -1 ,nullptr }, // Inst #1180 = SPLAT_v16i8
2743 { 1188, 2, 1, 0, 0, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, nullptr, ImplicitList1, OperandInfo174, -1 ,nullptr }, // Inst #1188 = SPLAT_v4i32
2745 { 1190, 2, 1, 0, 0, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL, nullptr, ImplicitList1, OperandInfo174, -1 ,nullptr }, // Inst #1190 = SPLAT_v8i16