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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
lib/CodeGen/CallingConvLower.cpp 73 for (MCRegAliasIterator AI(ValAssign.getLocReg(), &TRI, true);
228 Regs.push_back(MCPhysReg(Locs[I].getLocReg()));
285 if (Loc1.getLocReg() != Loc2.getLocReg())
285 if (Loc1.getLocReg() != Loc2.getLocReg())
lib/CodeGen/GlobalISel/CallLowering.cpp 314 Handler.assignValueToReg(Args[i].Regs[Part], VA.getLocReg(), VA);
325 Handler.assignValueToReg(NewReg, VA.getLocReg(), VA);
349 Handler.assignValueToReg(Args[i].Regs[Part], VA.getLocReg(), VA);
353 Handler.assignValueToReg(ArgReg, VA.getLocReg(), VA);
439 if (Loc1.getLocReg() != Loc2.getLocReg())
439 if (Loc1.getLocReg() != Loc2.getLocReg())
lib/CodeGen/SelectionDAG/TargetLowering.cpp 82 Register Reg = ArgLoc.getLocReg();
lib/Target/AArch64/AArch64CallLowering.cpp 618 Register Reg = ArgLoc.getLocReg();
lib/Target/AArch64/AArch64FastISel.cpp 3116 TII.get(TargetOpcode::COPY), VA.getLocReg()).addReg(ArgReg);
3117 CLI.OutRegs.push_back(VA.getLocReg());
3181 .addReg(RVLocs[0].getLocReg());
3182 CLI.InRegs.push_back(RVLocs[0].getLocReg());
3892 Register DestReg = VA.getLocReg();
3930 RetRegs.push_back(VA.getLocReg());
lib/Target/AArch64/AArch64ISelLowering.cpp 3228 unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC);
3507 SDValue Val = CopiedRegs.lookup(VA.getLocReg());
3510 DAG.getCopyFromReg(Chain, DL, VA.getLocReg(), VA.getLocVT(), InFlag);
3513 CopiedRegs[VA.getLocReg()] = Val;
3916 if (RegsUsed.count(VA.getLocReg())) {
3924 return Elt.first == VA.getLocReg();
3933 return ArgReg.Reg == VA.getLocReg();
3937 RegsToPass.emplace_back(VA.getLocReg(), Arg);
3938 RegsUsed.insert(VA.getLocReg());
3941 CSInfo.emplace_back(VA.getLocReg(), i);
4213 if (RegsUsed.count(VA.getLocReg())) {
4217 return Elt.first == VA.getLocReg();
4222 RetVals.emplace_back(VA.getLocReg(), Arg);
4223 RegsUsed.insert(VA.getLocReg());
lib/Target/AMDGPU/R600ISelLowering.cpp 1605 unsigned Reg = MF.addLiveIn(VA.getLocReg(), &R600::R600_Reg128RegClass);
lib/Target/AMDGPU/SIISelLowering.cpp 2166 Register Reg = VA.getLocReg();
2335 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Arg, Flag);
2337 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
2387 Val = DAG.getCopyFromReg(Chain, DL, VA.getLocReg(), VA.getLocVT(), InFlag);
2812 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
lib/Target/ARC/ARCISelLowering.cpp 286 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
381 DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), VA.getValVT(), Glue);
494 RegInfo.addLiveIn(VA.getLocReg(), VReg);
664 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), OutVals[i], Flag);
669 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
lib/Target/ARM/ARMCallLowering.cpp 118 assert(VA.getLocReg() == PhysReg && "Assigning to the wrong reg?");
166 assignValueToReg(NewRegs[0], VA.getLocReg(), VA);
167 assignValueToReg(NewRegs[1], NextVA.getLocReg(), NextVA);
340 assert(VA.getLocReg() == PhysReg && "Assigning to the wrong reg?");
385 assignValueToReg(NewRegs[0], VA.getLocReg(), VA);
386 assignValueToReg(NewRegs[1], NextVA.getLocReg(), NextVA);
lib/Target/ARM/ARMFastISel.cpp 1994 TII.get(TargetOpcode::COPY), VA.getLocReg()).addReg(Arg);
1995 RegArgs.push_back(VA.getLocReg());
2008 TII.get(ARM::VMOVRRD), VA.getLocReg())
2009 .addReg(NextVA.getLocReg(), RegState::Define)
2011 RegArgs.push_back(VA.getLocReg());
2012 RegArgs.push_back(NextVA.getLocReg());
2058 .addReg(RVLocs[0].getLocReg())
2059 .addReg(RVLocs[1].getLocReg()));
2061 UsedRegs.push_back(RVLocs[0].getLocReg());
2062 UsedRegs.push_back(RVLocs[1].getLocReg());
2079 ResultReg).addReg(RVLocs[0].getLocReg());
2080 UsedRegs.push_back(RVLocs[0].getLocReg());
2157 Register DstReg = VA.getLocReg();
2166 RetRegs.push_back(VA.getLocReg());
lib/Target/ARM/ARMISelLowering.cpp 1952 SDValue Lo = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32,
1957 SDValue Hi = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32,
1971 Lo = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32, InFlag);
1975 Hi = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32, InFlag);
1985 Val = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), VA.getLocVT(),
2030 RegsToPass.push_back(std::make_pair(VA.getLocReg(), fmrrd.getValue(id)));
2033 RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), fmrrd.getValue(1-id)));
2192 CSInfo.emplace_back(VA.getLocReg(), i);
2193 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
2794 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(),
2798 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
2800 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(),
2804 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
2815 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(),
2819 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
2821 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(),
2825 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), Arg, Flag);
2830 RetOps.push_back(DAG.getRegister(VA.getLocReg(),
3847 unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC);
3861 Reg = MF.addLiveIn(NextVA.getLocReg(), RC);
4069 unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC);
4074 if (VA.getLocReg() == ARM::R0 && Ins[VA.getValNo()].Flags.isReturned()) {
lib/Target/AVR/AVRISelLowering.cpp 1080 unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC);
1231 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
1333 Chain = DAG.getCopyFromReg(Chain, dl, RVLoc.getLocReg(), RVLoc.getValVT(),
1404 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), OutVals[i], Flag);
1408 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
lib/Target/BPF/BPFISelLowering.cpp 241 RegInfo.addLiveIn(VA.getLocReg(), VReg);
349 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
437 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), OutVals[i], Flag);
442 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
475 Chain = DAG.getCopyFromReg(Chain, DL, Val.getLocReg(),
lib/Target/Hexagon/HexagonISelLowering.cpp 217 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), OutVals[i], Flag);
221 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
286 SDValue FR0 = DAG.getCopyFromReg(Chain, dl, RVLocs[i].getLocReg(),
300 RetVal = DAG.getCopyFromReg(Chain, dl, RVLocs[i].getLocReg(),
434 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
759 MRI.addLiveIn(VA.getLocReg(), VReg);
lib/Target/Lanai/LanaiISelLowering.cpp 464 RegInfo.addLiveIn(VA.getLocReg(), VReg);
557 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), OutVals[i], Flag);
561 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
686 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
787 Chain = DAG.getCopyFromReg(Chain, DL, RVLocs[I].getLocReg(),
lib/Target/MSP430/MSP430ISelLowering.cpp 639 RegInfo.addLiveIn(VA.getLocReg(), VReg);
749 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(),
755 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
834 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
934 Chain = DAG.getCopyFromReg(Chain, dl, RVLocs[i].getLocReg(),
lib/Target/Mips/MipsCallLowering.cpp 141 Register PhysReg = VA.getLocReg();
253 Register PhysReg = VA.getLocReg();
409 VA.getLocReg(), VA.getLocVT(), LocInfo);
lib/Target/Mips/MipsFastISel.cpp 1234 TII.get(TargetOpcode::COPY), VA.getLocReg()).addReg(ArgReg);
1235 CLI.OutRegs.push_back(VA.getLocReg());
1305 ResultReg).addReg(RVLocs[0].getLocReg());
1306 CLI.InRegs.push_back(RVLocs[0].getLocReg());
1731 Register DestReg = VA.getLocReg();
1772 RetRegs.push_back(VA.getLocReg());
lib/Target/Mips/MipsISelLowering.cpp 3168 Register LocRegLo = VA.getLocReg();
3210 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
3357 SDValue Val = DAG.getCopyFromReg(Chain, DL, RVLocs[i].getLocReg(),
3524 Register ArgReg = VA.getLocReg();
3711 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Val, Flag);
3715 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
lib/Target/PowerPC/PPCFastISel.cpp 1517 unsigned SourcePhysReg = VA.getLocReg();
1720 Register RetReg = VA.getLocReg();
1744 RetRegs.push_back(VA.getLocReg());
lib/Target/PowerPC/PPCISelLowering.cpp 3534 unsigned RegLo = MF.addLiveIn(VA.getLocReg(), RC);
3535 unsigned RegHi = MF.addLiveIn(ArgLocs[++i].getLocReg(), RC);
3543 unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC);
5174 SDValue Lo = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32,
5179 SDValue Hi = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32,
5188 VA.getLocReg(), VA.getLocVT(), InFlag);
5586 RegsToPass.push_back(std::make_pair(VA.getLocReg(), SVal.getValue(0)));
5589 RegsToPass.push_back(std::make_pair(ArgLocs[++i].getLocReg(),
5592 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
6851 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
6929 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), SVal, Flag);
6930 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
6935 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), SVal, Flag);
6937 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), Arg, Flag);
6939 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
lib/Target/RISCV/RISCVISelLowering.cpp 1711 RegInfo.addLiveIn(VA.getLocReg(), VReg);
1789 RegInfo.addLiveIn(VA.getLocReg(), LoVReg);
1792 if (VA.getLocReg() == RISCV::X17) {
1801 RegInfo.addLiveIn(VA.getLocReg() + 1, HiVReg);
2170 Register RegLo = VA.getLocReg();
2227 RegsToPass.push_back(std::make_pair(VA.getLocReg(), ArgValue));
2338 DAG.getCopyFromReg(Chain, DL, VA.getLocReg(), VA.getLocVT(), Glue);
2344 assert(VA.getLocReg() == ArgGPRs[0] && "Unexpected reg assignment");
2412 Register RegLo = VA.getLocReg();
2431 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Val, Glue);
2433 if (STI.isRegisterReservedByUser(VA.getLocReg()))
2440 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
lib/Target/Sparc/SparcISelLowering.cpp 251 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Part0, Flag);
253 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
255 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Part1,
258 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Arg, Flag);
262 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
345 if (i+1 < RVLocs.size() && RVLocs[i+1].getLocReg() == VA.getLocReg()) {
345 if (i+1 < RVLocs.size() && RVLocs[i+1].getLocReg() == VA.getLocReg()) {
353 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), OutVal, Flag);
357 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
421 MF.getRegInfo().addLiveIn(VA.getLocReg(), VRegHi);
434 unsigned loReg = MF.addLiveIn(NextVA.getLocReg(),
449 MF.getRegInfo().addLiveIn(VA.getLocReg(), VReg);
600 unsigned VReg = MF.addLiveIn(VA.getLocReg(),
869 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Part0));
873 RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), Part1));
904 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
908 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
992 Chain, dl, toCallerWindow(RVLocs[i++].getLocReg()), MVT::i32, InFlag);
998 Chain, dl, toCallerWindow(RVLocs[i].getLocReg()), MVT::i32, InFlag);
1006 DAG.getCopyFromReg(Chain, dl, toCallerWindow(RVLocs[i].getLocReg()),
1065 unsigned Offset = argSize * (VA.getLocReg() - firstReg);
1169 unsigned Offset = 8 * (VA.getLocReg() - SP::I0);
1185 RegsToPass.push_back(std::make_pair(toCallerWindow(VA.getLocReg()),
1187 RegsToPass.push_back(std::make_pair(toCallerWindow(VA.getLocReg()+1),
1201 ArgLocs[i+1].getLocReg() == VA.getLocReg()) {
1201 ArgLocs[i+1].getLocReg() == VA.getLocReg()) {
1209 RegsToPass.push_back(std::make_pair(toCallerWindow(VA.getLocReg()), Arg));
1303 unsigned Reg = toCallerWindow(VA.getLocReg());
lib/Target/SystemZ/SystemZISelLowering.cpp 1355 MRI.addLiveIn(VA.getLocReg(), VReg);
1449 Register Reg = VA.getLocReg();
1532 RegsToPass.push_back(std::make_pair(VA.getLocReg(), ArgValue));
1624 SDValue RetValue = DAG.getCopyFromReg(Chain, DL, VA.getLocReg(),
1693 Register Reg = VA.getLocReg();
lib/Target/X86/X86FastISel.cpp 1217 if (VA.getLocReg() == X86::FP0 || VA.getLocReg() == X86::FP1)
1217 if (VA.getLocReg() == X86::FP0 || VA.getLocReg() == X86::FP1)
1246 Register DstReg = VA.getLocReg();
1255 RetRegs.push_back(VA.getLocReg());
3405 TII.get(TargetOpcode::COPY), VA.getLocReg()).addReg(ArgReg);
3406 OutRegs.push_back(VA.getLocReg());
3556 Register SrcReg = VA.getLocReg();
3575 InRegs.push_back(VA.getLocReg());
lib/Target/X86/X86ISelLowering.cpp 2460 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Lo));
2461 RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), Hi));
2501 MF.getRegInfo().disableCalleeSavedRegister(VA.getLocReg());
2526 VA.getLocReg() == X86::XMM0 || VA.getLocReg() == X86::XMM1) &&
2526 VA.getLocReg() == X86::XMM0 || VA.getLocReg() == X86::XMM1) &&
2541 if (VA.getLocReg() == X86::FP0 ||
2542 VA.getLocReg() == X86::FP1) {
2556 if (VA.getLocReg() == X86::XMM0 || VA.getLocReg() == X86::XMM1) {
2556 if (VA.getLocReg() == X86::XMM0 || VA.getLocReg() == X86::XMM1) {
2582 MF.getRegInfo().disableCalleeSavedRegister(RVLocs[I].getLocReg());
2584 RegsToPass.push_back(std::make_pair(VA.getLocReg(), ValToCopy));
2756 unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC);
2758 Reg = MF.addLiveIn(NextVA.getLocReg(), RC);
2764 DAG.getCopyFromReg(Root, Dl, VA.getLocReg(), MVT::i32, *InFlag);
2767 DAG.getCopyFromReg(Root, Dl, NextVA.getLocReg(), MVT::i32, *InFlag);
2843 for (MCSubRegIterator SubRegs(VA.getLocReg(), TRI, /*IncludeSelf=*/true);
2862 if ((VA.getLocReg() == X86::FP0 || VA.getLocReg() == X86::FP1) &&
2862 if ((VA.getLocReg() == X86::FP0 || VA.getLocReg() == X86::FP1) &&
2877 Chain = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), CopyVT, InFlag)
3271 unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC);
3825 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
3828 CSInfo.emplace_back(VA.getLocReg(), I);
3833 switch (VA.getLocReg()) {
4387 if (VA.getLocReg() == X86::FP0 || VA.getLocReg() == X86::FP1)
4387 if (VA.getLocReg() == X86::FP0 || VA.getLocReg() == X86::FP1)
4460 Register Reg = VA.getLocReg();
lib/Target/XCore/XCoreISelLowering.cpp 1069 Chain = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), VA.getValVT(),
1163 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
1313 RegInfo.addLiveIn(VA.getLocReg(), VReg);
1501 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), OutVals[i], Flag);
1506 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));