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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenDAGISel.inc92225 /*210121*/ /*SwitchOpcode*/ 100|128,2/*356*/, TARGET_VAL(ISD::ATOMIC_STORE),// ->210481
gen/lib/Target/AMDGPU/AMDGPUGenDAGISel.inc35494 /* 75217*/ /*SwitchOpcode*/ 0|128,3/*384*/, TARGET_VAL(ISD::ATOMIC_STORE),// ->75605
gen/lib/Target/ARM/ARMGenDAGISel.inc32505 /* 71540*/ /*SwitchOpcode*/ 26|128,5/*666*/, TARGET_VAL(ISD::ATOMIC_STORE),// ->72210
gen/lib/Target/AVR/AVRGenDAGISel.inc 1130 /* 1955*/ /*SwitchOpcode*/ 34, TARGET_VAL(ISD::ATOMIC_STORE),// ->1992
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc52636 /* 99409*/ /*SwitchOpcode*/ 42|128,14/*1834*/, TARGET_VAL(ISD::ATOMIC_STORE),// ->101247
gen/lib/Target/Mips/MipsGenDAGISel.inc 6677 /* 12967*/ /*SwitchOpcode*/ 7|128,1/*135*/, TARGET_VAL(ISD::ATOMIC_STORE),// ->13106
gen/lib/Target/PowerPC/PPCGenDAGISel.inc22016 /* 54714*/ /*SwitchOpcode*/ 6|128,1/*134*/, TARGET_VAL(ISD::ATOMIC_STORE),// ->54852
gen/lib/Target/RISCV/RISCVGenDAGISel.inc 3951 /* 7299*/ /*SwitchOpcode*/ 74|128,9/*1226*/, TARGET_VAL(ISD::ATOMIC_STORE),// ->8529
gen/lib/Target/Sparc/SparcGenDAGISel.inc 1378 /* 2482*/ /*SwitchOpcode*/ 11|128,1/*139*/, TARGET_VAL(ISD::ATOMIC_STORE),// ->2625
gen/lib/Target/WebAssembly/WebAssemblyGenDAGISel.inc 8599 /* 15972*/ /*SwitchOpcode*/ 2|128,8/*1026*/, TARGET_VAL(ISD::ATOMIC_STORE),// ->17002
gen/lib/Target/X86/X86GenDAGISel.inc 8596 /* 18505*/ /*SwitchOpcode*/ 98|128,21/*2786*/, TARGET_VAL(ISD::ATOMIC_STORE),// ->21295
include/llvm/CodeGen/SelectionDAGNodes.h 1424 N->getOpcode() == ISD::ATOMIC_STORE ||
1440 assert(((Opc != ISD::ATOMIC_LOAD && Opc != ISD::ATOMIC_STORE) ||
1481 N->getOpcode() == ISD::ATOMIC_STORE;
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp 1021 case ISD::ATOMIC_STORE:
2741 case ISD::ATOMIC_STORE: {
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp 1156 case ISD::ATOMIC_STORE:
3624 case ISD::ATOMIC_STORE: Res = ExpandIntOp_ATOMIC_STORE(N); break;
lib/CodeGen/SelectionDAG/SelectionDAG.cpp 604 case ISD::ATOMIC_STORE: {
6531 Opcode == ISD::ATOMIC_STORE) &&
6536 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp 4751 SDValue OutChain = DAG.getAtomic(ISD::ATOMIC_STORE, dl, MemVT, InChain,
lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp 100 case ISD::ATOMIC_STORE: return "AtomicStore";
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 701 Use->getOpcode() != ISD::ATOMIC_STORE)
lib/Target/AMDGPU/R600ISelLowering.cpp 267 setOperationAction(ISD::ATOMIC_STORE, MVT::i32, Expand);
lib/Target/AMDGPU/SIISelLowering.cpp 733 setTargetDAGCombine(ISD::ATOMIC_STORE);
9973 case ISD::ATOMIC_STORE:
lib/Target/ARM/ARMISelLowering.cpp 1243 setOperationAction(ISD::ATOMIC_STORE, MVT::i32, Custom);
9227 case ISD::ATOMIC_STORE: return LowerAtomicLoadStore(Op, DAG);
lib/Target/Mips/MipsISelLowering.cpp 472 setOperationAction(ISD::ATOMIC_STORE, MVT::i64, Expand);
lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp 90 case ISD::ATOMIC_STORE:
lib/Target/PowerPC/PPCISelLowering.cpp 1089 setOperationAction(ISD::ATOMIC_STORE, MVT::i64, Expand);
lib/Target/Sparc/SparcISelLowering.cpp 1594 setOperationAction(ISD::ATOMIC_STORE, MVT::i32, Custom);
1600 setOperationAction(ISD::ATOMIC_STORE, MVT::i64, Custom);
3059 case ISD::ATOMIC_STORE: return LowerATOMIC_LOAD_STORE(Op, DAG);
lib/Target/SystemZ/SystemZISelLowering.cpp 181 setOperationAction(ISD::ATOMIC_STORE, VT, Custom);
236 setOperationAction(ISD::ATOMIC_STORE, MVT::i128, Custom);
4982 case ISD::ATOMIC_STORE:
5082 case ISD::ATOMIC_STORE: {
lib/Target/X86/X86ISelLowering.cpp 473 setOperationAction(ISD::ATOMIC_STORE, VT, Custom);
27672 case ISD::ATOMIC_STORE: return LowerATOMIC_STORE(Op, DAG, Subtarget);
45130 if (User->getOpcode() != ISD::ATOMIC_STORE)
lib/Target/XCore/XCoreISelLowering.cpp 155 setOperationAction(ISD::ATOMIC_STORE, MVT::i32, Custom);
222 case ISD::ATOMIC_STORE: return LowerATOMIC_STORE(Op, DAG);
970 assert(N->getOpcode() == ISD::ATOMIC_STORE && "Bad Atomic OP");