reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/CodeGen/SelectionDAG/DAGCombiner.cpp

 1523   case ISD::UMULO:              return visitMULO(N);

lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

 3401   case ISD::UMULO:

lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp

  144   case ISD::UMULO:       Res = PromoteIntRes_XMULO(N, ResNo); break;
 1058   if (N->getOpcode() == ISD::UMULO) {
 1783   case ISD::UMULO:
 2890       unsigned MulOp = Signed ? ISD::SMULO : ISD::UMULO;
 3361   if (N->getOpcode() == ISD::UMULO) {
 3388     SDValue One = DAG.getNode(ISD::UMULO, dl, VTHalfMulO, LHSHigh, RHSLow);
 3393     SDValue Two = DAG.getNode(ISD::UMULO, dl, VTHalfMulO, RHSHigh, LHSLow);

lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp

  446   case ISD::UMULO:
  823   case ISD::UMULO:

lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

  182   case ISD::UMULO:
  997   case ISD::UMULO:
 2808   case ISD::UMULO:

lib/CodeGen/SelectionDAG/SelectionDAG.cpp

 2775   case ISD::UMULO:
 3641   case ISD::UMULO:
 9184           Opcode == ISD::UMULO || Opcode == ISD::SMULO) &&

lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

 6527     case Intrinsic::umul_with_overflow: Op = ISD::UMULO; break;

lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp

  293   case ISD::UMULO:                      return "umulo";

lib/CodeGen/SelectionDAG/TargetLowering.cpp

 7001     } else if (!Signed && isOperationLegalOrCustom(ISD::UMULO, VT)) {
 7003           DAG.getNode(ISD::UMULO, dl, DAG.getVTList(VT, BoolVT), LHS, RHS);

lib/CodeGen/TargetLoweringBase.cpp

  664     setOperationAction(ISD::UMULO, VT, Expand);

lib/Target/AArch64/AArch64ISelLowering.cpp

  346   setOperationAction(ISD::UMULO, MVT::i32, Custom);
  347   setOperationAction(ISD::UMULO, MVT::i64, Custom);
 2131   case ISD::UMULO: {
 2229            Opc == ISD::USUBO || Opc == ISD::SMULO || Opc == ISD::UMULO));
 3006   case ISD::UMULO:

lib/Target/ARM/ARMISelLowering.cpp

 4400   case ISD::UMULO:
 5181   bool OptimizeMul = (Opc == ISD::SMULO || Opc == ISD::UMULO) &&
 5232   bool OptimizeMul = (Opc == ISD::SMULO || Opc == ISD::UMULO) &&

lib/Target/PowerPC/PPCTargetTransformInfo.cpp

  342           case Intrinsic::umul_with_overflow: Opcode = ISD::UMULO;      break;

lib/Target/Sparc/SparcISelLowering.cpp

 1674     setOperationAction(ISD::UMULO,     MVT::i64, Custom);
 2936   assert((opcode == ISD::UMULO || opcode == ISD::SMULO) && "Invalid Opcode.");
 3056   case ISD::UMULO:

lib/Target/X86/X86ISelLowering.cpp

 1792     setOperationAction(ISD::UMULO, VT, Custom);
21145   case ISD::UMULO:
21429              CondOpcode == ISD::UMULO || CondOpcode == ISD::SMULO) {
21984          Cond.getOperand(0).getOpcode() == ISD::UMULO)) {
22036       CondOpcode == ISD::UMULO || CondOpcode == ISD::SMULO) {
27759   case ISD::UMULO:              return LowerXALUO(Op, DAG);