reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
66 VNInfo(unsigned i, const VNInfo &orig) : id(i), def(orig.def) {} 70 def = src.def; 70 def = src.def; 77 bool isPHIDef() const { return def.isBlock(); } 80 bool isUnused() const { return !def.isValid(); } 83 void markUnused() { def = SlotIndex(); } 559 if (EarlyVal->def == Idx.getBaseIndex())lib/CodeGen/CalcSpillWeights.cpp
99 MachineInstr *MI = LIS.getInstructionFromIndex(VNI->def); 122 LiveQueryResult SrcQ = SrcLI.Query(VNI->def); 127 MI = LIS.getInstructionFromIndex(VNI->def);lib/CodeGen/InlineSpiller.cpp
376 assert(VNI && VNI->def == Idx.getRegSlot() && "Not defined by copy"); 383 MachineBasicBlock *DefMBB = LIS.getMBBFromIndex(SrcVNI->def); 401 MachineBasicBlock *MBB = LIS.getMBBFromIndex(SrcVNI->def); 406 MachineInstr *DefMI = LIS.getInstructionFromIndex(SrcVNI->def); 416 LLVM_DEBUG(dbgs() << "\thoisted: " << SrcVNI->def << '\t' << *MII); 436 << VNI->def << " in " << *LI << '\n'); 463 assert(DstVNI->def == Idx.getRegSlot() && "Wrong copy def slot"); 499 MachineBasicBlock *MBB = LIS.getMBBFromIndex(VNI->def); 509 MachineInstr *MI = LIS.getInstructionFromIndex(VNI->def); 514 VNInfo *SnipVNI = SnipLI.getVNInfoAt(VNI->def.getRegSlot(true)); 572 RM.OrigMI = LIS.getInstructionFromIndex(OrigVNI->def); 673 MachineInstr *MI = LIS.getInstructionFromIndex(VNI->def); 1002 if (SlotIndex::isSameInstr(Idx, VNI->def)) 1003 Idx = VNI->def; 1335 MachineBasicBlock *Root = LIS.getMBBFromIndex(OrigVNI.def);lib/CodeGen/LiveDebugVariables.cpp
798 assert(DstVNI && DstVNI->def == Idx.getRegSlot() && "Bad copy value"); 822 MachineInstr *CopyMI = LIS.getInstructionFromIndex(DstVNI->def);lib/CodeGen/LiveInterval.cpp
90 assert((!ForVNI || ForVNI->def == Def) && 102 assert(S->valno->def == S->start && "Inconsistent existing value def"); 111 S->start = S->valno->def = Def; 381 return CalcLiveRangeUtilSet(this).createDeadDef(VNI->def, nullptr, VNI); 383 return CalcLiveRangeUtilVector(this).createDeadDef(VNI->def, nullptr, VNI); 900 const MachineInstr *MI = Indexes.getInstructionFromIndex(VNI->def); 1023 OS << vni->def; 1327 const MachineBasicBlock *MBB = LIS.getMBBFromIndex(VNI->def); 1339 if (const VNInfo *UVNI = LR.getVNInfoBefore(VNI->def)) 1399 const VNInfo *MainRangeVNI = LI.getVNInfoAt(VNI.def);lib/CodeGen/LiveIntervals.cpp
355 SlotIndex Def = VNI->def; 397 if (!VNI->isPHIDef() || VNI->def != BlockStart || 481 Idx = DefVNI->def; 506 SlotIndex Def = VNI->def; 579 Idx = DefVNI->def; 596 const LiveRange::Segment *Segment = SR.getSegmentContaining(VNI->def); 598 if (Segment->end != VNI->def.getDeadSlot()) 602 LLVM_DEBUG(dbgs() << "Dead PHI at " << VNI->def 842 const MachineBasicBlock *PHIMBB = getMBBFromIndex(PHI->def); 1108 assert(OldIdxVNI->def == OldIdxOut->start && "Inconsistent def"); 1114 OldIdxVNI->def = NewIdxDef; 1115 OldIdxOut->start = OldIdxVNI->def; 1148 INext->valno->def = INext->start; 1161 DefVNI->def = NewIdxDef; 1178 Prev->valno->def = NewIdxDef; 1181 DefVNI->def = Prev->start; 1186 DefVNI->def = NewIdxDef; 1210 NewSegmentVNI->def = NewIdxDef; 1258 assert(OldIdxVNI->def == OldIdxOut->start && "Inconsistent def"); 1271 OldIdxVNI->def = NewIdxDef; 1306 OldIdxOut->valno->def = OldIdxIn->start; 1324 Next->valno->def = SplitPos; 1329 NewSegment->valno->def = SplitPos; 1334 OldIdxVNI->def = NewIdxDef; 1357 OldIdxVNI->def = NewIdxDef; 1380 NewSegmentVNI->def = NewIdxDef; 1538 LII->valno->def = instrIdx.getRegSlot(); 1639 assert(VNI->def.getBaseIndex() == Pos.getBaseIndex()); 1646 if (SVNI->def.getBaseIndex() == Pos.getBaseIndex())lib/CodeGen/LiveRangeCalc.cpp
140 MainRange.createDeadDef(VNI->def, *Alloc); 515 DomTree->getNode(Indexes->getMBBFromIndex(IDomValue.first->def)); 530 DomTree->getNode(Indexes->getMBBFromIndex(Value.first->def));lib/CodeGen/LiveRangeEdit.cpp
87 VNInfo *OrigVNI = OrigLI.getVNInfoAt(VNI->def); 90 MachineInstr *DefMI = LIS.getInstructionFromIndex(OrigVNI->def); 303 isOrigDef = SlotIndex::isSameInstr(OrigVNI->def, Idx);lib/CodeGen/MachineScheduler.cpp
1331 MachineInstr *DefMI = LIS->getInstructionFromIndex(DefVNI->def); 1768 MachineInstr *LastLocalDef = LIS->getInstructionFromIndex(LastLocalVN->def);lib/CodeGen/MachineVerifier.cpp
539 errs() << "- ValNo: " << VNI.id << " (def " << VNI.def << ")\n"; 1900 if (VNI->def != DefIdx) { 2370 const VNInfo *DefVNI = LR.getVNInfoAt(VNI->def); 2386 const MachineBasicBlock *MBB = LiveInts->getMBBFromIndex(VNI->def); 2395 if (VNI->def != LiveInts->getMBBStartIdx(MBB)) { 2404 const MachineInstr *MI = LiveInts->getInstructionFromIndex(VNI->def); 2443 if (!VNI->def.isEarlyClobber()) { 2448 } else if (!VNI->def.isRegister()) { 2485 if (S.start != MBBStartIdx && S.start != VNI->def) { 2506 S.start == VNI->def && S.end == VNI->def.getDeadSlot()) 2506 S.start == VNI->def && S.end == VNI->def.getDeadSlot()) 2605 if (S.start == VNI->def && !VNI->isPHIDef()) { 2631 VNI->def == LiveInts->getMBBStartIdx(&*MFI);lib/CodeGen/PHIElimination.cpp
363 DestVNI->def = DestCopyIndex.getRegSlot(); 495 if (VNI && VNI->def != startIdx) {lib/CodeGen/RegisterCoalescer.cpp
589 if (BValNo->def != CopyIdx) return false; 600 MachineInstr *ACopyMI = LIS->getInstructionFromIndex(AValNo->def); 607 IntB.FindSegmentContaining(AValNo->def.getPrevSlot()); 629 BValNo->def = FillerStart; 651 VNInfo *SubValSNo = S.getVNInfoAt(AValNo->def.getPrevSlot()); 771 assert(BValNo != nullptr && BValNo->def == CopyIdx); 778 MachineInstr *DefMI = LIS->getInstructionFromIndex(AValNo->def); 806 if (NewReg != IntB.reg || !IntB.Query(AValNo->def).isKill()) 828 LLVM_DEBUG(dbgs() << "\tremoveCopyByCommutingDef: " << AValNo->def << '\t' 899 assert(DVNI->def == DefIdx); 906 assert(SubBValNo->def == CopyIdx); 950 BSubValNo->def = ASubValNo->def; 950 BSubValNo->def = ASubValNo->def; 966 BValNo->def = AValNo->def; 966 BValNo->def = AValNo->def; 971 LIS->removeVRegDefAt(IntA, AValNo->def); 1060 MachineInstr *DefMI = LIS->getInstructionFromIndex(PVal->def); 1079 if (PVal->def < VNI->def && VNI->def < LIS->getMBBEndIdx(Pred)) { 1079 if (PVal->def < VNI->def && VNI->def < LIS->getMBBEndIdx(Pred)) { 1079 if (PVal->def < VNI->def && VNI->def < LIS->getMBBEndIdx(Pred)) { 1222 MachineInstr *DefMI = LIS->getInstructionFromIndex(ValNo->def); 1579 assert(SVNI != nullptr && SlotIndex::isSameInstr(SVNI->def, RegIndex)); 2409 SlotIndex Def = VNI->def; 2478 return Orig0->def == Orig1->def && Reg0 == Reg1; 2478 return Orig0->def == Orig1->def && Reg0 == Reg1; 2499 DefMI = Indexes->getInstructionFromIndex(VNI->def); 2528 V.RedefVNI = LR.Query(VNI->def).valueIn(); 2551 LiveQueryResult OtherLRQ = Other.LR.Query(VNI->def); 2558 assert(SlotIndex::isSameInstr(VNI->def, OtherVNI->def) && "Broken LRQ"); 2558 assert(SlotIndex::isSameInstr(VNI->def, OtherVNI->def) && "Broken LRQ"); 2562 if (OtherVNI->def < VNI->def) 2562 if (OtherVNI->def < VNI->def) 2564 else if (VNI->def < OtherVNI->def && OtherLRQ.valueIn()) { 2564 else if (VNI->def < OtherVNI->def && OtherLRQ.valueIn()) { 2593 assert(!SlotIndex::isSameInstr(VNI->def, V.OtherVNI->def) && "Broken LRQ"); 2593 assert(!SlotIndex::isSameInstr(VNI->def, V.OtherVNI->def) && "Broken LRQ"); 2609 DefMI->getParent() != Indexes->getMBBFromIndex(V.OtherVNI->def)) { 2610 LLVM_DEBUG(dbgs() << "IMPLICIT_DEF defined at " << V.OtherVNI->def 2647 if (OtherLRQ.isKill() && OtherLRQ.endPoint() <= VNI->def) 2691 assert(VNI->def.isEarlyClobber() && 2706 MachineBasicBlock *MBB = Indexes->getMBBFromIndex(VNI->def); 2736 << LR.getValNumInfo(ValNo)->def << " into " 2738 << V.OtherVNI->def << " --> @" 2739 << NewVNInfo[Assignments[ValNo]]->def << '\n'); 2776 << '@' << LR.getValNumInfo(i)->def << '\n'); 2787 MachineBasicBlock *MBB = Indexes->getMBBFromIndex(VNI->def); 2791 LiveInterval::iterator OtherI = Other.LR.find(VNI->def); 2846 << LR.getValNumInfo(i)->def << '\n'); 2867 MachineBasicBlock *MBB = Indexes->getMBBFromIndex(VNI->def); 2870 MI = Indexes->getInstructionFromIndex(VNI->def); 2874 assert(!SlotIndex::isSameInstr(VNI->def, TaintExtent.front().first) && 2923 SlotIndex Def = LR.getValNumInfo(i)->def; 3030 SlotIndex Def = LR.getValNumInfo(i)->def; 3033 OtherDef = V.OtherVNI->def; 3046 ValueOut->def == Def))) { 3081 if (VNI->def == Def) 3094 if (VNI->isUnused() || VNI->isPHIDef() || isDefInSubRange(LI, VNI->def)) 3118 SlotIndex Def = LR.getValNumInfo(i)->def; 3135 SlotIndex Def = VNI->def;lib/CodeGen/RenameIndependentSubregs.cpp
322 SlotIndex Def = VNI.def;
lib/CodeGen/SplitKit.cpp130 if (!SlotIndex::isEarlierInstr(VNI->def, LIP.second) && VNI->def < MBBEnd) 130 if (!SlotIndex::isEarlierInstr(VNI->def, LIP.second) && VNI->def < MBBEnd) 172 UseSlots.push_back(VNI->def); 257 assert(LVI->start == LVI->valno->def && "Dangling Segment start"); 289 assert(LVI->start == LVI->valno->def && "Dangling Segment start"); 421 SlotIndex Def = VNI->def; 429 if (PV != nullptr && PV->def == Def) 648 RM.OrigMI = LIS.getInstructionFromIndex(OrigVNI->def); 706 return VNI->def; 724 return VNI->def; 741 RegAssign.insert(VNI->def, End, OpenIdx); 743 return VNI->def; 777 if (SpillMode && !SlotIndex::isSameInstr(ParentVNI->def, Idx) && 786 return VNI->def; 805 return VNI->def; 822 RegAssign.insert(Start, VNI->def, OpenIdx); 824 return VNI->def; 854 SlotIndex Def = Copies[i]->def; 958 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(VNI->def); 976 MachineBasicBlock *MBB1 = LIS.getMBBFromIndex((*It1)->def); 977 MachineBasicBlock *MBB2 = LIS.getMBBFromIndex((*It2)->def); 979 DominatedVNIs.insert((*It1)->def < (*It2)->def ? (*It2) : (*It1)); 979 DominatedVNIs.insert((*It1)->def < (*It2)->def ? (*It2) : (*It1)); 1022 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(VNI->def); 1030 MachineBasicBlock *ValMBB = LIS.getMBBFromIndex(VNI->def); 1037 if (VNI->def == ParentVNI->def) { 1037 if (VNI->def == ParentVNI->def) { 1038 LLVM_DEBUG(dbgs() << "Direct complement def at " << VNI->def << '\n'); 1039 Dom = DomPair(ValMBB, VNI->def); 1045 LLVM_DEBUG(dbgs() << "Single complement def at " << VNI->def << '\n'); 1051 Dom = DomPair(ValMBB, VNI->def); 1054 if (!Dom.second.isValid() || VNI->def < Dom.second) 1055 Dom.second = VNI->def; 1062 Dom = DomPair(ValMBB, VNI->def); 1070 << VNI->def << " for parent " << ParentVNI->id << '@' 1071 << ParentVNI->def << " hoist to " 1083 MachineBasicBlock *DefMBB = LIS.getMBBFromIndex(ParentVNI->def); 1094 SA.getLastSplitPointIter(Dom.first))->def; 1103 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(VNI->def); 1105 if (!Dom.first || Dom.second == VNI->def || 1197 if (BlockStart == ParentVNI->def) { 1271 unsigned RegIdx = RegAssign.lookup(V->def); 1274 MachineBasicBlock &B = *LIS.getMBBFromIndex(V->def); 1275 if (!removeDeadSegment(V->def, LI)) 1286 unsigned RegIdx = RegAssign.lookup(V->def); 1289 if (removeDeadSegment(V->def, S)) 1292 MachineBasicBlock &B = *LIS.getMBBFromIndex(V->def); 1413 if (S.end != S.valno->def.getDeadSlot()) 1417 MachineInstr *MI = LIS.getInstructionFromIndex(S.valno->def); 1459 MachineBasicBlock &MBB = *Indexes.getMBBFromIndex(VNI.def); 1480 unsigned RegIdx = RegAssign.lookup(ParentVNI->def); 1481 defValue(RegIdx, ParentVNI, ParentVNI->def, true);lib/Target/AMDGPU/SIRegisterInfo.cpp
1891 DefIdx = V->def; 1899 LIS->getInstructionFromIndex(V->def))) 1900 DefIdx = V->def;lib/Target/AMDGPU/SIWholeQuadMode.cpp
296 markInstruction(*LIS->getInstructionFromIndex(Value->def), Flag,
lib/Target/Hexagon/HexagonExpandCondsets.cpp 1167 NewVN = L1.getNextValue(I->valno->def, LIS->getVNInfoAllocator());
lib/Target/PowerPC/PPCVSXFMAMutate.cpp 117 MachineInstr *AddendMI = LIS->getInstructionFromIndex(AddendValNo->def);
lib/Target/WebAssembly/WebAssemblyRegStackify.cpp279 return LIS.getInstructionFromIndex(ValNo->def); 629 ValNo->def = TeeIdx;