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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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Declarations
include/llvm/CodeGen/CalcSpillWeights.h 18 class LiveIntervals;
include/llvm/CodeGen/LiveInterval.h 44 class LiveIntervals;
include/llvm/CodeGen/LiveRangeEdit.h 36 class LiveIntervals;
include/llvm/CodeGen/LiveRegMatrix.h 35 class LiveIntervals;
include/llvm/CodeGen/MachineScheduler.h 105 class LiveIntervals;
include/llvm/CodeGen/ModuloSchedule.h 74 class LiveIntervals;
include/llvm/CodeGen/RegAllocPBQP.h 37 class LiveIntervals;
include/llvm/CodeGen/RegisterPressure.h 33 class LiveIntervals;
include/llvm/CodeGen/ScheduleDAGInstrs.h 38 class LiveIntervals;
include/llvm/CodeGen/TargetInstrInfo.h 44 class LiveIntervals;
include/llvm/CodeGen/TargetRegisterInfo.h 42 class LiveIntervals;
lib/CodeGen/InterferenceCache.h 28 class LiveIntervals;
lib/CodeGen/LiveDebugVariables.h 29 class LiveIntervals;
lib/CodeGen/RegAllocBase.h 45 class LiveIntervals;
lib/CodeGen/SplitKit.h 37 class LiveIntervals;
lib/Target/AMDGPU/SIRegisterInfo.h 24 class LiveIntervals;
lib/Target/SystemZ/SystemZRegisterInfo.h 20 class LiveIntervals;
References
include/llvm/CodeGen/CalcSpillWeights.h 52 LiveIntervals &LIS;
60 VirtRegAuxInfo(MachineFunction &mf, LiveIntervals &lis,
98 void calculateSpillWeightsAndHints(LiveIntervals &LIS, MachineFunction &MF,
include/llvm/CodeGen/LiveInterval.h 967 LiveIntervals &LIS;
971 explicit ConnectedVNInfoEqClasses(LiveIntervals &lis) : LIS(lis) {}
include/llvm/CodeGen/LiveRangeEdit.h 73 LiveIntervals &LIS;
139 MachineFunction &MF, LiveIntervals &lis, VirtRegMap *vrm,
include/llvm/CodeGen/LiveRegMatrix.h 42 LiveIntervals *LIS;
include/llvm/CodeGen/MachinePipeliner.h 97 AU.addRequired<LiveIntervals>();
120 LiveIntervals &LIS;
199 SwingSchedulerDAG(MachinePipeliner &P, MachineLoop &L, LiveIntervals &lis,
include/llvm/CodeGen/MachineScheduler.h 125 LiveIntervals *LIS = nullptr;
265 LiveIntervals *LIS;
304 LiveIntervals *getLIS() const { return LIS; }
include/llvm/CodeGen/ModuloSchedule.h 167 LiveIntervals &LIS;
256 LiveIntervals &LIS, InstrChangesTy InstrChanges)
279 LiveIntervals *LIS;
305 LiveIntervals *LIS)
include/llvm/CodeGen/RegAllocPBQP.h 138 LiveIntervals &LIS,
143 LiveIntervals &LIS;
include/llvm/CodeGen/RegisterPressure.h 186 void detectDeadDefs(const MachineInstr &MI, const LiveIntervals &LIS);
192 void adjustLaneLiveness(const LiveIntervals &LIS,
363 const LiveIntervals *LIS = nullptr;
404 const LiveIntervals *lis, const MachineBasicBlock *mbb,
include/llvm/CodeGen/ScheduleDAGInstrs.h 313 LiveIntervals *LIS = nullptr,
include/llvm/CodeGen/TargetInstrInfo.h 1004 LiveIntervals *LIS = nullptr,
1011 LiveIntervals *LIS = nullptr) const;
include/llvm/CodeGen/TargetRegisterInfo.h 952 LiveIntervals &LIS) const
include/llvm/Pass.h 213 AnalysisType &getAnalysisID(AnalysisID PI) const;
include/llvm/PassAnalysisSupport.h 66 return addRequiredID(PassClass::ID);
72 return addRequiredTransitiveID(PassClass::ID);
89 Preserved.push_back(&PassClass::ID);
201 AnalysisType *Pass::getAnalysisIfAvailable() const {
204 const void *PI = &AnalysisType::ID;
220 AnalysisType &Pass::getAnalysis() const {
222 return getAnalysisID<AnalysisType>(&AnalysisType::ID);
222 return getAnalysisID<AnalysisType>(&AnalysisType::ID);
include/llvm/PassSupport.h 76 template <typename PassName> Pass *callDefaultCtor() { return new PassName(); }
lib/CodeGen/CalcSpillWeights.cpp 31 void llvm::calculateSpillWeightsAndHints(LiveIntervals &LIS,
86 const LiveIntervals &LIS,
182 totalWeight += LiveIntervals::getSpillWeight(true, false, &MBFI, localMBB);
183 totalWeight += LiveIntervals::getSpillWeight(false, true, &MBFI, localMBB);
235 weight = LiveIntervals::getSpillWeight(writes, reads, &MBFI, *mi);
lib/CodeGen/InlineSpiller.cpp 87 LiveIntervals &LIS;
141 : MF(mf), LIS(pass.getAnalysis<LiveIntervals>()),
160 LiveIntervals &LIS;
197 : MF(mf), LIS(pass.getAnalysis<LiveIntervals>()),
lib/CodeGen/InterferenceCache.cpp 57 LiveIntervals *lis,
lib/CodeGen/InterferenceCache.h 63 LiveIntervals *LIS = nullptr;
103 void clear(MachineFunction *mf, SlotIndexes *indexes, LiveIntervals *lis) {
172 SlotIndexes *indexes, LiveIntervals *lis,
lib/CodeGen/LiveDebugVariables.cpp 87 AU.addRequiredTransitive<LiveIntervals>();
200 unsigned SpillOffset, LiveIntervals &LIS,
207 LiveIntervals &LIS);
285 LiveIntervals &LIS);
299 MachineRegisterInfo &MRI, LiveIntervals &LIS);
304 LiveIntervals &LIS, LexicalScopes &LS);
309 LiveIntervals &LIS);
320 void emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS,
362 LiveIntervals &LIS, const TargetInstrInfo &TII);
376 void emitDebugLabel(LiveIntervals &LIS, const TargetInstrInfo &TII);
389 LiveIntervals *LIS;
718 LiveIntervals &LIS) {
764 MachineRegisterInfo &MRI, LiveIntervals &LIS) {
835 LiveIntervals &LIS, LexicalScopes &LS) {
959 LIS = &pass.getAnalysis<LiveIntervals>();
1011 LiveIntervals& LIS) {
1116 LiveIntervals &LIS) {
1147 splitRegister(unsigned OldReg, ArrayRef<unsigned> NewRegs, LiveIntervals &LIS) {
1287 LiveIntervals &LIS, const TargetInstrInfo &TII,
1329 LiveIntervals &LIS,
1337 void UserValue::emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS,
1379 void UserLabel::emitDebugLabel(LiveIntervals &LIS, const TargetInstrInfo &TII) {
lib/CodeGen/LiveDebugVariables.h 45 LiveIntervals &LIS);
lib/CodeGen/LiveIntervals.cpp 61 char &llvm::LiveIntervalsID = LiveIntervals::ID;
945 LiveIntervals& LIS;
954 HMEditor(LiveIntervals& LIS, const MachineRegisterInfo& MRI,
lib/CodeGen/LiveRegMatrix.cpp 49 AU.addRequiredTransitive<LiveIntervals>();
56 LIS = &getAnalysis<LiveIntervals>();
lib/CodeGen/MachineBasicBlock.cpp 888 LiveIntervals *LIS = P.getAnalysisIfAvailable<LiveIntervals>();
888 LiveIntervals *LIS = P.getAnalysisIfAvailable<LiveIntervals>();
lib/CodeGen/MachinePipeliner.cpp 350 SlotIndexes &Slots = *getAnalysis<LiveIntervals>().getSlotIndexes();
385 SwingSchedulerDAG SMS(*this, L, getAnalysis<LiveIntervals>(), RegClassInfo,
lib/CodeGen/MachineScheduler.cpp 221 AU.addRequired<LiveIntervals>();
222 AU.addPreserved<LiveIntervals>();
379 LIS = &getAnalysis<LiveIntervals>();
1687 LiveIntervals *LIS = DAG->getLIS();
lib/CodeGen/MachineVerifier.cpp 226 LiveIntervals *LiveInts;
390 LiveInts = PASS->getAnalysisIfAvailable<LiveIntervals>();
lib/CodeGen/ModuloSchedule.cpp 336 LiveIntervals &LIS) {
1217 LiveIntervals *LIS) {
1251 LiveIntervals *LIS;
1274 LiveIntervals *LIS = nullptr);
1280 LiveIntervals *LIS)
1940 AU.addRequired<LiveIntervals>();
1986 LiveIntervals &LIS = getAnalysis<LiveIntervals>();
1986 LiveIntervals &LIS = getAnalysis<LiveIntervals>();
lib/CodeGen/PHIElimination.cpp 70 LiveIntervals *LIS;
141 AU.addPreserved<LiveIntervals>();
150 LIS = getAnalysisIfAvailable<LiveIntervals>();
lib/CodeGen/RegAllocBase.cpp 58 LiveIntervals &lis,
lib/CodeGen/RegAllocBase.h 67 LiveIntervals *LIS = nullptr;
81 void init(VirtRegMap &vrm, LiveIntervals &lis, LiveRegMatrix &mat);
lib/CodeGen/RegAllocBasic.cpp 176 AU.addRequired<LiveIntervals>();
177 AU.addPreserved<LiveIntervals>();
311 getAnalysis<LiveIntervals>(),
lib/CodeGen/RegAllocGreedy.cpp 610 AU.addRequired<LiveIntervals>();
611 AU.addPreserved<LiveIntervals>();
3230 getAnalysis<LiveIntervals>(),
lib/CodeGen/RegAllocPBQP.cpp 163 void findVRegIntervalsToAlloc(const MachineFunction &MF, LiveIntervals &LIS);
170 MachineFunction &MF, LiveIntervals &LIS, VirtRegMap &VRM,
182 void finalizeAlloc(MachineFunction &MF, LiveIntervals &LIS,
185 void postOptimization(Spiller &VRegSpiller, LiveIntervals &LIS);
194 LiveIntervals &LIS = G.getMetadata().LIS;
311 LiveIntervals &LIS = G.getMetadata().LIS;
537 au.addRequired<LiveIntervals>();
538 au.addPreserved<LiveIntervals>();
556 LiveIntervals &LIS) {
581 LiveIntervals &LIS = G.getMetadata().LIS;
678 MachineFunction &MF, LiveIntervals &LIS,
708 LiveIntervals &LIS = G.getMetadata().LIS;
743 LiveIntervals &LIS,
772 void RegAllocPBQP::postOptimization(Spiller &VRegSpiller, LiveIntervals &LIS) {
790 LiveIntervals &LIS = getAnalysis<LiveIntervals>();
790 LiveIntervals &LIS = getAnalysis<LiveIntervals>();
lib/CodeGen/RegisterCoalescer.cpp 128 LiveIntervals *LIS;
535 AU.addRequired<LiveIntervals>();
536 AU.addPreserved<LiveIntervals>();
2190 LiveIntervals *LIS;
2338 LiveIntervals *lis, const TargetRegisterInfo *TRI, bool SubRangeJoin,
3459 static bool isLocalCopy(MachineInstr *Copy, const LiveIntervals *LIS) {
3682 LIS = &getAnalysis<LiveIntervals>();
lib/CodeGen/RegisterPressure.cpp 237 static const LiveRange *getLiveRange(const LiveIntervals &LIS, unsigned Reg) {
265 const LiveIntervals *lis,
421 static LaneBitmask getLanesWithProperty(const LiveIntervals &LIS,
449 static LaneBitmask getLiveLanesAt(const LiveIntervals &LIS,
580 const LiveIntervals &LIS) {
599 void RegisterOperands::adjustLaneLiveness(const LiveIntervals &LIS,
1225 const LiveIntervals *LIS) {
lib/CodeGen/RenameIndependentSubregs.cpp 56 AU.addRequired<LiveIntervals>();
57 AU.addPreserved<LiveIntervals>();
71 SubRangeInfo(LiveIntervals &LIS, LiveInterval::SubRange &SR,
103 LiveIntervals *LIS;
385 LIS = &getAnalysis<LiveIntervals>();
lib/CodeGen/ScheduleDAGInstrs.cpp 724 LiveIntervals *LIS,
lib/CodeGen/SplitKit.cpp 71 InsertPointAnalysis::InsertPointAnalysis(const LiveIntervals &lis,
151 SplitAnalysis::SplitAnalysis(const VirtRegMap &vrm, const LiveIntervals &lis,
366 LiveIntervals &lis, VirtRegMap &vrm,
lib/CodeGen/SplitKit.h 51 const LiveIntervals &LIS;
63 InsertPointAnalysis(const LiveIntervals &lis, unsigned BBNum);
99 const LiveIntervals &LIS;
168 SplitAnalysis(const VirtRegMap &vrm, const LiveIntervals &lis,
260 LiveIntervals &LIS;
445 SplitEditor(SplitAnalysis &sa, AliasAnalysis &aa, LiveIntervals &lis,
lib/CodeGen/StackSlotColoring.cpp 176 li.weight += LiveIntervals::getSpillWeight(false, true, MBFI, MI);
lib/CodeGen/TwoAddressInstructionPass.cpp 99 LiveIntervals *LIS;
188 AU.addPreserved<LiveIntervals>();
210 static bool isPlainlyKilled(MachineInstr *MI, unsigned Reg, LiveIntervals *LIS);
429 LiveIntervals *LIS) {
472 LiveIntervals *LIS,
1674 LIS = getAnalysisIfAvailable<LiveIntervals>();
lib/CodeGen/VirtRegMap.cpp 181 LiveIntervals *LIS;
225 AU.addRequired<LiveIntervals>();
241 LIS = &getAnalysis<LiveIntervals>();
lib/Target/AArch64/AArch64PBQPRegAlloc.cpp 163 LiveIntervals &LIs = G.getMetadata().LIS;
244 LiveIntervals &LIs = G.getMetadata().LIS;
319 static bool regJustKilledBefore(const LiveIntervals &LIs, unsigned reg,
328 LiveIntervals &LIs = G.getMetadata().LIS;
lib/Target/AMDGPU/GCNNSAReassign.cpp 53 AU.addRequired<LiveIntervals>();
79 LiveIntervals *LIS;
232 LIS = &getAnalysis<LiveIntervals>();
lib/Target/AMDGPU/GCNRegBankReassign.cpp 129 AU.addRequired<LiveIntervals>();
149 LiveIntervals *LIS;
737 LIS = &getAnalysis<LiveIntervals>();
lib/Target/AMDGPU/GCNRegPressure.cpp 37 const LiveIntervals &LIS,
212 const LiveIntervals &LIS) {
258 const LiveIntervals &LIS,
276 const LiveIntervals &LIS,
lib/Target/AMDGPU/GCNRegPressure.h 103 const LiveIntervals &LIS;
109 GCNRPTracker(const LiveIntervals &LIS_) : LIS(LIS_) {}
138 GCNUpwardRPTracker(const LiveIntervals &LIS_) : GCNRPTracker(LIS_) {}
159 GCNDownwardRPTracker(const LiveIntervals &LIS_) : GCNRPTracker(LIS_) {}
189 const LiveIntervals &LIS,
193 const LiveIntervals &LIS,
203 getLiveRegMap(Range &&R, bool After, LiveIntervals &LIS) {
241 const LiveIntervals &LIS) {
247 const LiveIntervals &LIS) {
265 const LiveIntervals &LIS,
lib/Target/AMDGPU/SIFormMemoryClauses.cpp 57 AU.addRequired<LiveIntervals>();
316 LiveIntervals *LIS = &getAnalysis<LiveIntervals>();
316 LiveIntervals *LIS = &getAnalysis<LiveIntervals>();
lib/Target/AMDGPU/SILowerControlFlow.cpp 82 LiveIntervals *LIS = nullptr;
122 AU.addPreserved<LiveIntervals>();
500 LIS = getAnalysisIfAvailable<LiveIntervals>();
lib/Target/AMDGPU/SILowerSGPRSpills.cpp 51 LiveIntervals *LIS = nullptr;
89 LiveIntervals *LIS) {
121 LiveIntervals *LIS) {
lib/Target/AMDGPU/SIMachineScheduler.cpp 311 const LiveIntervals *LIS) {
329 LiveIntervals *LIS = DAG->getLIS();
lib/Target/AMDGPU/SIMachineScheduler.h 458 LiveIntervals *getLIS() { return LIS; }
lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp 63 AU.addRequired<LiveIntervals>();
191 LiveIntervals *LIS) {
303 LiveIntervals *LIS = &getAnalysis<LiveIntervals>();
303 LiveIntervals *LIS = &getAnalysis<LiveIntervals>();
lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp 40 LiveIntervals *LIS;
57 AU.addRequired<LiveIntervals>();
58 AU.addPreserved<LiveIntervals>();
172 LIS = &getAnalysis<LiveIntervals>();
lib/Target/AMDGPU/SIRegisterInfo.cpp 1718 LiveIntervals &LIS) const {
1867 LiveIntervals *LIS) const {
lib/Target/AMDGPU/SIRegisterInfo.h 237 LiveIntervals &LIS) const override;
283 LiveIntervals *LIS) const;
lib/Target/AMDGPU/SIWholeQuadMode.cpp 153 LiveIntervals *LIS;
203 AU.addRequired<LiveIntervals>();
205 AU.addPreserved<LiveIntervals>();
888 LIS = &getAnalysis<LiveIntervals>();
lib/Target/Hexagon/HexagonExpandCondsets.cpp 153 AU.addRequired<LiveIntervals>();
154 AU.addPreserved<LiveIntervals>();
168 LiveIntervals *LIS = nullptr;
1257 LIS = &getAnalysis<LiveIntervals>();
lib/Target/Hexagon/HexagonRegisterInfo.cpp 238 const TargetRegisterClass *NewRC, LiveIntervals &LIS) const {
lib/Target/Hexagon/HexagonRegisterInfo.h 65 const TargetRegisterClass *NewRC, LiveIntervals &LIS) const override;
lib/Target/PowerPC/PPCTLSDynamicCall.cpp 45 LiveIntervals *LIS;
154 LIS = &getAnalysis<LiveIntervals>();
168 AU.addRequired<LiveIntervals>();
169 AU.addPreserved<LiveIntervals>();
lib/Target/PowerPC/PPCVSXFMAMutate.cpp 66 LiveIntervals *LIS;
354 LIS = &getAnalysis<LiveIntervals>();
373 AU.addRequired<LiveIntervals>();
374 AU.addPreserved<LiveIntervals>();
lib/Target/SystemZ/SystemZRegisterInfo.cpp 342 LiveIntervals &LIS) const {
lib/Target/SystemZ/SystemZRegisterInfo.h 93 LiveIntervals &LIS) const override;
lib/Target/WebAssembly/WebAssemblyMemIntrinsicResults.cpp 61 AU.addRequired<LiveIntervals>();
63 AU.addPreserved<LiveIntervals>();
88 LiveIntervals &LIS) {
151 MachineDominatorTree &MDT, LiveIntervals &LIS,
189 auto &LIS = getAnalysis<LiveIntervals>();
189 auto &LIS = getAnalysis<LiveIntervals>();
lib/Target/WebAssembly/WebAssemblyOptimizeLiveIntervals.cpp 42 AU.addRequired<LiveIntervals>();
45 AU.addPreserved<LiveIntervals>();
74 auto &LIS = getAnalysis<LiveIntervals>();
74 auto &LIS = getAnalysis<LiveIntervals>();
lib/Target/WebAssembly/WebAssemblyRegColoring.cpp 43 AU.addRequired<LiveIntervals>();
70 Weight += LiveIntervals::getSpillWeight(MO.isDef(), MO.isUse(), MBFI,
89 LiveIntervals *Liveness = &getAnalysis<LiveIntervals>();
89 LiveIntervals *Liveness = &getAnalysis<LiveIntervals>();
lib/Target/WebAssembly/WebAssemblyRegStackify.cpp 53 AU.addRequired<LiveIntervals>();
56 AU.addPreserved<LiveIntervals>();
102 LiveIntervals &LIS) {
271 const LiveIntervals &LIS) {
288 MachineDominatorTree &MDT, LiveIntervals &LIS) {
404 LiveIntervals &LIS,
474 static void shrinkToUses(LiveInterval &LI, LiveIntervals &LIS) {
485 MachineInstr *Insert, LiveIntervals &LIS,
598 MachineInstr *Insert, LiveIntervals &LIS, WebAssemblyFunctionInfo &MFI,
780 auto &LIS = getAnalysis<LiveIntervals>();
780 auto &LIS = getAnalysis<LiveIntervals>();
unittests/MI/LiveIntervalTest.cpp 74 typedef std::function<void(MachineFunction&,LiveIntervals&)> LiveIntervalTest;
87 LiveIntervals &LIS = getAnalysis<LiveIntervals>();
87 LiveIntervals &LIS = getAnalysis<LiveIntervals>();
95 AU.addRequired<LiveIntervals>();
96 AU.addPreserved<LiveIntervals>();
120 static void testHandleMove(MachineFunction &MF, LiveIntervals &LIS,
usr/include/c++/7.4.0/bits/move.h 72 constexpr _Tp&&
83 constexpr _Tp&&
usr/include/c++/7.4.0/bits/std_function.h 314 _M_invoke(const _Any_data& __functor, _ArgTypes&&... __args)
628 using _Invoker_type = _Res (*)(const _Any_data&, _ArgTypes&&...);
usr/include/c++/7.4.0/type_traits 1633 { typedef _Tp type; };
1659 { typedef _Tp&& type; };