reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

include/llvm/CodeGen/ScheduleDAG.h
  447       return NumPredsLeft == 0;
lib/CodeGen/MachineScheduler.cpp
  627   if (SuccSU->NumPredsLeft == 0) {
  639   --SuccSU->NumPredsLeft;
  640   if (SuccSU->NumPredsLeft == 0 && SuccSU != &ExitSU)
  835     if (!SU.NumPredsLeft)
 2923     bool AtBoundary = isTop ? !SU->NumSuccsLeft : !SU->NumPredsLeft;
lib/CodeGen/PostRASchedulerList.cpp
  461   if (SuccSU->NumPredsLeft == 0) {
  468   --SuccSU->NumPredsLeft;
  483   if (SuccSU->NumPredsLeft == 0 && SuccSU != &ExitSU)
  537     if (!SUnits[i].NumPredsLeft && !SUnits[i].isAvailable) {
lib/CodeGen/ScheduleDAG.cpp
  151       assert(NumPredsLeft < std::numeric_limits<unsigned>::max() &&
  153       ++NumPredsLeft;
  199       assert(NumPredsLeft > 0 && "NumPredsLeft will underflow!");
  200       --NumPredsLeft;
  342   dbgs() << "  # preds left       : " << NumPredsLeft << "\n";
  424       if (SUnit.NumPredsLeft != 0) {
lib/CodeGen/SelectionDAG/ScheduleDAGVLIW.cpp
  117   if (SuccSU->NumPredsLeft == 0) {
  126   --SuccSU->NumPredsLeft;
  132   if (SuccSU->NumPredsLeft == 0 && SuccSU != &ExitSU) {
lib/Target/AMDGPU/GCNMinRegStrategy.cpp
   89     NumPreds[I] = SUnits[I].NumPredsLeft;
lib/Target/AMDGPU/SIMachineScheduler.cpp
  294     if (!SU->NumPredsLeft)
  412     if (!SU->NumPredsLeft)
  433               SU->NumPredsLeft == 0);
  460   ++SuccSU->NumPredsLeft;
  471   if (SuccSU->NumPredsLeft == 0) {
  479   --SuccSU->NumPredsLeft;
  494     if (SuccSU->NumPredsLeft == 0 && InOrOutBlock)
  501   assert (!SU->NumPredsLeft);
 1901     SUnits[i].NumPredsLeft = SUnitsLinksBackup[i].NumPredsLeft;
 1901     SUnits[i].NumPredsLeft = SUnitsLinksBackup[i].NumPredsLeft;
lib/Target/Hexagon/HexagonHazardRecognizer.cpp
  145           S.getSUnit()->NumPredsLeft == 1) {
lib/Target/Hexagon/HexagonMachineScheduler.cpp
  522   if (SU->NumPredsLeft == 0)