reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
583 return getNodeDesc(SU->getNode());
lib/CodeGen/SelectionDAG/ResourcePriorityQueue.cpp74 const SDNode *ScegN = PredSU->getNode(); 112 const SDNode *ScegN = SuccSU->getNode(); 240 if (!SU || !SU->getNode()) 245 if (SU->getNode()->getGluedNode()) 250 if (SU->getNode()->isMachineOpcode()) 251 switch (SU->getNode()->getMachineOpcode()) { 254 SU->getNode()->getMachineOpcode()))) 285 if (!isResourceAvailable(SU) || SU->getNode()->getGluedNode()) { 290 if (SU->getNode() && SU->getNode()->isMachineOpcode()) { 290 if (SU->getNode() && SU->getNode()->isMachineOpcode()) { 291 switch (SU->getNode()->getMachineOpcode()) { 294 SU->getNode()->getMachineOpcode())); 322 if (!SU || !SU->getNode() || !SU->getNode()->isMachineOpcode()) 322 if (!SU || !SU->getNode() || !SU->getNode()->isMachineOpcode()) 326 for (unsigned i = 0, e = SU->getNode()->getNumValues(); i != e; ++i) { 327 MVT VT = SU->getNode()->getSimpleValueType(i); 334 for (unsigned i = 0, e = SU->getNode()->getNumOperands(); i != e; ++i) { 335 const SDValue &Op = SU->getNode()->getOperand(i); 356 if (!SU || !SU->getNode() || !SU->getNode()->isMachineOpcode()) 356 if (!SU || !SU->getNode() || !SU->getNode()->isMachineOpcode()) 434 for (SDNode *N = SU->getNode(); N; N = N->getGluedNode()) { 469 const SDNode *ScegN = SU->getNode(); 536 for (SDNode *N = SU->getNode(); N; N = N->getGluedNode())lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
211 if (SU->getNode()->getGluedNode()) 214 SDNode *N = SU->getNode(); 244 unsigned OldNumVals = SU->getNode()->getNumValues(); 246 DAG->ReplaceAllUsesOfValueWith(SDValue(SU->getNode(), i), SDValue(N, i)); 247 DAG->ReplaceAllUsesOfValueWith(SDValue(SU->getNode(), OldNumVals-1), 285 else if (Pred.getSUnit()->getNode() && 286 Pred.getSUnit()->getNode()->isOperandOf(LoadNode)) 481 for (SDNode *Node = SU->getNode(); Node; Node = Node->getGluedNode()) { 572 MVT VT = getPhysicalRegisterVT(LRDef->getNode(), Reg, TII);lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
579 for (SDNode *Node = SU->getNode(); Node; Node = Node->getGluedNode()) 698 if (!SU->getNode()) 701 switch (SU->getNode()->getOpcode()) { 703 assert(SU->getNode()->isMachineOpcode() && 784 for (const SDNode *SUNode = SU->getNode(); SUNode; 809 if (SU->getNode() && SU->getNode()->isMachineOpcode()) 809 if (SU->getNode() && SU->getNode()->isMachineOpcode()) 855 for (const SDNode *SUNode = SU->getNode(); SUNode; 872 for (const SDNode *SUNode = SU->getNode(); SUNode; 971 for (const SDNode *SUNode = SU->getNode(); SUNode; 981 SDNode *N = SU->getNode(); 997 unsigned OldNumVals = SU->getNode()->getNumValues(); 1052 DAG->ReplaceAllUsesOfValueWith(SDValue(SU->getNode(), i), SDValue(N, i)); 1053 DAG->ReplaceAllUsesOfValueWith(SDValue(SU->getNode(), OldNumVals - 1), 1135 SDNode *N = SU->getNode(); 1177 N = SU->getNode(); 1361 for (SDNode *Node = SU->getNode(); Node; Node = Node->getGluedNode()) { 1399 SDNode *Gen = LiveRegGens[CallResource]->getNode(); 1556 MVT VT = getPhysicalRegisterVT(LRDef->getNode(), Reg, TII); 1795 if (!SU->getNode()) return 0; 1797 return SU->getNode()->getIROrder(); 2032 unsigned Opc = SU->getNode() ? SU->getNode()->getOpcode() : 0; 2032 unsigned Opc = SU->getNode() ? SU->getNode()->getOpcode() : 0; 2109 const SDNode *N = SU->getNode(); 2143 if (PredSU->getNode()->isMachineOpcode()) 2155 const SDNode *N = SU->getNode(); 2176 if (!SU->getNode()) 2245 const SDNode *N = SU->getNode(); 2269 const SDNode *PN = PredSU->getNode(); 2334 if (Succ.getSUnit()->getNode() && 2335 Succ.getSUnit()->getNode()->getOpcode() == ISD::CopyToReg) 2361 if (PredSU->getNode() && 2362 PredSU->getNode()->getOpcode() == ISD::CopyFromReg) { 2364 cast<RegisterSDNode>(PredSU->getNode()->getOperand(1))->getReg(); 2383 if (SuccSU->getNode() && SuccSU->getNode()->getOpcode() == ISD::CopyToReg) { 2383 if (SuccSU->getNode() && SuccSU->getNode()->getOpcode() == ISD::CopyToReg) { 2385 cast<RegisterSDNode>(SuccSU->getNode()->getOperand(1))->getReg(); 2433 assert(PredSU->getNode()->getOpcode() == ISD::CopyFromReg && 2450 Pred.getSUnit()->getNode()->getOpcode() == ISD::CopyFromReg) { 2549 unsigned RNumVals = right->getNode()->getNumValues(); 2553 unsigned LNumVals = left->getNode()->getNumValues(); 2711 unsigned Opc = SU->getNode() ? SU->getNode()->getOpcode() : 0; 2711 unsigned Opc = SU->getNode() ? SU->getNode()->getOpcode() : 0; 2818 unsigned Opc = SU->getNode()->getMachineOpcode(); 2824 SDNode *DU = SU->getNode()->getOperand(i).getNode(); 2842 = TII->get(SU->getNode()->getMachineOpcode()).getImplicitDefs(); 2843 const uint32_t *RegMask = getNodeRegMask(SU->getNode()); 2876 SDNode *N = SuccSU->getNode(); 2880 for (const SDNode *SUNode = SU->getNode(); SUNode; 2953 if (SDNode *N = SU.getNode()) 2963 SDNode *PredND = Pred.getSUnit()->getNode(); 3000 if (SDNode *N = SU.getNode()) 3058 SDNode *Node = SU.getNode(); 3059 if (!Node || !Node->isMachineOpcode() || SU.getNode()->getGluedNode()) 3070 SDNode *DU = SU.getNode()->getOperand(j).getNode(); 3092 SuccSU->getNode()->isMachineOpcode() && 3093 SuccSU->getNode()->getMachineOpcode() == 3097 if (!SuccSU->getNode() || !SuccSU->getNode()->isMachineOpcode()) 3097 if (!SuccSU->getNode() || !SuccSU->getNode()->isMachineOpcode()) 3107 unsigned SuccOpc = SuccSU->getNode()->getMachineOpcode();lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
90 SUnit *SU = newSUnit(Old->getNode()); 424 for (const SDNode *SUNode = SU->getNode(); SUNode; 445 SDNode *MainNode = SU->getNode(); 461 for (SDNode *N = SU->getNode(); N; N = N->getGluedNode()) { 577 : SchedDAG(SD), Node(SU->getNode()), DefIdx(0), NodeNumDefs(0) { 609 SDNode *N = SU->getNode(); 637 for (SDNode *N = SU->getNode(); N; N = N->getGluedNode()) 674 if (!SU.getNode()) { 679 SU.getNode()->dump(DAG); 682 for (SDNode *N = SU.getNode()->getGluedNode(); N; N = N->getGluedNode()) 695 if (EntrySU.getNode() != nullptr) 699 if (ExitSU.getNode() != nullptr) 897 if (!SU->getNode()) { 904 for (SDNode *N = SU->getNode()->getGluedNode(); N; N = N->getGluedNode()) 920 EmitNode(SU->getNode(), SU->OrigNode != SU, SU->isCloned, VRBaseMap); 923 ProcessSourceNode(SU->getNode(), DAG, Emitter, VRBaseMap, Orders, Seen, 926 if (MDNode *MD = DAG->getHeapAllocSite(SU->getNode())) {lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp
278 if (SU->getNode()) { 280 for (SDNode *N = SU->getNode(); N; N = N->getGluedNode())