reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
185 inline uint64_t getConstantOperandVal(unsigned i) const;
13019 const bool N0IsTrunc = N0.getConstantOperandVal(1) == 1; 13079 && N0.getConstantOperandVal(1) == 1) { 16630 unsigned OtherElt = InVec.getConstantOperandVal(2); 17259 unsigned ExtIndex = N->getOperand(i).getConstantOperandVal(1); 17337 ShufMask[i] = Extract.getConstantOperandVal(1); 17452 unsigned Index = N->getOperand(i).getConstantOperandVal(1); 17807 int ExtIdx = Op.getConstantOperandVal(1); 18240 V.getConstantOperandVal(1)) && 19356 unsigned OtherIdx = N0.getConstantOperandVal(2);lib/CodeGen/SelectionDAG/SelectionDAG.cpp
3140 const unsigned Index = Op.getConstantOperandVal(1); 3753 const int rIndex = Items - 1 - Op.getConstantOperandVal(1); 4217 Op.getConstantOperandVal(1) != IdentityIndex) { 4644 Operand.getConstantOperandVal(1) == 0 && 9281 FrameOffset = Ptr.getConstantOperandVal(1);lib/Target/AArch64/AArch64ISelLowering.cpp
4741 isPowerOf2_64(LHS.getConstantOperandVal(1))) { 4743 uint64_t Mask = LHS.getConstantOperandVal(1); 4757 isPowerOf2_64(LHS.getConstantOperandVal(1))) { 4759 uint64_t Mask = LHS.getConstantOperandVal(1); 5449 unsigned Align = Op.getConstantOperandVal(3); 8484 uint64_t ShiftAmount = Base.getOperand(1).getConstantOperandVal(1);lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
2287 ImmOffset = BaseOffset.getConstantOperandVal(1);
lib/Target/AMDGPU/SIISelLowering.cpp5994 Op.getConstantOperandVal(2) == 0 && 5995 Op.getConstantOperandVal(3) == ICmpInst::Predicate::ICMP_NE) 8283 Sel = (LHS.getConstantOperandVal(2) & Sel) | (~Sel & 0x0c0c0c0c); 8454 Sel |= LHS.getConstantOperandVal(2); 9813 LHS.getConstantOperandVal(1) != LHS.getConstantOperandVal(2) && 9813 LHS.getConstantOperandVal(1) != LHS.getConstantOperandVal(2) && 9820 uint64_t CT = LHS.getConstantOperandVal(1); 9821 uint64_t CF = LHS.getConstantOperandVal(2);lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
1734 Val.getConstantOperandVal(1) > MaxAmount) 1761 Val.getConstantOperandVal(1) > 127) 1802 return (unsigned) Val.getConstantOperandVal(1); 1814 V.getConstantOperandVal(i) % (1ULL << Amount) == 0) { 1815 uint64_t NewConst = V.getConstantOperandVal(i) >> Amount; 1819 return (Amount == V.getConstantOperandVal(1)); 1830 V.getConstantOperandVal(i) % ((uint64_t)1 << Power) == 0) { 1831 uint64_t NewConst = V.getConstantOperandVal(i) >> Power; 1840 uint64_t ShiftAmount = V.getConstantOperandVal(1); 1943 Op0.getConstantOperandVal(1) < 4) || 1945 Op1.getConstantOperandVal(1) < 4)))lib/Target/PowerPC/PPCISelDAGToDAG.cpp
1229 unsigned RotAmt = V.getConstantOperandVal(1); 1241 unsigned ShiftAmt = V.getConstantOperandVal(1); 1256 unsigned ShiftAmt = V.getConstantOperandVal(1); 1271 uint64_t Mask = V.getConstantOperandVal(1); 2611 assert(LoweredLogical.getConstantOperandVal(1) == 1 && 5276 uint64_t PM = O.getConstantOperandVal(2); 5277 uint64_t PAlt = O.getConstantOperandVal(3); 5290 O.getConstantOperandVal(1) != 0) { 5304 if (Op0.getConstantOperandVal(1) != Bits-8) 5323 uint64_t ULim = O.getConstantOperandVal(1); 5349 if (Op.getConstantOperandVal(1) != (UINT64_C(0xFF) << (8*b))) 5367 if (Op.getConstantOperandVal(1) != Bits-8) 6074 Op32.getConstantOperandVal(2) <= Op32.getConstantOperandVal(3)) { 6074 Op32.getConstantOperandVal(2) <= Op32.getConstantOperandVal(3)) { 6090 if (!isUInt<15>(Op32.getConstantOperandVal(0))) 6116 Op32.getConstantOperandVal(3) <= Op32.getConstantOperandVal(4)) { 6116 Op32.getConstantOperandVal(3) <= Op32.getConstantOperandVal(4)) { 6151 if (!isUInt<15>(Op32.getConstantOperandVal(1))) 6189 bool Op1OK = isUInt<15>(Op32.getConstantOperandVal(1)); 6241 if (ISR.getConstantOperandVal(2) != PPC::sub_32) 6463 Base.getConstantOperandVal(1) % 4 != 0))lib/Target/PowerPC/PPCISelLowering.cpp
5656 int64_t FrameSize = CallSeqStart.getConstantOperandVal(1);
lib/Target/Sparc/SparcISelLowering.cpp2650 uint64_t depth = Op.getConstantOperandVal(0); 2668 uint64_t depth = Op.getConstantOperandVal(0);lib/Target/SystemZ/SystemZISelLowering.cpp
4167 unsigned Index = ShuffleOp.getConstantOperandVal(1);
lib/Target/WebAssembly/WebAssemblyISelLowering.cpp 1079 if (Op.getConstantOperandVal(0) > 0)
lib/Target/X86/X86ISelDAGToDAG.cpp1130 N0.getConstantOperandVal(1) != X86::sub_8bit) 1575 int ScaleLog = 8 - Shift.getConstantOperandVal(1); 1643 unsigned ShiftAmt = Shift.getConstantOperandVal(1); 1710 unsigned ShiftAmt = Shift.getConstantOperandVal(1); 1807 unsigned ShiftAmt = Shift.getConstantOperandVal(1); 1961 uint64_t Mask = And.getConstantOperandVal(1) >> N.getConstantOperandVal(1); 1961 uint64_t Mask = And.getConstantOperandVal(1) >> N.getConstantOperandVal(1); 2111 uint64_t Mask = N.getConstantOperandVal(1);lib/Target/X86/X86ISelLowering.cpp
6213 unsigned BaseIdx = Op.getConstantOperandVal(2); 6234 unsigned BaseIdx = Op.getConstantOperandVal(1); 6556 N0.getConstantOperandVal(1) == 0) 6983 uint64_t InsertIdx = N.getConstantOperandVal(2); 6988 uint64_t ExtractIdx = Sub.getConstantOperandVal(1); 7062 unsigned SrcIdx = SrcExtract.getConstantOperandVal(1); 7080 uint64_t InIdx = N.getConstantOperandVal(2); 7102 uint64_t ExIdx = InScl.getConstantOperandVal(1); 7149 uint64_t ShiftVal = N.getConstantOperandVal(1); 7600 EltMaskIdx = Elt.getConstantOperandVal(1); 7691 Offset = Ptr.getConstantOperandVal(1); 7760 uint64_t Idx = Elt.getConstantOperandVal(1); 7774 uint64_t Idx = Elt.getConstantOperandVal(1); 9003 unsigned ExtIndex0 = Op0.getConstantOperandVal(1); 9004 unsigned ExtIndex1 = Op1.getConstantOperandVal(1); 18403 Mask[0] = Extract.getConstantOperandVal(1); 19689 unsigned LExtIndex = LHS.getConstantOperandVal(1); 19690 unsigned RExtIndex = RHS.getConstantOperandVal(1); 21037 X86::CondCode CCode = (X86::CondCode)Op0.getConstantOperandVal(0); 21329 unsigned CondCode = Cond.getConstantOperandVal(0); 22073 (X86::CondCode)Cond.getOperand(0).getConstantOperandVal(0); 22091 (X86::CondCode)Cond.getOperand(1).getConstantOperandVal(0); 22104 (X86::CondCode)Cond.getOperand(0).getConstantOperandVal(0); 22204 unsigned Align = Op.getConstantOperandVal(2); 22345 unsigned Align = Op.getConstantOperandVal(3); 22777 unsigned IntNo = Op.getConstantOperandVal(0); 23188 unsigned CondVal = Op.getConstantOperandVal(3); 23278 uint64_t Imm = Op.getConstantOperandVal(2); 23946 unsigned IntNo = Op.getConstantOperandVal(1); 24187 unsigned Depth = Op.getConstantOperandVal(0); 24239 unsigned Depth = Op.getConstantOperandVal(0); 26670 static_cast<AtomicOrdering>(Op.getConstantOperandVal(1)); 26672 static_cast<SyncScope::ID>(Op.getConstantOperandVal(2)); 31512 Op.getConstantOperandVal(1)); 32834 Offset += Src.getConstantOperandVal(1); 33549 unsigned BlendMask = N.getConstantOperandVal(2); 34329 unsigned C1 = Src.getConstantOperandVal(1); 34368 unsigned C1 = Src.getConstantOperandVal(1); 34604 DecodeVPERMMask(NumElts, Op.getConstantOperandVal(1), Mask); 37415 assert(X86::CondCode(SetCC.getConstantOperandVal(0)) == X86::COND_B && 37420 CC = X86::CondCode(SetCC.getConstantOperandVal(0)); 37458 CC = X86::CondCode(SetCC.getConstantOperandVal(2)); 37527 uint64_t CarryCC = Carry.getConstantOperandVal(0); 38691 enum X86::CondCode cc0 = (enum X86::CondCode)N0.getConstantOperandVal(0); 38692 enum X86::CondCode cc1 = (enum X86::CondCode)N1.getConstantOperandVal(0); 39265 unsigned Idx = N->getOperand(0).getConstantOperandVal(1); 43565 X86::CondCode CC = (X86::CondCode)Y.getConstantOperandVal(0); 44430 uint64_t Idx2Val = SubVec.getConstantOperandVal(2); 44463 int ExtIdxVal = SubVec.getConstantOperandVal(1);