reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Declarations

include/llvm/CodeGen/SelectionDAGNodes.h
  191   inline unsigned getMachineOpcode() const;

References

lib/CodeGen/SelectionDAG/InstrEmitter.cpp
  269       Op.getMachineOpcode() == TargetOpcode::IMPLICIT_DEF) {
  997         SrcVal.getMachineOpcode() == TargetOpcode::IMPLICIT_DEF) {
lib/Target/AMDGPU/R600ISelLowering.cpp
 2089   switch (Src.getMachineOpcode()) {
 2168     if (Src.getMachineOpcode() == R600::MOV_IMM_F32) {
lib/Target/AMDGPU/SIISelLowering.cpp
10320          Src0.getMachineOpcode() != AMDGPU::IMPLICIT_DEF) &&
10337         Src0.getMachineOpcode() == AMDGPU::IMPLICIT_DEF) {
10339           Src1.getMachineOpcode() != AMDGPU::IMPLICIT_DEF)
10342                Src2.getMachineOpcode() != AMDGPU::IMPLICIT_DEF)
10345         assert(Src1.getMachineOpcode() == AMDGPU::IMPLICIT_DEF);
10367         && VDstIn.getMachineOpcode() == AMDGPU::IMPLICIT_DEF)
lib/Target/Hexagon/HexagonISelLowering.h
  359         return Op.getMachineOpcode() == TargetOpcode::IMPLICIT_DEF;
lib/Target/PowerPC/PPCISelDAGToDAG.cpp
 2580   bool IsBitwiseNegate = LoweredLogical.getMachineOpcode() == PPC::XORI8;
 2591       LoweredLogical.getOperand(0).getMachineOpcode() == PPC::INSERT_SUBREG)
 2603   uint16_t NonRecOpc = OpToConvToRecForm.getMachineOpcode();
 5664           if (Op.getMachineOpcode() == PPC::CRSET)
 5666           else if (Op.getMachineOpcode() == PPC::CRUNSET)
 5668           else if (Op.getMachineOpcode() == PPC::CRNOR &&
 5691           if (Op.getMachineOpcode() == PPC::CRSET)
 5693           else if (Op.getMachineOpcode() == PPC::CRUNSET)
 5695           else if (Op.getMachineOpcode() == PPC::CRNOR &&
 6072   if ((Op32.getMachineOpcode() == PPC::RLWINM ||
 6073        Op32.getMachineOpcode() == PPC::RLWNM) &&
 6080   if (Op32.getMachineOpcode() == PPC::SLW ||
 6081       Op32.getMachineOpcode() == PPC::SRW) {
 6088   if (Op32.getMachineOpcode() == PPC::LI ||
 6089       Op32.getMachineOpcode() == PPC::LIS) {
 6098   if (Op32.getMachineOpcode() == PPC::LHBRX ||
 6099       Op32.getMachineOpcode() == PPC::LWBRX) {
 6105   if (Op32.getMachineOpcode() == PPC::CNTLZW ||
 6106       Op32.getMachineOpcode() == PPC::CNTTZW) {
 6115   if (Op32.getMachineOpcode() == PPC::RLWIMI &&
 6129   if (Op32.getMachineOpcode() == PPC::OR ||
 6130       Op32.getMachineOpcode() == PPC::SELECT_I4) {
 6131     unsigned B = Op32.getMachineOpcode() == PPC::SELECT_I4 ? 1 : 0;
 6146   if (Op32.getMachineOpcode() == PPC::ORI ||
 6147       Op32.getMachineOpcode() == PPC::ORIS) {
 6161   if (Op32.getMachineOpcode() == PPC::AND) {
 6184   if (Op32.getMachineOpcode() == PPC::ANDIo ||
 6185       Op32.getMachineOpcode() == PPC::ANDISo) {
 6235         ISR.getMachineOpcode() != TargetOpcode::INSERT_SUBREG)
 6246         IDef.getMachineOpcode() != TargetOpcode::IMPLICIT_DEF)
 6449     switch (Base.getMachineOpcode()) {
 6498         if (Base.getMachineOpcode() != PPC::ADDItocL)
 6502             HBase.getMachineOpcode() != PPC::ADDIStocHA8)
lib/Target/RISCV/RISCVISelDAGToDAG.cpp
  252     if (!Base.isMachineOpcode() || Base.getMachineOpcode() != RISCV::ADDI)
lib/Target/X86/X86ISelDAGToDAG.cpp
 1129       N0.getMachineOpcode() != TargetOpcode::EXTRACT_SUBREG ||
 1137   if (!N00.isMachineOpcode() || N00.getMachineOpcode() != ExpectedOpc)
 1182       unsigned N0Opc = And.getMachineOpcode();
 1230       unsigned N0Opc = And.getMachineOpcode();
 1267     switch (Move.getMachineOpcode()) {
 1289         In.getMachineOpcode() <= TargetOpcode::GENERIC_OP_END)
 1294     uint64_t TSFlags = getInstrInfo()->get(In.getMachineOpcode()).TSFlags;