|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
include/llvm/CodeGen/LiveInterval.h 510 return beginIndex() > Start.getBaseIndex() &&
534 const_iterator I = find(Idx.getBaseIndex());
546 if (I->start <= Idx.getBaseIndex()) {
559 if (EarlyVal->def == Idx.getBaseIndex())
579 if (Indexes->getNextNonNullIndex(S.start).getBaseIndex() <
580 S.end.getBaseIndex())
lib/CodeGen/InlineSpiller.cpp 553 VNInfo *ParentVNI = VirtReg.getVNInfoAt(UseIdx.getBaseIndex());
lib/CodeGen/LiveDebugVariables.cpp 1241 Idx = Idx.getBaseIndex();
lib/CodeGen/LiveIntervals.cpp 1048 LiveRange::iterator OldIdxIn = LR.find(OldIdx.getBaseIndex());
1075 LR.advanceTo(Next, NewIdx.getBaseIndex());
1221 LiveRange::iterator OldIdxIn = LR.find(OldIdx.getBaseIndex());
1287 assert(NewIdxIn == LR.find(NewIdx.getBaseIndex()));
1639 assert(VNI->def.getBaseIndex() == Pos.getBaseIndex());
1639 assert(VNI->def.getBaseIndex() == Pos.getBaseIndex());
1646 if (SVNI->def.getBaseIndex() == Pos.getBaseIndex())
1646 if (SVNI->def.getBaseIndex() == Pos.getBaseIndex())
lib/CodeGen/RegAllocGreedy.cpp 2160 BI.LiveIn ? BI.FirstInstr.getBaseIndex() : BI.FirstInstr;
2193 if (Uses[Gap+1].getBaseIndex() >= IntI.stop())
2217 if (Uses[Gap+1].getBaseIndex() >= I->end)
lib/CodeGen/RegisterCoalescer.cpp 961 if (S->start.getBaseIndex() == CopyIdx.getBaseIndex())
961 if (S->start.getBaseIndex() == CopyIdx.getBaseIndex())
lib/CodeGen/RegisterPressure.cpp 623 Pos.getBaseIndex());
1257 Pos.getBaseIndex(), LaneBitmask::getNone(),
lib/CodeGen/RenameIndependentSubregs.cpp 190 : Pos.getBaseIndex();
224 : Pos.getBaseIndex();
lib/CodeGen/SplitKit.cpp 695 Idx = Idx.getBaseIndex();
794 Idx = Idx.getBaseIndex();
1662 LeaveBefore.getBaseIndex() > EnterAfter.getBoundaryIndex())) {
1825 if (!EnterAfter || EnterAfter < BI.FirstInstr.getBaseIndex()) {
lib/CodeGen/VirtRegMap.cpp 473 SlotIndex BeforeMIUses = MIIndex.getBaseIndex();
lib/Target/AMDGPU/GCNRegPressure.cpp 225 auto SI = LIS.getInstructionIndex(*MO.getParent()).getBaseIndex();
374 SlotIndex SI = LIS.getInstructionIndex(*NextMI).getBaseIndex();
474 const auto &SI = LIS.getInstructionIndex(*LastTrackedMI).getBaseIndex();
lib/Target/AMDGPU/GCNRegPressure.h 209 Indexes.push_back(After ? SI.getDeadSlot() : SI.getBaseIndex());
248 return getLiveRegs(LIS.getInstructionIndex(MI).getBaseIndex(), LIS,
lib/Target/AMDGPU/SIWholeQuadMode.cpp 599 SlotIndex Next = S->start.getBaseIndex();
604 SlotIndex Next = S->end.getNextIndex().getBaseIndex();
lib/Target/Hexagon/HexagonRegisterInfo.cpp 256 for (SlotIndex I = S.start.getBaseIndex(), E = S.end.getBaseIndex();
256 for (SlotIndex I = S.start.getBaseIndex(), E = S.end.getBaseIndex();