reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
177 return a == b;
include/llvm/CodeGen/LiveInterval.h189 return start == Other.start && end == Other.end; 189 return start == Other.start && end == Other.end; 559 if (EarlyVal->def == Idx.getBaseIndex())lib/CodeGen/InlineSpiller.cpp
376 assert(VNI && VNI->def == Idx.getRegSlot() && "Not defined by copy"); 463 assert(DstVNI->def == Idx.getRegSlot() && "Wrong copy def slot");lib/CodeGen/LiveDebugVariables.cpp
372 return Label == L && dl->getInlinedAt() == IA && loc == Index; 798 assert(DstVNI && DstVNI->def == Idx.getRegSlot() && "Bad copy value"); 1247 if (Idx == Start) {lib/CodeGen/LiveInterval.cpp
90 assert((!ForVNI || ForVNI->def == Def) && 102 assert(S->valno->def == S->start && "Inconsistent existing value def"); 593 if (I->start == Start) { 594 if (I->end == End) { 617 if (I->end == End) { 674 if (OutIt->valno == nextValNo && OutIt->end == I->start) { 772 if (Prev->valno == V2 && Prev->end == S->start) { 790 if (I->start == S->end && I->valno == V2) { 1070 if (I->end == std::next(I)->start) 1162 if (A.end == B.start)lib/CodeGen/LiveIntervals.cpp
565 if (Idx == LastIdx) 800 if (N != LI.end() && N->start == RI->end) 1108 assert(OldIdxVNI->def == OldIdxOut->start && "Inconsistent def"); 1258 assert(OldIdxVNI->def == OldIdxOut->start && "Inconsistent def"); 1388 assert(RI != LIS.RegMaskSlots.end() && *RI == OldIdx.getRegSlot() && 1639 assert(VNI->def.getBaseIndex() == Pos.getBaseIndex()); 1646 if (SVNI->def.getBaseIndex() == Pos.getBaseIndex())lib/CodeGen/MachineVerifier.cpp
2501 if (S.end == LiveInts->getMBBEndIdx(EndMBB)) 2506 S.start == VNI->def && S.end == VNI->def.getDeadSlot()) 2506 S.start == VNI->def && S.end == VNI->def.getDeadSlot()) 2605 if (S.start == VNI->def && !VNI->isPHIDef()) { 2631 VNI->def == LiveInts->getMBBStartIdx(&*MFI);lib/CodeGen/RegisterCoalescer.cpp
669 bool RecomputeLiveRange = AS->end == CopyIdx; 673 if (SS != S.end() && SS->end == CopyIdx) { 771 assert(BValNo != nullptr && BValNo->def == CopyIdx); 899 assert(DVNI->def == DefIdx); 906 assert(SubBValNo->def == CopyIdx); 961 if (S->start.getBaseIndex() == CopyIdx.getBaseIndex()) 2478 return Orig0->def == Orig1->def && Reg0 == Reg1; 3046 ValueOut->def == Def))) { 3081 if (VNI->def == Def)lib/CodeGen/RegisterPressure.cpp
1260 return S != nullptr && S->end == Pos.getRegSlot();
lib/CodeGen/SplitKit.cpp142 if (LIP == LIS.getMBBEndIdx(&MBB)) 257 assert(LVI->start == LVI->valno->def && "Dangling Segment start"); 258 assert(LVI->start == BI.FirstInstr && "First instr should be a def"); 289 assert(LVI->start == LVI->valno->def && "Dangling Segment start"); 302 if (LVI->end == Stop && ++LVI == LVE) 348 return I->start == Idx; 351 return I != Orig.begin() && (--I)->end == Idx; 429 if (PV != nullptr && PV->def == Def) 1037 if (VNI->def == ParentVNI->def) { 1105 if (!Dom.first || Dom.second == VNI->def || 1197 if (BlockStart == ParentVNI->def) {lib/CodeGen/TwoAddressInstructionPass.cpp
1648 if (I->end == UseIdx)
lib/Target/AMDGPU/SIWholeQuadMode.cpp 616 assert(Idx == LIS->getMBBEndIdx(&MBB));
lib/Target/Hexagon/HexagonExpandCondsets.cpp 349 return F != S.end() && I->end == F->end;