reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
264 if (Pos >= endIndex()) 272 if (Pos >= endIndex()) 389 return index >= endIndex();lib/CodeGen/InterferenceCache.cpp
173 if (StartI >= Stop) 186 if (StartI >= Stop) 221 if (!I.valid() || I.start() >= Stop) 224 bool Backup = !I.valid() || I.start() >= Stop; 238 if (I == LR->end() || I->start >= Stop) 241 bool Backup = I == LR->end() || I->start >= Stop;lib/CodeGen/LiveInterval.cpp
165 for (; MergeTo != segments().end() && NewEnd >= MergeTo->end; ++MergeTo) 205 if (MergeTo->end >= NewStart && MergeTo->valno == ValNo) { 228 if (B->start <= Start && B->end >= Start) { 257 assert(I->start >= End && 354 if (empty() || Pos >= endIndex()) 463 assert(J->end >= I->start); 1212 if (ReadI->end >= Seg.end)lib/CodeGen/LiveIntervals.cpp
741 if (I == RURange.end() || I->start >= RI->end) 769 if (I == SR.end() || I->start >= RI->end) 912 assert(*SlotI >= LiveI->start);lib/CodeGen/RegAllocGreedy.cpp
1234 if (Intf.last() >= SA->getLastSplitPoint(BC.Number)) { 1296 if (Intf.last() >= SA->getLastSplitPoint(Number)) 2193 if (Uses[Gap+1].getBaseIndex() >= IntI.stop()) 2217 if (Uses[Gap+1].getBaseIndex() >= I->end)lib/CodeGen/RegisterCoalescer.cpp
700 for (; BI != IntB.end() && ASeg.end >= BI->start; ++BI) { 2707 if (OtherLRQ.endPoint() >= Indexes->getMBBEndIdx(MBB)) 2797 if (End >= MBBEnd) { 2811 if (++OtherI == Other.LR.end() || OtherI->start >= MBBEnd)lib/CodeGen/RegisterPressure.cpp
1232 if (InstSlot >= PriorUseIdx && InstSlot < NextUseIdx) {
lib/CodeGen/SplitKit.cpp236 if (UseI == UseE || *UseI >= Stop) { 246 assert(BI.FirstInstr >= Start); 266 if (++LVI == LVE || LVI->start >= Stop) { 872 if (!AssignI.valid() || AssignI.start() >= Def) 1202 if (End >= BlockEnd) 1614 assert((!EnterAfter || EnterAfter >= Start) && "Interference before block"); 1641 assert((!EnterAfter || Idx >= EnterAfter) && "Interference"); 1680 assert((!EnterAfter || Idx >= EnterAfter) && "Interference"); 1695 assert((!EnterAfter || Idx >= EnterAfter) && "Interference"); 1718 if (!BI.LiveOut && (!LeaveBefore || LeaveBefore >= BI.LastInstr)) { 1835 assert((!EnterAfter || Idx >= EnterAfter) && "Interference"); 1851 assert((!EnterAfter || Idx >= EnterAfter) && "Interference");lib/Target/AMDGPU/SIMachineScheduler.cpp
319 if (InstSlot >= First && InstSlot <= Last)