|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
lib/CodeGen/AsmPrinter/DwarfDebug.cpp 593 if (TRI->regsOverlap(FwdReg, MO.getReg())) {
lib/CodeGen/CriticalAntiDepBreaker.cpp 424 if (TRI->regsOverlap(NewReg, *it)) {
618 if (MO.isUse() && TRI->regsOverlap(AntiDepReg, Reg)) {
lib/CodeGen/ImplicitNullChecks.cpp 288 if (TRI->regsOverlap(RegA, RegB) && (MOA.isDef() || MOB.isDef()))
443 TRI->regsOverlap(DependenceMO.getReg(), PointerReg)) &&
602 TRI->regsOverlap(MO.getReg(), PointerReg);
lib/CodeGen/MachineBasicBlock.cpp 1414 if (TRI->regsOverlap(LI.PhysReg, Reg))
1469 if (TRI->regsOverlap(LI.PhysReg, Reg))
lib/CodeGen/MachineCSE.cpp 239 if (!TRI->regsOverlap(MO.getReg(), Reg))
lib/CodeGen/MachineCopyPropagation.cpp 373 MIUse.isUse() && TRI->regsOverlap(Use.getReg(), MIUse.getReg()))
469 if (MI->isCopy() && !TRI->regsOverlap(MI->getOperand(0).getReg(),
lib/CodeGen/MachineInstr.cpp 952 if (MOReg == Reg || (TRI && Reg && MOReg && TRI->regsOverlap(MOReg, Reg)))
1007 Found = TRI->regsOverlap(MOReg, Reg);
1858 if ((RegInfo && RegInfo->regsOverlap(Reg, OpReg)) || Reg == OpReg)
1964 [&](MCRegister Use) { return TRI.regsOverlap(Use, Reg); }))
lib/CodeGen/MachineInstrBundle.cpp 336 if (!TRI->regsOverlap(MOReg, Reg))
lib/CodeGen/ProcessImplicitDefs.cpp 105 !TRI->regsOverlap(Reg, UserReg))
lib/CodeGen/RegAllocPBQP.cpp 419 if (TRI.regsOverlap(PRegN, PRegM)) {
572 if (TRI.regsOverlap(reg, CSR[i]))
lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp 2863 if (TRI->regsOverlap(*ImpDef, SuccPred.getReg()) &&
2902 if (TRI->regsOverlap(Reg, SUReg))
lib/CodeGen/TwoAddressInstructionPass.cpp 566 return TRI->regsOverlap(RegA, RegB);
573 if (TRI->regsOverlap(R, Reg))
lib/CodeGen/VirtRegMap.cpp 425 if (TRI->regsOverlap(Dst->getOperand(0).getReg(),
lib/Target/AArch64/AArch64AsmPrinter.cpp 555 assert(RI->regsOverlap(RegToPrint, Reg));
lib/Target/AArch64/AArch64CallLowering.cpp 883 return TRI->regsOverlap(Use.getReg(), ForwardedReg);
lib/Target/AArch64/AArch64PBQPRegAlloc.cpp 196 if (livesOverlap && TRI->regsOverlap(pRd, pRa))
lib/Target/AMDGPU/GCNHazardRecognizer.cpp 733 TRI->regsOverlap(MI->getOperand(DataIdx).getReg(), Reg);
1267 return TRI.regsOverlap(DstReg, Reg);
1309 return TRI.regsOverlap(Reg, DstReg);
1344 return TRI.regsOverlap(Reg, DstReg);
lib/Target/AMDGPU/SIISelLowering.cpp 3001 Subtarget->getRegisterInfo()->regsOverlap(Reg, AMDGPU::FLAT_SCR)) {
lib/Target/AMDGPU/SIInstrInfo.cpp 3455 return !RI.regsOverlap(SGPRUsed, SGPR);
lib/Target/AMDGPU/SIShrinkInstructions.cpp 398 if (TRI.regsOverlap(Reg, MO.getReg()))
lib/Target/ARM/ARMBaseInstrInfo.cpp 961 if (TRI->regsOverlap(SrcReg, TRI->getSubReg(DestReg, BeginIdx))) {
lib/Target/ARM/ARMLoadStoreOptimizer.cpp 1728 if (isLd && TRI->regsOverlap(EvenReg, BaseReg)) {
1729 assert(!TRI->regsOverlap(OddReg, BaseReg));
1813 if (TRI->regsOverlap(Reg, E.MI->getOperand(0).getReg())) {
2125 if (MO.isDef() && TRI->regsOverlap(Reg, Base))
lib/Target/PowerPC/PPCInstrInfo.cpp 2469 getRegisterInfo().regsOverlap(MO.getReg(), RegNo))
lib/Target/SystemZ/SystemZElimCompare.cpp 156 if (TRI->regsOverlap(MOReg, Reg)) {
lib/Target/X86/X86CallFrameOptimization.cpp 341 if (RegInfo.regsOverlap(Reg, RegInfo.getStackRegister()))
345 if (RegInfo.regsOverlap(Reg, U))
lib/Target/X86/X86CallingConv.cpp 167 if (TRI->regsOverlap(Reg, X86::XMM4) ||
168 TRI->regsOverlap(Reg, X86::XMM5))
lib/Target/X86/X86FixupBWInsts.cpp 263 TRI->regsOverlap(SuperDestReg, MO.getReg()))
lib/Target/X86/X86FrameLowering.cpp 2006 if (TRI->regsOverlap(CSI[i].getReg(),FPReg)) {
lib/Target/X86/X86InstrInfo.cpp 7587 TRI->regsOverlap(Op1.getReg(), MI.getOperand(0).getReg())) ||
7589 TRI->regsOverlap(Op2.getReg(), MI.getOperand(0).getReg())))