reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Declarations

include/llvm/CodeGen/TargetRegisterInfo.h

  684   getCommonSubClass(const TargetRegisterClass *A,

References

lib/CodeGen/DetectDeadLanes.cpp

  190   return !TRI.getCommonSubClass(SrcRC, DstRC);

lib/CodeGen/LiveStacks.cpp

   70     S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC);

lib/CodeGen/MachineInstr.cpp

  913     CurRC = TRI->getCommonSubClass(CurRC, OpRC);

lib/CodeGen/MachineRegisterInfo.cpp

   75       MRI.getTargetRegisterInfo()->getCommonSubClass(OldRC, RC);

lib/CodeGen/RegisterCoalescer.cpp

  459       NewRC = TRI.getCommonSubClass(DstRC, SrcRC);
 1298         TRI->getCommonSubClass(DefRC, DstRC);
 1351         NewRC = TRI->getCommonSubClass(NewRC, DefRC);

lib/CodeGen/SelectionDAG/DAGCombiner.cpp

14439     if (!TRI || TRI->getCommonSubClass(ArgRC, ResRC))

lib/CodeGen/SelectionDAG/InstrEmitter.cpp

  142                 TRI->getCommonSubClass(UseRC, RC);
  214         VTRC = TRI->getCommonSubClass(RC, VTRC);

lib/CodeGen/TargetRegisterInfo.cpp

  370   return TRI.getCommonSubClass(DefRC, SrcRC) != nullptr;

lib/Target/AArch64/AArch64InstrInfo.cpp

  504       RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg));

lib/Target/AMDGPU/SIInstrInfo.cpp

 3841   if (RI.getCommonSubClass(&AMDGPU::VReg_64RegClass, VRC))
 4672     if (RI.getCommonSubClass(MRI.getRegClass(Rsrc->getReg()),

lib/Target/AMDGPU/SIRegisterInfo.cpp

 1288     return getCommonSubClass(&AMDGPU::VGPR_32RegClass, RC) != nullptr;
 1290     return getCommonSubClass(&AMDGPU::VReg_64RegClass, RC) != nullptr;
 1292     return getCommonSubClass(&AMDGPU::VReg_96RegClass, RC) != nullptr;
 1294     return getCommonSubClass(&AMDGPU::VReg_128RegClass, RC) != nullptr;
 1296     return getCommonSubClass(&AMDGPU::VReg_160RegClass, RC) != nullptr;
 1298     return getCommonSubClass(&AMDGPU::VReg_256RegClass, RC) != nullptr;
 1300     return getCommonSubClass(&AMDGPU::VReg_512RegClass, RC) != nullptr;
 1302     return getCommonSubClass(&AMDGPU::VReg_1024RegClass, RC) != nullptr;
 1304     return getCommonSubClass(&AMDGPU::VReg_1RegClass, RC) != nullptr;
 1317     return getCommonSubClass(&AMDGPU::AGPR_32RegClass, RC) != nullptr;
 1319     return getCommonSubClass(&AMDGPU::AReg_64RegClass, RC) != nullptr;
 1323     return getCommonSubClass(&AMDGPU::AReg_128RegClass, RC) != nullptr;
 1328     return getCommonSubClass(&AMDGPU::AReg_512RegClass, RC) != nullptr;
 1330     return getCommonSubClass(&AMDGPU::AReg_1024RegClass, RC) != nullptr;
 1498   return getCommonSubClass(DefRC, SrcRC) != nullptr;

lib/Target/PowerPC/PPCInstrInfo.cpp

  770     RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg));
  803     RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg));

lib/Target/SystemZ/SystemZInstrInfo.cpp

  547     RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg));

lib/Target/SystemZ/SystemZRegisterInfo.cpp

  109             TRI->getCommonSubClass(getRC32(FalseMO, VRM, MRI),
  112             RC = TRI->getCommonSubClass(RC,

lib/Target/X86/X86InstrInfo.cpp

 2845     RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg));