reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc

10459     DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<32, AArch64::ZPRRegClassID, AArch64_AM::SXTW, 16, false>());
10468     DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<32, AArch64::ZPRRegClassID, AArch64_AM::SXTW, 32, false>());
10477     DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<32, AArch64::ZPRRegClassID, AArch64_AM::SXTW, 64, false>());
10486     DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<32, AArch64::ZPRRegClassID, AArch64_AM::SXTW, 8, false>());
10495     DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<32, AArch64::ZPRRegClassID, AArch64_AM::SXTW, 8, true>());
10585     DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<64, AArch64::ZPRRegClassID, AArch64_AM::SXTW, 16, false>());
10594     DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<64, AArch64::ZPRRegClassID, AArch64_AM::SXTW, 32, false>());
10603     DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<64, AArch64::ZPRRegClassID, AArch64_AM::SXTW, 64, false>());
10612     DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<64, AArch64::ZPRRegClassID, AArch64_AM::SXTW, 8, false>());
10621     DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<64, AArch64::ZPRRegClassID, AArch64_AM::SXTW, 8, true>());

gen/lib/Target/AArch64/AArch64GenInstrInfo.inc

18271       AArch64_AM::getMemExtendType(MI.getOperand(3).getImm()) == AArch64_AM::SXTW
30009       AArch64_AM::getMemExtendType(MI.getOperand(3).getImm()) == AArch64_AM::SXTW

lib/Target/AArch64/AArch64FastISel.cpp

  750             Addr.setExtendType(AArch64_AM::SXTW);
  834             Addr.setExtendType(AArch64_AM::SXTW);
  892         Addr.setExtendType(AArch64_AM::SXTW);
 1069       if (Addr.getExtendType() == AArch64_AM::SXTW ||
 1085       else if (Addr.getExtendType() == AArch64_AM::SXTW)
 1146       bool IsSigned = Addr.getExtendType() == AArch64_AM::SXTW ||
 1858       Addr.getExtendType() == AArch64_AM::SXTW)
 2149       Addr.getExtendType() == AArch64_AM::SXTW)

lib/Target/AArch64/AArch64ISelDAGToDAG.cpp

  465       return AArch64_AM::SXTW;
  900     SignExtend = CurDAG->getTargetConstant(Ext == AArch64_AM::SXTW, dl,
  969     SignExtend = CurDAG->getTargetConstant(Ext == AArch64_AM::SXTW, dl,
  981     SignExtend = CurDAG->getTargetConstant(Ext == AArch64_AM::SXTW, dl,

lib/Target/AArch64/AArch64InstructionSelector.cpp

 4510       return AArch64_AM::SXTW;

lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp

 1100                         ShiftExtendTy == AArch64_AM::SXTW) &&
 1252             ET == AArch64_AM::UXTW || ET == AArch64_AM::SXTW ||
 1265            ET == AArch64_AM::UXTW || ET == AArch64_AM::SXTW;
 1290     return (ET == AArch64_AM::UXTW || ET == AArch64_AM::SXTW) &&
 1752     bool IsSigned = ET == AArch64_AM::SXTW || ET == AArch64_AM::SXTX;
 1764     bool IsSigned = ET == AArch64_AM::SXTW || ET == AArch64_AM::SXTX;
 2750           .Case("sxtw", AArch64_AM::SXTW)

lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h

   66   case AArch64_AM::SXTW: return "sxtw";
  133   case 6: return AArch64_AM::SXTW;
  160   case AArch64_AM::SXTW: return 6; break;