reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

104135 /*232926*/  /*SwitchOpcode*/ 12|128,11/*1420*/, TARGET_VAL(ISD::SINT_TO_FP),// ->234350
104804 /*234647*/      OPC_SwitchOpcode /*2 cases */, 107, TARGET_VAL(ISD::SINT_TO_FP),// ->234758

 4291   case ISD::SINT_TO_FP: return fastEmit_ISD_SINT_TO_FP_r(VT, RetVT, Op0, Op0IsKill);

75163 /*166524*/  /*SwitchOpcode*/ 54|128,1/*182*/, TARGET_VAL(ISD::SINT_TO_FP),// ->166710

10115 /* 38601*/  /*SwitchOpcode*/ 13|128,1/*141*/, TARGET_VAL(ISD::SINT_TO_FP),// ->38746

40980 /* 89919*/  /*SwitchOpcode*/ 120|128,4/*632*/, TARGET_VAL(ISD::SINT_TO_FP),// ->90555

 2725   case ISD::SINT_TO_FP: return fastEmit_ISD_SINT_TO_FP_r(VT, RetVT, Op0, Op0IsKill);

68338 /*132313*/  /*SwitchOpcode*/ 49, TARGET_VAL(ISD::SINT_TO_FP),// ->132365

27648 /* 52310*/  /*SwitchOpcode*/ 107, TARGET_VAL(ISD::SINT_TO_FP),// ->52420

 1209   case ISD::SINT_TO_FP: return fastEmit_ISD_SINT_TO_FP_r(VT, RetVT, Op0, Op0IsKill);

70997 /*149685*/  /*SwitchOpcode*/ 96|128,1/*224*/, TARGET_VAL(ISD::SINT_TO_FP),// ->149913

34696 /* 89416*/  /*SwitchOpcode*/ 26|128,23/*2970*/, TARGET_VAL(ISD::SINT_TO_FP),// ->92390

 1713   case ISD::SINT_TO_FP: return fastEmit_ISD_SINT_TO_FP_r(VT, RetVT, Op0, Op0IsKill);

13189 /* 24633*/  /*SwitchOpcode*/ 1|128,2/*257*/, TARGET_VAL(ISD::SINT_TO_FP),// ->24894

25775 /* 49004*/  /*SwitchOpcode*/ 111, TARGET_VAL(ISD::SINT_TO_FP),// ->49118

18780 /* 35867*/  /*SwitchOpcode*/ 73, TARGET_VAL(ISD::SINT_TO_FP),// ->35943

  978   case ISD::SINT_TO_FP: return fastEmit_ISD_SINT_TO_FP_r(VT, RetVT, Op0, Op0IsKill);

70363 /*148417*/  /*SwitchOpcode*/ 120|128,10/*1400*/, TARGET_VAL(ISD::SINT_TO_FP),// ->149821
132915 /*272719*/          /*SwitchOpcode*/ 97|128,1/*225*/, TARGET_VAL(ISD::SINT_TO_FP),// ->272948
139506 /*286404*/          /*SwitchOpcode*/ 97|128,1/*225*/, TARGET_VAL(ISD::SINT_TO_FP),// ->286633
142013 /*291100*/          /*SwitchOpcode*/ 69, TARGET_VAL(ISD::SINT_TO_FP),// ->291172
144056 /*295093*/          /*SwitchOpcode*/ 69, TARGET_VAL(ISD::SINT_TO_FP),// ->295165
151334 /*308726*/          /*SwitchOpcode*/ 77, TARGET_VAL(ISD::SINT_TO_FP),// ->308806
155270 /*316446*/          /*SwitchOpcode*/ 75, TARGET_VAL(ISD::SINT_TO_FP),// ->316524
156886 /*319345*/          /*SwitchOpcode*/ 19, TARGET_VAL(ISD::SINT_TO_FP),// ->319367
158231 /*321874*/          /*SwitchOpcode*/ 18, TARGET_VAL(ISD::SINT_TO_FP),// ->321895
166683 /*338080*/          /*SwitchOpcode*/ 97|128,1/*225*/, TARGET_VAL(ISD::SINT_TO_FP),// ->338309
172989 /*351208*/          /*SwitchOpcode*/ 97|128,1/*225*/, TARGET_VAL(ISD::SINT_TO_FP),// ->351437
174983 /*354996*/          /*SwitchOpcode*/ 69, TARGET_VAL(ISD::SINT_TO_FP),// ->355068
176463 /*357930*/          /*SwitchOpcode*/ 69, TARGET_VAL(ISD::SINT_TO_FP),// ->358002
184268 /*372901*/          /*SwitchOpcode*/ 1|128,1/*129*/, TARGET_VAL(ISD::SINT_TO_FP),// ->373034
185714 /*375565*/          /*SwitchOpcode*/ 19, TARGET_VAL(ISD::SINT_TO_FP),// ->375587
186480 /*377023*/          /*SwitchOpcode*/ 18, TARGET_VAL(ISD::SINT_TO_FP),// ->377044
236434 /*482316*/        /*SwitchOpcode*/ 20|128,1/*148*/, TARGET_VAL(ISD::SINT_TO_FP),// ->482468
238381 /*486568*/          /*SwitchOpcode*/ 85, TARGET_VAL(ISD::SINT_TO_FP),// ->486656
242866 /*495846*/        /*SwitchOpcode*/ 20|128,1/*148*/, TARGET_VAL(ISD::SINT_TO_FP),// ->495998
244899 /*500277*/          /*SwitchOpcode*/ 85, TARGET_VAL(ISD::SINT_TO_FP),// ->500365

 5924   case ISD::SINT_TO_FP: return fastEmit_ISD_SINT_TO_FP_r(VT, RetVT, Op0, Op0IsKill);

 1571   case ISD::SINT_TO_FP:         return visitSINT_TO_FP(N);
12812   if (N->getOpcode() == ISD::SINT_TO_FP && N0.getOpcode() == ISD::FP_TO_SINT &&
12837     return DAG.getNode(ISD::SINT_TO_FP, SDLoc(N), VT, N0);
12841   if (!hasOperation(ISD::SINT_TO_FP, OpVT) &&
12903       hasOperation(ISD::SINT_TO_FP, OpVT)) {
12906       return DAG.getNode(ISD::SINT_TO_FP, SDLoc(N), VT, N0);
12935   if (N0.getOpcode() != ISD::UINT_TO_FP && N0.getOpcode() != ISD::SINT_TO_FP)
12940   bool IsInputSigned = N0.getOpcode() == ISD::SINT_TO_FP;

  434           Reg = fastEmit_r(IntVT.getSimpleVT(), VT, ISD::SINT_TO_FP, IntegerReg,
 1892     return selectCast(I, ISD::SINT_TO_FP);

 1006   case ISD::SINT_TO_FP:
 2405   SDValue Tmp1 = DAG.getNode(ISD::SINT_TO_FP, dl, DestVT, Op0);
 2473     if (TLI.isOperationLegalOrCustom(ISD::SINT_TO_FP, NewInTy)) {
 2474       OpToUse = ISD::SINT_TO_FP;
 2891   case ISD::SINT_TO_FP:
 2892     Tmp1 = ExpandLegalINT_TO_FP(Node->getOpcode() == ISD::SINT_TO_FP,
 4126       Node->getOpcode() == ISD::SINT_TO_FP ||
 4186   case ISD::SINT_TO_FP:
 4188                                  Node->getOpcode() == ISD::SINT_TO_FP, dl);

  102     case ISD::SINT_TO_FP:
  790   bool Signed = N->getOpcode() == ISD::SINT_TO_FP;
 1169   case ISD::SINT_TO_FP:
 1549   bool isSigned = N->getOpcode() == ISD::SINT_TO_FP;
 1561     Hi = DAG.getNode(ISD::SINT_TO_FP, dl, NVT, Src);
 2095     case ISD::SINT_TO_FP:

 1177   case ISD::SINT_TO_FP:   Res = PromoteIntOp_SINT_TO_FP(N); break;
 3611   case ISD::SINT_TO_FP:        Res = ExpandIntOp_SINT_TO_FP(N); break;
 3990       TLI.getOperationAction(ISD::SINT_TO_FP, SrcVT) == TargetLowering::Custom){
 3992     SDValue SignedConv = DAG.getNode(ISD::SINT_TO_FP, dl, DstVT, Op);

  463   case ISD::SINT_TO_FP:
  524   case ISD::SINT_TO_FP:
 1213   if (TLI.getOperationAction(ISD::SINT_TO_FP, VT) == TargetLowering::Expand ||
 1239   SDValue fHI = DAG.getNode(ISD::SINT_TO_FP, DL, Op.getValueType(), HI);
 1241   SDValue fLO = DAG.getNode(ISD::SINT_TO_FP, DL, Op.getValueType(), LO);

  100   case ISD::SINT_TO_FP:
  605     case ISD::SINT_TO_FP:
  916   case ISD::SINT_TO_FP:
 2006     case ISD::SINT_TO_FP:
 2839   case ISD::SINT_TO_FP:
 4168   case ISD::SINT_TO_FP:

 4036   case ISD::SINT_TO_FP:
 4302     case ISD::SINT_TO_FP: {
 4306                                  Opcode==ISD::SINT_TO_FP,
 4441       case ISD::SINT_TO_FP:
 4490   case ISD::SINT_TO_FP:

 3452   setValue(&I, DAG.getNode(ISD::SINT_TO_FP, getCurSDLoc(), DestVT, N));
 4886   return DAG.getNode(ISD::SINT_TO_FP, dl, MVT::f32, t2);
 4904   SDValue t1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::f32, IntegerPartOfX);

  326   case ISD::SINT_TO_FP:                 return "sint_to_fp";

 6052          !isOperationLegalOrCustom(ISD::SINT_TO_FP, SrcVT) ||
 6059     SDValue Fast = DAG.getNode(ISD::SINT_TO_FP, dl, DstVT, Src);
 6067     SDValue SignCvt = DAG.getNode(ISD::SINT_TO_FP, dl, DstVT, Or);

 1623   case SIToFP:         return ISD::SINT_TO_FP;

 5202     if (!selectCast(I, ISD::SINT_TO_FP))

  267   setOperationAction(ISD::SINT_TO_FP, MVT::i32, Custom);
  268   setOperationAction(ISD::SINT_TO_FP, MVT::i64, Custom);
  269   setOperationAction(ISD::SINT_TO_FP, MVT::i128, Custom);
  592   setTargetDAGCombine(ISD::SINT_TO_FP);
  690     setOperationAction(ISD::SINT_TO_FP, MVT::v1i64, Expand);
  699     setOperationPromotedToType(ISD::SINT_TO_FP, MVT::v4i8, MVT::v4i32);
  701     setOperationPromotedToType(ISD::SINT_TO_FP, MVT::v8i8, MVT::v8i32);
  704     setOperationAction(ISD::SINT_TO_FP, MVT::v2i32, Custom);
  706     setOperationAction(ISD::SINT_TO_FP, MVT::v2i64, Custom);
  710     setOperationAction(ISD::SINT_TO_FP, MVT::v4i32, Custom);
  714       setOperationAction(ISD::SINT_TO_FP, MVT::v4i16, Custom);
  716       setOperationAction(ISD::SINT_TO_FP, MVT::v8i16, Custom);
  722       setOperationPromotedToType(ISD::SINT_TO_FP, MVT::v4i16, MVT::v4i32);
  723       setOperationPromotedToType(ISD::SINT_TO_FP, MVT::v8i16, MVT::v8i32);
 2523         Op.getOpcode() == ISD::SINT_TO_FP ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND;
 2557   if (Op.getOpcode() == ISD::SINT_TO_FP)
 3059   case ISD::SINT_TO_FP:
 9553         (N->getOpcode() == ISD::SINT_TO_FP) ? AArch64ISD::SITOF : AArch64ISD::UITOF;
 9647       (Opc != ISD::SINT_TO_FP && Opc != ISD::UINT_TO_FP))
 9692   bool IsSigned = Opc == ISD::SINT_TO_FP;
11729   case ISD::SINT_TO_FP:

  319     { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 },
  320     { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i32, 1 },
  321     { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i64, 1 },
  327     { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i8,  3 },
  328     { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i16, 3 },
  329     { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i64, 2 },
  335     { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i8,  4 },
  336     { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i16, 2 },
  341     { ISD::SINT_TO_FP, MVT::v8f32, MVT::v8i8,  10 },
  342     { ISD::SINT_TO_FP, MVT::v8f32, MVT::v8i16, 4 },
  347     { ISD::SINT_TO_FP, MVT::v16f32, MVT::v16i8, 21 },
  351     { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i8,  4 },
  352     { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i16, 4 },
  353     { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 },

  341   setOperationAction(ISD::SINT_TO_FP, MVT::i64, Custom);
  376     setOperationAction(ISD::SINT_TO_FP, VT, Expand);
 1151   case ISD::SINT_TO_FP: return LowerSINT_TO_FP(Op, DAG);
 1549   ISD::NodeType ToFp = Sign ? ISD::SINT_TO_FP : ISD::UINT_TO_FP;
 2486   SDValue CvtHi = DAG.getNode(Signed ? ISD::SINT_TO_FP : ISD::UINT_TO_FP,

  476     setOperationAction(ISD::SINT_TO_FP, MVT::i16, Promote);
  494     setOperationAction(ISD::SINT_TO_FP, MVT::f16, Promote);
  719   setTargetDAGCombine(ISD::SINT_TO_FP);
 8574   case ISD::SINT_TO_FP:
 8705                          N0.getOpcode() == ISD::SINT_TO_FP)) {
10023   case ISD::SINT_TO_FP:

  166     setOperationAction(ISD::SINT_TO_FP, VT, Custom);
  171     setOperationAction(ISD::SINT_TO_FP, VT, Expand);
  288       setOperationAction(ISD::SINT_TO_FP, VT, Expand);
  847     setOperationAction(ISD::SINT_TO_FP, MVT::v4i16, Custom);
  848     setOperationAction(ISD::SINT_TO_FP, MVT::v8i16, Custom);
  960     setOperationAction(ISD::SINT_TO_FP, MVT::i32, Custom);
 5410   case ISD::SINT_TO_FP:
 5412     Opc = ISD::SINT_TO_FP;
 5430     if (Op.getOpcode() == ISD::SINT_TO_FP)
 8507   X = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, X);
 8508   Y = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, Y);
 8539   N0 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N0);
 8540   N1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N1);
 8647   N0 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N0);
 8648   SDValue BN1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N1);
 9106   SDValue Exponent = DAG.getNode(ISD::SINT_TO_FP, dl, Ty, Op.getOperand(1));
 9165   case ISD::SINT_TO_FP:
13539       (OpOpcode != ISD::SINT_TO_FP && OpOpcode != ISD::UINT_TO_FP))
13566   bool isSigned = OpOpcode == ISD::SINT_TO_FP;

  238     { ISD::SINT_TO_FP,  MVT::v4f32, MVT::v4i32, 1 },
  241     { ISD::SINT_TO_FP,  MVT::v2f32, MVT::v2i8, 3 },
  243     { ISD::SINT_TO_FP,  MVT::v2f32, MVT::v2i16, 2 },
  245     { ISD::SINT_TO_FP,  MVT::v2f32, MVT::v2i32, 1 },
  247     { ISD::SINT_TO_FP,  MVT::v4f32, MVT::v4i1, 3 },
  249     { ISD::SINT_TO_FP,  MVT::v4f32, MVT::v4i8, 3 },
  251     { ISD::SINT_TO_FP,  MVT::v4f32, MVT::v4i16, 2 },
  253     { ISD::SINT_TO_FP,  MVT::v8f32, MVT::v8i16, 4 },
  255     { ISD::SINT_TO_FP,  MVT::v8f32, MVT::v8i32, 2 },
  257     { ISD::SINT_TO_FP,  MVT::v16f32, MVT::v16i16, 8 },
  259     { ISD::SINT_TO_FP,  MVT::v16f32, MVT::v16i32, 4 },
  270     { ISD::SINT_TO_FP,  MVT::v2f64, MVT::v2i32, 2 },
  273     { ISD::SINT_TO_FP,  MVT::v2f64, MVT::v2i8, 4 },
  275     { ISD::SINT_TO_FP,  MVT::v2f64, MVT::v2i16, 3 },
  277     { ISD::SINT_TO_FP,  MVT::v2f64, MVT::v2i32, 2 },
  327     { ISD::SINT_TO_FP,  MVT::f32, MVT::i1, 2 },
  329     { ISD::SINT_TO_FP,  MVT::f64, MVT::i1, 2 },
  331     { ISD::SINT_TO_FP,  MVT::f32, MVT::i8, 2 },
  333     { ISD::SINT_TO_FP,  MVT::f64, MVT::i8, 2 },
  335     { ISD::SINT_TO_FP,  MVT::f32, MVT::i16, 2 },
  337     { ISD::SINT_TO_FP,  MVT::f64, MVT::i16, 2 },
  339     { ISD::SINT_TO_FP,  MVT::f32, MVT::i32, 2 },
  341     { ISD::SINT_TO_FP,  MVT::f64, MVT::i32, 2 },
  343     { ISD::SINT_TO_FP,  MVT::f32, MVT::i64, 10 },
  345     { ISD::SINT_TO_FP,  MVT::f64, MVT::i64, 10 },

 1542   setOperationAction(ISD::SINT_TO_FP, MVT::i1,  Promote);
 1543   setOperationAction(ISD::SINT_TO_FP, MVT::i8,  Promote);
 1544   setOperationAction(ISD::SINT_TO_FP, MVT::i16, Promote);

  357     setOperationAction(ISD::SINT_TO_FP, Ty, Legal);
 1875     return DAG.getNode(ISD::SINT_TO_FP, DL, Op->getValueType(0),

  385   setOperationAction(ISD::SINT_TO_FP, MVT::f16, Legal);

  202       setOperationAction(ISD::SINT_TO_FP, MVT::i1, Promote);
  203       AddPromotedToType (ISD::SINT_TO_FP, MVT::i1,
  209       setOperationAction(ISD::SINT_TO_FP, MVT::i1, Custom);
  376     setOperationAction(ISD::SINT_TO_FP, MVT::i32, Legal);
  383     setOperationAction(ISD::SINT_TO_FP, MVT::i32, Expand);
  504     setOperationAction(ISD::SINT_TO_FP, MVT::i64, Custom);
  511       setOperationAction(ISD::SINT_TO_FP, MVT::i32, Custom);
  525       setOperationAction(ISD::SINT_TO_FP, MVT::i64, Custom);
  531     setOperationAction(ISD::SINT_TO_FP, MVT::i32, Custom);
  700     setOperationAction(ISD::SINT_TO_FP, MVT::v4i32, Legal);
  834       setOperationAction(ISD::SINT_TO_FP, MVT::v2i64, Legal);
  846       setOperationAction(ISD::SINT_TO_FP, MVT::v2i8, Custom);
  847       setOperationAction(ISD::SINT_TO_FP, MVT::v4i8, Custom);
  848       setOperationAction(ISD::SINT_TO_FP, MVT::v2i16, Custom);
  849       setOperationAction(ISD::SINT_TO_FP, MVT::v4i16, Custom);
 1045     setOperationAction(ISD::SINT_TO_FP, MVT::v4i1, Custom);
 1114   setTargetDAGCombine(ISD::SINT_TO_FP);
 7590     if (UI->getOpcode() != ISD::SINT_TO_FP &&
 7613   bool Signed = Op.getOpcode() == ISD::SINT_TO_FP;
 7654   assert((Opc == ISD::UINT_TO_FP || Opc == ISD::SINT_TO_FP) &&
 7659   bool SignedConv = Opc == ISD::SINT_TO_FP;
 7747   assert((Op.getOpcode() == ISD::SINT_TO_FP || Subtarget.hasFPCVT()) &&
10146   case ISD::SINT_TO_FP:         return LowerINT_TO_FP(Op, DAG);
12973   if (FirstInput.getOpcode() != ISD::SINT_TO_FP &&
12976   if (N->getOperand(1).getOpcode() != ISD::SINT_TO_FP &&
13007   auto NodeType = (N->getOperand(1).getOpcode() == ISD::SINT_TO_FP) ?
13015   assert((N->getOpcode() == ISD::SINT_TO_FP ||
13039     bool Signed = N->getOpcode() == ISD::SINT_TO_FP;
13070   assert((Op.getOpcode() == ISD::SINT_TO_FP || Subtarget.hasFPCVT()) &&
13407   case ISD::SINT_TO_FP:

 1510   setOperationAction(ISD::SINT_TO_FP, MVT::i32, Custom);
 1512   setOperationAction(ISD::SINT_TO_FP, MVT::i64, Custom);
 3021   case ISD::SINT_TO_FP:         return LowerSINT_TO_FP(Op, DAG, *this,
 3371   case ISD::SINT_TO_FP:
 3378     libCall = ((N->getOpcode() == ISD::SINT_TO_FP)

  386     setOperationAction(ISD::SINT_TO_FP, MVT::v2i64, Legal);
  387     setOperationAction(ISD::SINT_TO_FP, MVT::v2f64, Legal);
  402     setOperationAction(ISD::SINT_TO_FP, MVT::v4i32, Legal);
  403     setOperationAction(ISD::SINT_TO_FP, MVT::v4f32, Legal);

  239   setOperationAction(ISD::SINT_TO_FP       , MVT::i1   , Promote);
  240   setOperationAction(ISD::SINT_TO_FP       , MVT::i8   , Promote);
  245       setOperationAction(ISD::SINT_TO_FP     , MVT::i16  , Promote);
  247       setOperationAction(ISD::SINT_TO_FP     , MVT::i32  , Custom);
  249       setOperationAction(ISD::SINT_TO_FP     , MVT::i16  , Custom);
  250       setOperationAction(ISD::SINT_TO_FP     , MVT::i32  , Custom);
  253     setOperationAction(ISD::SINT_TO_FP     , MVT::i16  , Promote);
  254     setOperationAction(ISD::SINT_TO_FP     , MVT::i32  , Expand);
  266     setOperationAction(ISD::SINT_TO_FP     , MVT::i64  , Custom);
  777     setOperationAction(ISD::SINT_TO_FP, VT, Expand);
  957     setOperationAction(ISD::SINT_TO_FP,         MVT::v4i32, Legal);
  958     setOperationAction(ISD::SINT_TO_FP,         MVT::v2i32, Custom);
 1124     setOperationAction(ISD::SINT_TO_FP,         MVT::v8i32, Legal);
 1386     setOperationAction(ISD::SINT_TO_FP,         MVT::v16i32, Legal);
 1471       setOperationAction(ISD::SINT_TO_FP, MVT::v8i64, Legal);
 1566         setOperationAction(ISD::SINT_TO_FP,     VT, Legal);
 1742       setOperationAction(ISD::SINT_TO_FP,    MVT::v2f32, Custom);
 1871   setTargetDAGCombine(ISD::SINT_TO_FP);
18330   assert((Op.getOpcode() == ISD::SINT_TO_FP ||
18357     case ISD::SINT_TO_FP:
18818     return DAG.getNode(ISD::SINT_TO_FP, dl, DstVT, N0);
27693   case ISD::SINT_TO_FP:         return LowerSINT_TO_FP(Op, DAG);
28207   case ISD::SINT_TO_FP: {
43197     return DAG.getNode(ISD::SINT_TO_FP, dl, VT, P);
43204     return DAG.getNode(ISD::SINT_TO_FP, SDLoc(N), VT, Op0);
43230     return DAG.getNode(ISD::SINT_TO_FP, dl, VT, P);
43247         return DAG.getNode(ISD::SINT_TO_FP, dl, VT, Trunc);
44708       if (InOpcode == ISD::SINT_TO_FP &&
44932   case ISD::SINT_TO_FP:     return combineSIntToFP(N, DAG, DCI, Subtarget);

  918   X86_INTRINSIC_DATA(avx512_sitofp_round, INTR_TYPE_1OP, ISD::SINT_TO_FP, X86ISD::SINT_TO_FP_RND),

 1302     { ISD::SINT_TO_FP,  MVT::v2f32,  MVT::v2i64,  1 },
 1303     { ISD::SINT_TO_FP,  MVT::v2f64,  MVT::v2i64,  1 },
 1304     { ISD::SINT_TO_FP,  MVT::v4f32,  MVT::v4i64,  1 },
 1305     { ISD::SINT_TO_FP,  MVT::v4f64,  MVT::v4i64,  1 },
 1306     { ISD::SINT_TO_FP,  MVT::v8f32,  MVT::v8i64,  1 },
 1307     { ISD::SINT_TO_FP,  MVT::v8f64,  MVT::v8i64,  1 },
 1358     { ISD::SINT_TO_FP,  MVT::v8f64,  MVT::v8i1,   4 },
 1359     { ISD::SINT_TO_FP,  MVT::v16f32, MVT::v16i1,  3 },
 1360     { ISD::SINT_TO_FP,  MVT::v8f64,  MVT::v8i8,   2 },
 1361     { ISD::SINT_TO_FP,  MVT::v16f32, MVT::v16i8,  2 },
 1362     { ISD::SINT_TO_FP,  MVT::v8f64,  MVT::v8i16,  2 },
 1363     { ISD::SINT_TO_FP,  MVT::v16f32, MVT::v16i16, 2 },
 1364     { ISD::SINT_TO_FP,  MVT::v16f32, MVT::v16i32, 1 },
 1365     { ISD::SINT_TO_FP,  MVT::v8f64,  MVT::v8i32,  1 },
 1467     { ISD::SINT_TO_FP,  MVT::v4f32, MVT::v4i1,  3 },
 1468     { ISD::SINT_TO_FP,  MVT::v4f64, MVT::v4i1,  3 },
 1469     { ISD::SINT_TO_FP,  MVT::v8f32, MVT::v8i1,  8 },
 1470     { ISD::SINT_TO_FP,  MVT::v4f32, MVT::v4i8,  3 },
 1471     { ISD::SINT_TO_FP,  MVT::v4f64, MVT::v4i8,  3 },
 1472     { ISD::SINT_TO_FP,  MVT::v8f32, MVT::v8i8,  8 },
 1473     { ISD::SINT_TO_FP,  MVT::v4f32, MVT::v4i16, 3 },
 1474     { ISD::SINT_TO_FP,  MVT::v4f64, MVT::v4i16, 3 },
 1475     { ISD::SINT_TO_FP,  MVT::v8f32, MVT::v8i16, 5 },
 1476     { ISD::SINT_TO_FP,  MVT::v4f32, MVT::v4i32, 1 },
 1477     { ISD::SINT_TO_FP,  MVT::v4f64, MVT::v4i32, 1 },
 1478     { ISD::SINT_TO_FP,  MVT::v8f32, MVT::v8i32, 1 },
 1500     { ISD::SINT_TO_FP,  MVT::v4f64, MVT::v4i64, 13 },
 1501     { ISD::SINT_TO_FP,  MVT::v4f64, MVT::v4i64, 13 },
 1560     { ISD::SINT_TO_FP, MVT::v4f32, MVT::v16i8, 8 },
 1561     { ISD::SINT_TO_FP, MVT::v2f64, MVT::v16i8, 16*10 },
 1562     { ISD::SINT_TO_FP, MVT::v4f32, MVT::v8i16, 15 },
 1563     { ISD::SINT_TO_FP, MVT::v2f64, MVT::v8i16, 8*10 },
 1564     { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i32, 5 },
 1565     { ISD::SINT_TO_FP, MVT::v2f64, MVT::v4i32, 2*10 },
 1566     { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i32, 2*10 },
 1567     { ISD::SINT_TO_FP, MVT::v4f32, MVT::v2i64, 15 },
 1568     { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i64, 2*10 },