|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
include/llvm/CodeGen/SelectionDAG.h 1778 ID.AddPointer(VTs.VTs);
include/llvm/CodeGen/SelectionDAGNodes.h 1106 : NodeType(Opc), ValueList(VTs.VTs), NumValues(VTs.NumVTs),
lib/CodeGen/SelectionDAG/SelectionDAG.cpp 443 ID.AddPointer(VTList.VTs);
6596 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
7275 return getNode(Opcode, DL, VTList.VTs[0], Ops);
7302 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
7699 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
7711 N->ValueList = VTs.VTs;
7914 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
7964 if (VTList.VTs[VTList.NumVTs - 1] != MVT::Glue) {
lib/Target/AMDGPU/SIISelLowering.cpp 6714 EVT VT = VTList.VTs[0];
6727 SDVTList WidenedVTList = DAG.getVTList(WidenedVT, VTList.VTs[1]);
lib/Target/Hexagon/HexagonISelLowering.cpp 2750 assert(VTs.VTs[1] == MVT::i1);
2761 SDValue Op = DAG.getNode(ISD::ADD, dl, VTs.VTs[0], {X, Y});
2767 SDValue Op = DAG.getNode(ISD::SUB, dl, VTs.VTs[0], {X, Y});
lib/Target/PowerPC/PPCISelDAGToDAG.cpp 6337 if (VTs.VTs[i] == MVT::i32)
6340 NewVTs.push_back(VTs.VTs[i]);