reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Declarations

include/llvm/CodeGen/SelectionDAGNodes.h
  183   inline unsigned getNumOperands() const;

References

lib/CodeGen/SelectionDAG/DAGCombiner.cpp
 4259   if (N0.getNumOperands() == 0)
10672       unsigned BuildVecNumElts =  BuildVect.getNumOperands();
10729     for (unsigned i = 0, e = N0.getNumOperands(); i != e; ++i) {
16353       for (unsigned Nops = Chain.getNumOperands(); Nops;)
17862       unsigned NumOps = N->getNumOperands() * In.getNumOperands();
18156     if (V.getOpcode() == ISD::CONCAT_VECTORS && V.getNumOperands() == 2)
18368   if (N0.getOpcode() != ISD::CONCAT_VECTORS || N0.getNumOperands() != 2 ||
18369       N1.getOpcode() != ISD::CONCAT_VECTORS || N1.getNumOperands() != 2 ||
18464     if (OpIdx < (int)N0.getNumOperands())
18467       Ops.push_back(N1.getOperand(OpIdx - N0.getNumOperands()));
19462   unsigned NumElts = RHS.getNumOperands();
19662       unsigned NumOperands = LHS.getNumOperands();
20687       if (Chain.getNumOperands() > 16) {
20691       for (unsigned n = Chain.getNumOperands(); n;)
lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
  544   SmallVector<SDValue, 4> Operands(Op.getNumOperands());
  546   for (unsigned j = 0; j != Op.getNumOperands(); ++j) {
  578   SmallVector<SDValue, 4> Operands(Op.getNumOperands());
  582   for (unsigned j = 0; j != Op.getNumOperands(); ++j) {
 1372   unsigned NumOpers = Op.getNumOperands();
lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  280   for (unsigned i = 0, e = Op.getNumOperands(); i != e; ++i) {
  312   for (unsigned i = 0, e = LHS.getNumOperands(); i != e; ++i) {
 2468     for (unsigned i = 0, e = Op.getNumOperands(); i != e; ++i) {
 2540     unsigned NumSubVectors = Op.getNumOperands();
 3442     for (unsigned i = 0, e = Op.getNumOperands(); (i < e) && (Tmp > 1); ++i) {
 3840     unsigned NumSubVectors = Op.getNumOperands();
 5245         N1.getNumOperands() > 0) {
 5346           N1.getNumOperands() > 0 &&
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
 2477   if (ChildNo >= N.getNumOperands())
 2519   if (ChildNo >= N.getNumOperands())
 2535   if (2 >= N.getNumOperands())
 2565   if (ChildNo >= N.getNumOperands())
 2952       if (ChildNo >= N.getNumOperands())
 2978       if (ChildNo >= N.getNumOperands())
 2990       if (ChildNo >= N.getNumOperands())
lib/CodeGen/SelectionDAG/TargetLowering.cpp
  513   assert(Op.getNumOperands() == 2 &&
  932     unsigned NumSubVecs = Op.getNumOperands();
 2245     unsigned NumSubVecs = Op.getNumOperands();
lib/Target/AArch64/AArch64ISelLowering.cpp
 5597   assert(Op.getNumOperands() == 3 && "Not a double-shift!");
 5654   assert(Op.getNumOperands() == 3 && "Not a double-shift!");
lib/Target/AMDGPU/SIISelLowering.cpp
 8188   if (V.getNumOperands() != 2)
 8800     for (unsigned I = 0, E = Op.getNumOperands(); I != E; ++I) {
 8812     for (unsigned i = 0, e = Op.getNumOperands(); i != e; ++i) {
lib/Target/ARM/ARMISelLowering.cpp
 5791   assert(Op.getNumOperands() == 3 && "Not a double-shift!");
 5835   assert(Op.getNumOperands() == 3 && "Not a double-shift!");
 7834         for (unsigned i = 1, e = V1.getNumOperands(); i != e; ++i)
 8157   assert(Op.getValueType().is128BitVector() && Op.getNumOperands() == 2 &&
 9300     assert(Res.getNumOperands() == 2 && "DivRem needs two values");
12832       Op0.getNumOperands() != 2 ||
12833       Op1.getNumOperands() != 2)
lib/Target/Hexagon/HexagonISelLowering.cpp
  585   unsigned NumOps = Op.getNumOperands();
 2473   for (unsigned i = 0, e = Op.getNumOperands(); i != e; ++i)
 2527     assert(Op.getNumOperands() == 2);
 2539     assert(Scale == Op.getNumOperands() && Scale > 1);
lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
 1024   unsigned Size = Op.getNumOperands();
 1051   unsigned NumOp = Op.getNumOperands();
lib/Target/Lanai/LanaiISelLowering.cpp
 1240   assert(Op.getNumOperands() == 3 && "Unexpected SHL!");
lib/Target/Mips/MipsISelLowering.cpp
 2986           Node->getOperand(0).getNumOperands() < 2) {
lib/Target/NVPTX/NVPTXISelLowering.cpp
 1963   assert(Op.getNumOperands() == 3 && "Not a double-shift!");
 2024   assert(Op.getNumOperands() == 3 && "Not a double-shift!");
lib/Target/PowerPC/PPCISelDAGToDAG.cpp
 2615     for (int i = 0, e = OpToConvToRecForm.getNumOperands(); i < e; i++)
lib/Target/PowerPC/PPCISelLowering.cpp
 8021   assert(Op.getNumOperands() == 3 &&
 8050   assert(Op.getNumOperands() == 3 &&
 8079   assert(Op.getNumOperands() == 3 &&
10052     assert(Op0.getNumOperands() == 2 &&
10079     for (unsigned i = 0, ie = Op0.getNumOperands(); i != ie; ++i) {
12129     for (unsigned i = 0, ie = BinOp.getNumOperands(); i != ie; ++i) {
12345     for (unsigned i = 0, ie = BinOp.getNumOperands(); i != ie; ++i) {
lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
 1286     for (unsigned i = 0, e = Chain.getNumOperands(); i != e; ++i) {
lib/Target/SystemZ/SystemZISelLowering.cpp
 1898   unsigned NumOps = Op.getNumOperands();
 1918   unsigned NumOps = Op.getNumOperands();
 4459   for (unsigned I = 1, E = Op.getNumOperands(); I != E; ++I)
 4745   unsigned NumElements = Op.getNumOperands();
lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
 1041                                   Op.getNumOperands() == 4 ? Op.getOperand(3)
 1295   const size_t Lanes = Op.getNumOperands();
 1479   SDNode *IdxNode = Op.getOperand(Op.getNumOperands() - 1).getNode();
lib/Target/X86/X86ISelDAGToDAG.cpp
  726     for (unsigned i = 0, e = Chain.getNumOperands(); i != e; ++i)
  773   if (!Chain.getNumOperands())
 2888     for (unsigned i = 0, e = Chain.getNumOperands(); i != e; ++i) {
lib/Target/X86/X86ISelLowering.cpp
 6071     for (unsigned i = 0, e = Op.getNumOperands(); i != e; ++i) {
 6088     for (unsigned i = 0, e = Op.getNumOperands(); i != e; ++i) {
 8418   unsigned NumElems = Op.getNumOperands();
 8486   for (unsigned idx = 0, e = Op.getNumOperands(); idx < e; ++idx) {
 8513   for (unsigned idx = 0, e = Op.getNumOperands(); idx < e; ++idx) {
 9544   for (unsigned Idx = 0, E = V.getNumOperands(); Idx != E; ++Idx) {
 9588   unsigned NumElems = Op.getNumOperands();
 9959   unsigned NumOperands = Op.getNumOperands();
10014   unsigned NumOperands = Op.getNumOperands();
10095   assert((VT.is256BitVector() && Op.getNumOperands() == 2) ||
10096          (VT.is512BitVector() && (Op.getNumOperands() == 2 ||
10097           Op.getNumOperands() == 4)));
10466     if ((Size % V.getNumOperands()) == 0) {
10489     if ((V.getNumOperands() % Size) == 0) {
18230   assert(Op.getNumOperands() == 3 && "Not a double-shift!");
22335   assert(Op.getNumOperands() == 4);
22923       if (Op.getNumOperands() == (5U + HasRounding)) {
22940       assert(Op.getNumOperands() == (6U + HasRounding) &&
25685     for (unsigned i = Ratio, e = Amt.getNumOperands(); i != e; i += Ratio) {
27355       InOp.getNumOperands() == 2) {
33996       N1.getOpcode() != ISD::CONCAT_VECTORS || N0.getNumOperands() != 2 ||
33997       N1.getNumOperands() != 2 || !N0.getOperand(1).isUndef() ||
35322   for (unsigned Idx = 0, e = Op.getNumOperands(); Idx < e; ++Idx) {
35516         SDValue LastOp = N0.getOperand(N0.getNumOperands() - 1);
39161   SmallVector<SDValue, 4> Ops(Src.getNumOperands(),
41660     SmallVector<SDValue, 4> NewOps(Op.getNumOperands(), SDValue());
41675     for (int i = 0, e = Op.getNumOperands(); i != e; ++i)
42909     for (unsigned Idx = 0, e = Src.getNumOperands(); Idx < e; ++Idx) {
43994   for (unsigned i = 0; i != N00.getNumOperands(); ++i) {