reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AMDGPU/AMDGPUGenDAGISel.inc

79510     unsigned Reg = cast<RegisterSDNode>(Use->getOperand(1))->getReg();

lib/CodeGen/SelectionDAG/InstrEmitter.cpp

   74       if (Register::isPhysicalRegister(RN->getReg()))
  116         unsigned DestReg = cast<RegisterSDNode>(User->getOperand(1))->getReg();
  221       VRBase = cast<RegisterSDNode>(Node->getOperand(i-NumResults))->getReg();
  231           unsigned Reg = cast<RegisterSDNode>(User->getOperand(1))->getReg();
  376     unsigned VReg = R->getReg();
  486       unsigned DestReg = cast<RegisterSDNode>(User->getOperand(1))->getReg();
  505     if (R && Register::isPhysicalRegister(R->getReg())) {
  506       Reg = R->getReg();
  509       Reg = R ? R->getReg() : getVR(Node->getOperand(0), VRBaseMap);
  651       if (!R || !Register::isPhysicalRegister(R->getReg())) {
  947         UsedRegs.push_back(cast<RegisterSDNode>(F->getOperand(1))->getReg());
  961           Register Reg = R->getReg();
  994     unsigned DestReg = cast<RegisterSDNode>(Node->getOperand(1))->getReg();
 1006       SrcReg = R->getReg();
 1018     unsigned SrcReg = cast<RegisterSDNode>(Node->getOperand(1))->getReg();
 1089           unsigned Reg = cast<RegisterSDNode>(Node->getOperand(i))->getReg();
 1101           unsigned Reg = cast<RegisterSDNode>(Node->getOperand(i))->getReg();

lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp

  500             unsigned Reg = cast<RegisterSDNode>(Node->getOperand(i))->getReg();

lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp

  324       unsigned Reg = cast<RegisterSDNode>(Node->getOperand(1))->getReg();
 1380             unsigned Reg = cast<RegisterSDNode>(Node->getOperand(i))->getReg();
 1421           unsigned Reg = cast<RegisterSDNode>(OptionalDef)->getReg();
 2364         cast<RegisterSDNode>(PredSU->getNode()->getOperand(1))->getReg();
 2385         cast<RegisterSDNode>(SuccSU->getNode()->getOperand(1))->getReg();
 2956               cast<RegisterSDNode>(N->getOperand(1))->getReg()))
 3003               cast<RegisterSDNode>(N->getOperand(1))->getReg()))

lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp

  117   unsigned Reg = cast<RegisterSDNode>(User->getOperand(1))->getReg();
  123       cast<RegisterSDNode>(Def->getOperand(1))->getReg() == Reg) {
  658     unsigned Reg = cast<RegisterSDNode>(Use->getOperand(1))->getReg();

lib/CodeGen/SelectionDAG/SelectionDAG.cpp

  504     ID.AddInteger(cast<RegisterSDNode>(N)->getReg());

lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

 5397     Regs.emplace_back(cast<RegisterSDNode>(Op)->getReg(),
 9372           cast<RegisterSDNode>(Op.getOperand(1))->getReg() != Reg) &&
 9872       unsigned Reg = cast<RegisterSDNode>(Res.getOperand(1))->getReg();
 9884       unsigned Reg = cast<RegisterSDNode>(Res.getOperand(1))->getReg();

lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp

  621     OS << ' ' << printReg(R->getReg(),

lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

  761     unsigned DestReg = cast<RegisterSDNode>(N->getOperand(1))->getReg();

lib/CodeGen/SelectionDAG/TargetLowering.cpp

   92     unsigned ArgReg = cast<RegisterSDNode>(Value->getOperand(1))->getReg();

lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp

  549       unsigned Reg = cast<RegisterSDNode>(N->getOperand(1))->getReg();

lib/Target/AMDGPU/R600ISelLowering.cpp

 2138         if (Reg->getReg() == R600::ALU_CONST) {

lib/Target/AMDGPU/SIISelLowering.cpp

10256         Register::isPhysicalRegister(DestReg->getReg())) {
10836       unsigned Reg = R->getReg();

lib/Target/ARM/ARMISelDAGToDAG.cpp

 2947           cast<RegisterSDNode>(Ptr.getOperand(1))->getReg() == ARM::SP &&
 4709     unsigned Reg0 = cast<RegisterSDNode>(V0)->getReg();
 4710     unsigned Reg1 = cast<RegisterSDNode>(V1)->getReg();

lib/Target/ARM/ARMISelLowering.cpp

 2514     unsigned VR = cast<RegisterSDNode>(Arg.getOperand(1))->getReg();

lib/Target/AVR/AVRISelDAGToDAG.cpp

  219       RI.getRegClass(RegNode->getReg()) == &AVR::PTRDISPREGSRegClass) {
  253       Reg = RegNode->getReg();
  337   if (!RN || (RN->getReg() != AVR::SP)) {

lib/Target/Hexagon/HexagonISelLowering.cpp

  606           unsigned Reg = cast<RegisterSDNode>(Op.getOperand(i))->getReg();

lib/Target/PowerPC/PPCISelLowering.cpp

 5254              cast<RegisterSDNode>(Callee)->getReg() == PPC::CTR) ||

lib/Target/Sparc/SparcISelDAGToDAG.cpp

  224     unsigned Reg0 = cast<RegisterSDNode>(V0)->getReg();
  225     unsigned Reg1 = cast<RegisterSDNode>(V1)->getReg();

lib/Target/Sparc/SparcISelLowering.cpp

 1310       if (SrcReg->getReg() == Reg && Chain->getOpcode() == ISD::CopyFromReg)

lib/Target/SystemZ/SystemZISelDAGToDAG.cpp

 1715         cast<RegisterSDNode>(CCUser->getOperand(1))->getReg() == SystemZ::CC) {

lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

 1032     unsigned Reg = cast<RegisterSDNode>(Op.getOperand(1))->getReg();

lib/Target/X86/X86ISelDAGToDAG.cpp

   98         return RegNode->getReg() == X86::RIP;
  394             if ((RegNode->getReg() == X86::ESP) ||
  395                 (RegNode->getReg() == X86::RSP))
 2404   if (RN && RN->getReg() == 0)
 2415   if (RN && RN->getReg() == 0)
 2668         cast<RegisterSDNode>(UI->getOperand(1))->getReg() != X86::EFLAGS)
 2704         cast<RegisterSDNode>(UI->getOperand(1))->getReg() != X86::EFLAGS)
 2763       if (cast<RegisterSDNode>(UI->getOperand(1))->getReg() != X86::EFLAGS)

lib/Target/X86/X86ISelLowering.cpp

 4234     unsigned VR = cast<RegisterSDNode>(Arg.getOperand(1))->getReg();