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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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Declarations
include/llvm/IR/Value.h 43 class InlineAsm;
include/llvm/Transforms/Utils/FunctionComparator.h 36 class InlineAsm;
References
include/llvm/ADT/DenseMapInfo.h 39 static inline T* getEmptyKey() {
41 Val <<= PointerLikeTypeTraits<T*>::NumLowBitsAvailable;
45 static inline T* getTombstoneKey() {
47 Val <<= PointerLikeTypeTraits<T*>::NumLowBitsAvailable;
51 static unsigned getHashValue(const T *PtrVal) {
56 static bool isEqual(const T *LHS, const T *RHS) { return LHS == RHS; }
56 static bool isEqual(const T *LHS, const T *RHS) { return LHS == RHS; }
include/llvm/CodeGen/Analysis.h 101 bool hasInlineAsmMemConstraint(InlineAsm::ConstraintInfoVector &CInfos,
include/llvm/CodeGen/AsmPrinter.h 665 InlineAsm::AsmDialect AsmDialect = InlineAsm::AD_ATT) const;
665 InlineAsm::AsmDialect AsmDialect = InlineAsm::AD_ATT) const;
include/llvm/CodeGen/MachineInstr.h 781 unsigned ExtraInfo = getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
782 if (ExtraInfo & InlineAsm::Extra_IsConvergent)
858 unsigned ExtraInfo = getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
859 if (ExtraInfo & InlineAsm::Extra_MayLoad)
871 unsigned ExtraInfo = getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
872 if (ExtraInfo & InlineAsm::Extra_MayStore)
1093 return isInlineAsm() && getInlineAsmDialect() == InlineAsm::AD_Intel;
1097 InlineAsm::AsmDialect getInlineAsmDialect() const;
include/llvm/CodeGen/TargetLowering.h 3868 struct AsmOperandInfo : public InlineAsm::ConstraintInfo {
3887 AsmOperandInfo(InlineAsm::ConstraintInfo Info)
3945 return InlineAsm::Constraint_i;
3947 return InlineAsm::Constraint_m;
3948 return InlineAsm::Constraint_Unknown;
include/llvm/IR/DerivedTypes.h 175 FunctionCallee(T *Fn)
include/llvm/IR/InlineAsm.h 56 InlineAsm(const InlineAsm &) = delete;
57 InlineAsm &operator=(const InlineAsm &) = delete;
57 InlineAsm &operator=(const InlineAsm &) = delete;
61 static InlineAsm *get(FunctionType *Ty, StringRef AsmString,
include/llvm/IR/InstrTypes.h 1361 bool isInlineAsm() const { return isa<InlineAsm>(getCalledOperand()); }
include/llvm/Support/Casting.h 77 return isa_impl<To, From>::doit(Val);
106 return isa_impl<To, From>::doit(*Val);
122 return isa_impl_wrap<To, SimpleFrom,
132 return isa_impl_cl<To,FromTy>::doit(Val);
142 return isa_impl_wrap<X, const Y,
165 using ret_type = To &; // Normal case, return Ty&
168 using ret_type = const To &; // Normal case, return Ty&
172 using ret_type = To *; // Pointer arg case, return Ty*
176 using ret_type = const To *; // Constant pointer arg case, return const Ty*
198 using ret_type = typename cast_retty<To, SimpleFrom>::ret_type;
204 using ret_type = typename cast_retty_impl<To,FromTy>::ret_type;
210 To, From, typename simplify_type<From>::SimpleType>::ret_type;
227 static typename cast_retty<To, FromTy>::ret_type doit(const FromTy &Val) {
228 typename cast_retty<To, FromTy>::ret_type Res2
256 inline typename cast_retty<X, Y>::ret_type cast(Y &Val) {
258 return cast_convert_val<X, Y,
263 inline typename cast_retty<X, Y *>::ret_type cast(Y *Val) {
265 return cast_convert_val<X, Y*,
337 LLVM_NODISCARD inline typename cast_retty<X, Y>::ret_type dyn_cast(Y &Val) {
342 LLVM_NODISCARD inline typename cast_retty<X, Y *>::ret_type dyn_cast(Y *Val) {
343 return isa<X>(Val) ? cast<X>(Val) : nullptr;
343 return isa<X>(Val) ? cast<X>(Val) : nullptr;
366 LLVM_NODISCARD inline typename cast_retty<X, Y *>::ret_type
368 return (Val && isa<X>(Val)) ? cast<X>(Val) : nullptr;
368 return (Val && isa<X>(Val)) ? cast<X>(Val) : nullptr;
include/llvm/Support/PointerLikeTypeTraits.h 56 static inline void *getAsVoidPointer(T *P) { return P; }
57 static inline T *getFromVoidPointer(void *P) { return static_cast<T *>(P); }
59 enum { NumLowBitsAvailable = detail::ConstantLog2<alignof(T)>::value };
include/llvm/Transforms/Utils/FunctionComparator.h 332 int cmpInlineAsm(const InlineAsm *L, const InlineAsm *R) const;
332 int cmpInlineAsm(const InlineAsm *L, const InlineAsm *R) const;
lib/AsmParser/LLParser.cpp 5148 if (!ID.FTy || !InlineAsm::Verify(ID.FTy, ID.StrVal2))
5150 V = InlineAsm::get(ID.FTy, ID.StrVal, ID.StrVal2, ID.UIntVal & 1,
6416 if (isa<InlineAsm>(Callee) && !Ty->getReturnType()->isVoidTy())
lib/Bitcode/Reader/BitcodeReader.cpp 2747 V = InlineAsm::get(
2773 V = InlineAsm::get(
lib/Bitcode/Writer/BitcodeWriter.cpp 2320 if (const InlineAsm *IA = dyn_cast<InlineAsm>(V)) {
2320 if (const InlineAsm *IA = dyn_cast<InlineAsm>(V)) {
lib/CodeGen/Analysis.cpp 179 llvm::hasInlineAsmMemConstraint(InlineAsm::ConstraintInfoVector &CInfos,
182 InlineAsm::ConstraintInfo &CI = CInfos[i];
lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp 112 InlineAsm::AsmDialect Dialect) const {
158 if (Dialect == InlineAsm::AD_Intel)
243 unsigned OpNo = InlineAsm::MIOp_FirstOperand;
251 OpNo += InlineAsm::getNumOperandRegisters(OpFlags) + 1;
264 if (InlineAsm::isMemKind(OpFlags)) {
407 unsigned OpNo = InlineAsm::MIOp_FirstOperand;
415 OpNo += InlineAsm::getNumOperandRegisters(OpFlags) + 1;
443 if (InlineAsm::isMemKind(OpFlags)) {
518 if (MI->getInlineAsmDialect() == InlineAsm::AD_ATT)
527 for (unsigned I = InlineAsm::MIOp_FirstOperand, NumOps = MI->getNumOperands();
533 if (InlineAsm::getKind(Flags) == InlineAsm::Kind_Clobber &&
533 if (InlineAsm::getKind(Flags) == InlineAsm::Kind_Clobber &&
538 I += InlineAsm::getNumOperandRegisters(Flags);
lib/CodeGen/CodeGenPrepare.cpp 1780 if (TLI && isa<InlineAsm>(CI->getCalledValue())) {
4387 static bool IsOperandAMemoryOperand(CallInst *CI, InlineAsm *IA, Value *OpVal,
4477 InlineAsm *IA = dyn_cast<InlineAsm>(CI->getCalledValue());
4477 InlineAsm *IA = dyn_cast<InlineAsm>(CI->getCalledValue());
5049 } else if (OpInfo.Type == InlineAsm::isInput)
lib/CodeGen/GlobalISel/IRTranslator.cpp 1527 const InlineAsm &IA = cast<InlineAsm>(*CI.getCalledValue());
1527 const InlineAsm &IA = cast<InlineAsm>(*CI.getCalledValue());
1533 ExtraInfo |= InlineAsm::Extra_HasSideEffects;
1534 if (IA.getDialect() == InlineAsm::AD_Intel)
1535 ExtraInfo |= InlineAsm::Extra_AsmDialect;
1679 if (isa<InlineAsm>(Callee))
lib/CodeGen/MachineFrameInfo.cpp 206 unsigned ExtraInfo = MI.getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
207 if (ExtraInfo & InlineAsm::Extra_IsAlignStack)
lib/CodeGen/MachineInstr.cpp 770 unsigned ExtraInfo = getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
771 if (ExtraInfo & InlineAsm::Extra_IsAlignStack)
777 InlineAsm::AsmDialect MachineInstr::getInlineAsmDialect() const {
779 unsigned ExtraInfo = getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
780 return InlineAsm::AsmDialect((ExtraInfo & InlineAsm::Extra_AsmDialect) != 0);
789 if (OpIdx < InlineAsm::MIOp_FirstOperand)
794 for (unsigned i = InlineAsm::MIOp_FirstOperand, e = getNumOperands(); i < e;
800 NumOps = 1 + InlineAsm::getNumOperandRegisters(FlagMO.getImm());
857 if ((InlineAsm::getKind(Flag) == InlineAsm::Kind_RegUse ||
857 if ((InlineAsm::getKind(Flag) == InlineAsm::Kind_RegUse ||
858 InlineAsm::getKind(Flag) == InlineAsm::Kind_RegDef ||
858 InlineAsm::getKind(Flag) == InlineAsm::Kind_RegDef ||
859 InlineAsm::getKind(Flag) == InlineAsm::Kind_RegDefEarlyClobber) &&
859 InlineAsm::getKind(Flag) == InlineAsm::Kind_RegDefEarlyClobber) &&
860 InlineAsm::hasRegClassConstraint(Flag, RCID))
864 if (InlineAsm::getKind(Flag) == InlineAsm::Kind_Mem)
864 if (InlineAsm::getKind(Flag) == InlineAsm::Kind_Mem)
1102 for (unsigned i = InlineAsm::MIOp_FirstOperand, e = getNumOperands(); i < e;
1108 NumOps = 1 + InlineAsm::getNumOperandRegisters(FlagMO.getImm());
1113 if (!InlineAsm::isUseOperandTiedToDef(FlagMO.getImm(), TiedGroup))
1372 unsigned ExtraInfo = getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
1373 if (ExtraInfo & InlineAsm::Extra_HasSideEffects)
1558 if (isInlineAsm() && e >= InlineAsm::MIOp_FirstOperand) {
1561 const unsigned OpIdx = InlineAsm::MIOp_AsmString;
1569 unsigned ExtraInfo = getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
1570 if (ExtraInfo & InlineAsm::Extra_HasSideEffects)
1572 if (ExtraInfo & InlineAsm::Extra_MayLoad)
1574 if (ExtraInfo & InlineAsm::Extra_MayStore)
1576 if (ExtraInfo & InlineAsm::Extra_IsConvergent)
1578 if (ExtraInfo & InlineAsm::Extra_IsAlignStack)
1580 if (getInlineAsmDialect() == InlineAsm::AD_ATT)
1582 if (getInlineAsmDialect() == InlineAsm::AD_Intel)
1585 StartOp = AsmDescOp = InlineAsm::MIOp_FirstOperand;
1621 switch (InlineAsm::getKind(Flag)) {
1622 case InlineAsm::Kind_RegUse: OS << ":[reguse"; break;
1623 case InlineAsm::Kind_RegDef: OS << ":[regdef"; break;
1624 case InlineAsm::Kind_RegDefEarlyClobber: OS << ":[regdef-ec"; break;
1625 case InlineAsm::Kind_Clobber: OS << ":[clobber"; break;
1626 case InlineAsm::Kind_Imm: OS << ":[imm"; break;
1627 case InlineAsm::Kind_Mem: OS << ":[mem"; break;
1628 default: OS << ":[??" << InlineAsm::getKind(Flag); break;
1632 if (!InlineAsm::isImmKind(Flag) && !InlineAsm::isMemKind(Flag) &&
1632 if (!InlineAsm::isImmKind(Flag) && !InlineAsm::isMemKind(Flag) &&
1633 InlineAsm::hasRegClassConstraint(Flag, RCID)) {
1640 if (InlineAsm::isMemKind(Flag)) {
1641 unsigned MCID = InlineAsm::getMemoryConstraintID(Flag);
1643 case InlineAsm::Constraint_es: OS << ":es"; break;
1644 case InlineAsm::Constraint_i: OS << ":i"; break;
1645 case InlineAsm::Constraint_m: OS << ":m"; break;
1646 case InlineAsm::Constraint_o: OS << ":o"; break;
1647 case InlineAsm::Constraint_v: OS << ":v"; break;
1648 case InlineAsm::Constraint_Q: OS << ":Q"; break;
1649 case InlineAsm::Constraint_R: OS << ":R"; break;
1650 case InlineAsm::Constraint_S: OS << ":S"; break;
1651 case InlineAsm::Constraint_T: OS << ":T"; break;
1652 case InlineAsm::Constraint_Um: OS << ":Um"; break;
1653 case InlineAsm::Constraint_Un: OS << ":Un"; break;
1654 case InlineAsm::Constraint_Uq: OS << ":Uq"; break;
1655 case InlineAsm::Constraint_Us: OS << ":Us"; break;
1656 case InlineAsm::Constraint_Ut: OS << ":Ut"; break;
1657 case InlineAsm::Constraint_Uv: OS << ":Uv"; break;
1658 case InlineAsm::Constraint_Uy: OS << ":Uy"; break;
1659 case InlineAsm::Constraint_X: OS << ":X"; break;
1660 case InlineAsm::Constraint_Z: OS << ":Z"; break;
1661 case InlineAsm::Constraint_ZC: OS << ":ZC"; break;
1662 case InlineAsm::Constraint_Zy: OS << ":Zy"; break;
1668 if (InlineAsm::isUseOperandTiedToDef(Flag, TiedTo))
1674 AsmDescOp += 1 + InlineAsm::getNumOperandRegisters(Flag);
lib/CodeGen/MachineVerifier.cpp 867 static_assert(InlineAsm::MIOp_FirstOperand == 2, "Asm format changed");
869 unsigned OpNo = InlineAsm::MIOp_FirstOperand;
876 NumOps = 1 + InlineAsm::getNumOperandRegisters(MO.getImm());
lib/CodeGen/PrologEpilogInserter.cpp 324 unsigned ExtraInfo = I->getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
325 if (ExtraInfo & InlineAsm::Extra_IsAlignStack)
lib/CodeGen/SelectionDAG/FastISel.cpp 1291 if (const InlineAsm *IA = dyn_cast<InlineAsm>(Call->getCalledValue())) {
1291 if (const InlineAsm *IA = dyn_cast<InlineAsm>(Call->getCalledValue())) {
1303 ExtraInfo |= InlineAsm::Extra_HasSideEffects;
1305 ExtraInfo |= InlineAsm::Extra_IsAlignStack;
1306 ExtraInfo |= IA->getDialect() * InlineAsm::Extra_AsmDialect;
lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp 182 if (isa<InlineAsm>(CS.getCalledValue())) {
188 if (Op.Type == InlineAsm::isClobber) {
lib/CodeGen/SelectionDAG/InstrEmitter.cpp 1058 SDValue AsmStrV = Node->getOperand(InlineAsm::Op_AsmString);
1065 cast<ConstantSDNode>(Node->getOperand(InlineAsm::Op_ExtraInfo))->
1076 for (unsigned i = InlineAsm::Op_FirstOperand; i != NumOps;) {
1079 const unsigned NumVals = InlineAsm::getNumOperandRegisters(Flags);
1085 switch (InlineAsm::getKind(Flags)) {
1087 case InlineAsm::Kind_RegDef:
1098 case InlineAsm::Kind_RegDefEarlyClobber:
1099 case InlineAsm::Kind_Clobber:
1108 case InlineAsm::Kind_RegUse: // Use of register.
1109 case InlineAsm::Kind_Imm: // Immediate.
1110 case InlineAsm::Kind_Mem: // Addressing mode.
1118 if (InlineAsm::getKind(Flags) == InlineAsm::Kind_RegUse) {
1118 if (InlineAsm::getKind(Flags) == InlineAsm::Kind_RegUse) {
1120 if (InlineAsm::isUseOperandTiedToDef(Flags, DefGroup)) {
1146 SDValue MDV = Node->getOperand(InlineAsm::Op_MDNode);
lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp 489 for (unsigned i = InlineAsm::Op_FirstOperand; i != NumOps;) {
492 unsigned NumVals = InlineAsm::getNumOperandRegisters(Flags);
495 if (InlineAsm::isRegDefKind(Flags) ||
496 InlineAsm::isRegDefEarlyClobberKind(Flags) ||
497 InlineAsm::isClobberKind(Flags)) {
lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp 1369 for (unsigned i = InlineAsm::Op_FirstOperand; i != NumOps;) {
1372 unsigned NumVals = InlineAsm::getNumOperandRegisters(Flags);
1375 if (InlineAsm::isRegDefKind(Flags) ||
1376 InlineAsm::isRegDefEarlyClobberKind(Flags) ||
1377 InlineAsm::isClobberKind(Flags)) {
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp 346 if (isa<InlineAsm>(CI->getCalledValue()))
948 unsigned Flag = InlineAsm::getFlagWord(Code, Regs.size());
950 Flag = InlineAsm::getFlagWordForMatchingOp(Flag, MatchingIdx);
959 Flag = InlineAsm::getFlagWordForRegClass(Flag, RC->getID());
965 if (Code == InlineAsm::Kind_Clobber) {
2756 if (isa<InlineAsm>(Callee))
7536 if (isa<InlineAsm>(I.getCalledValue())) {
7917 if ((OpInfo.Type == InlineAsm::isOutput ||
7918 OpInfo.Type == InlineAsm::isInput) &&
7928 if (OpInfo.Type == InlineAsm::isInput && !OpInfo.isIndirect)
7937 if (OpInfo.Type == InlineAsm::isInput)
7988 unsigned CurOp = InlineAsm::Op_FirstOperand;
7997 CurOp += InlineAsm::getNumOperandRegisters(OpFlag) + 1;
8009 const InlineAsm *IA = cast<InlineAsm>(CS.getCalledValue());
8009 const InlineAsm *IA = cast<InlineAsm>(CS.getCalledValue());
8011 Flags |= InlineAsm::Extra_HasSideEffects;
8013 Flags |= InlineAsm::Extra_IsAlignStack;
8015 Flags |= InlineAsm::Extra_IsConvergent;
8016 Flags |= IA->getDialect() * InlineAsm::Extra_AsmDialect;
8026 if (OpInfo.Type == InlineAsm::isInput)
8027 Flags |= InlineAsm::Extra_MayLoad;
8028 else if (OpInfo.Type == InlineAsm::isOutput)
8029 Flags |= InlineAsm::Extra_MayStore;
8030 else if (OpInfo.Type == InlineAsm::isClobber)
8031 Flags |= (InlineAsm::Extra_MayLoad | InlineAsm::Extra_MayStore);
8031 Flags |= (InlineAsm::Extra_MayLoad | InlineAsm::Extra_MayStore);
8042 const InlineAsm *IA = cast<InlineAsm>(CS.getCalledValue());
8042 const InlineAsm *IA = cast<InlineAsm>(CS.getCalledValue());
8063 if (OpInfo.Type == InlineAsm::isInput ||
8064 (OpInfo.Type == InlineAsm::isOutput && OpInfo.isIndirect)) {
8086 } else if (OpInfo.Type == InlineAsm::isOutput && !OpInfo.isIndirect) {
8151 OpInfo.Type == InlineAsm::isClobber)
8202 case InlineAsm::isOutput:
8213 unsigned OpFlags = InlineAsm::getFlagWord(InlineAsm::Kind_Mem, 1);
8213 unsigned OpFlags = InlineAsm::getFlagWord(InlineAsm::Kind_Mem, 1);
8214 OpFlags = InlineAsm::getFlagWordForMem(OpFlags, ConstraintID);
8237 OpInfo.isEarlyClobber ? InlineAsm::Kind_RegDefEarlyClobber
8238 : InlineAsm::Kind_RegDef,
8243 case InlineAsm::isInput: {
8253 if (InlineAsm::isRegDefKind(OpFlag) ||
8254 InlineAsm::isRegDefEarlyClobberKind(OpFlag)) {
8268 unsigned NumRegs = InlineAsm::getNumOperandRegisters(OpFlag);
8285 MatchedRegs.AddInlineAsmOperands(InlineAsm::Kind_RegUse,
8296 OpFlag = InlineAsm::convertMemFlagWordToMatchingFlagWord(OpFlag);
8297 OpFlag = InlineAsm::getFlagWordForMatchingOp(OpFlag,
8331 InlineAsm::getFlagWord(InlineAsm::Kind_Imm, Ops.size());
8331 InlineAsm::getFlagWord(InlineAsm::Kind_Imm, Ops.size());
8350 unsigned ResOpType = InlineAsm::getFlagWord(InlineAsm::Kind_Mem, 1);
8350 unsigned ResOpType = InlineAsm::getFlagWord(InlineAsm::Kind_Mem, 1);
8351 ResOpType = InlineAsm::getFlagWordForMem(ResOpType, ConstraintID);
8385 OpInfo.AssignedRegs.AddInlineAsmOperands(InlineAsm::Kind_RegUse, false, 0,
8389 case InlineAsm::isClobber:
8393 OpInfo.AssignedRegs.AddInlineAsmOperands(InlineAsm::Kind_Clobber,
8401 AsmNodeOperands[InlineAsm::Op_InputChain] = Chain;
8455 if (OpInfo.Type == InlineAsm::isOutput) {
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp 2035 Ops.push_back(InOps[InlineAsm::Op_InputChain]); // 0
2036 Ops.push_back(InOps[InlineAsm::Op_AsmString]); // 1
2037 Ops.push_back(InOps[InlineAsm::Op_MDNode]); // 2, !srcloc
2038 Ops.push_back(InOps[InlineAsm::Op_ExtraInfo]); // 3 (SideEffect, AlignStack)
2040 unsigned i = InlineAsm::Op_FirstOperand, e = InOps.size();
2046 if (!InlineAsm::isMemKind(Flags)) {
2049 InOps.begin()+i+InlineAsm::getNumOperandRegisters(Flags) + 1);
2050 i += InlineAsm::getNumOperandRegisters(Flags) + 1;
2056 if (InlineAsm::isUseOperandTiedToDef(Flags, TiedToOperand)) {
2058 unsigned CurOp = InlineAsm::Op_FirstOperand;
2061 CurOp += InlineAsm::getNumOperandRegisters(Flags)+1;
2068 unsigned ConstraintID = InlineAsm::getMemoryConstraintID(Flags);
2075 InlineAsm::getFlagWord(InlineAsm::Kind_Mem, SelOps.size());
2075 InlineAsm::getFlagWord(InlineAsm::Kind_Mem, SelOps.size());
2076 NewFlags = InlineAsm::getFlagWordForMem(NewFlags, ConstraintID);
lib/CodeGen/SelectionDAG/TargetLowering.cpp 4184 const InlineAsm *IA = cast<InlineAsm>(CS.getCalledValue());
4184 const InlineAsm *IA = cast<InlineAsm>(CS.getCalledValue());
4192 for (InlineAsm::ConstraintInfo &CI : IA->ParseConstraints()) {
4204 case InlineAsm::isOutput:
4224 case InlineAsm::isInput:
4227 case InlineAsm::isClobber:
4286 if (OpInfo.Type == InlineAsm::isClobber)
4323 if (cInfo.Type == InlineAsm::isClobber)
4386 InlineAsm::ConstraintCodeVector *rCodes;
lib/IR/AsmWriter.cpp 172 isa<InlineAsm>(*Op))
288 if (isa<Constant>(*Op) || isa<InlineAsm>(*Op)) // Visit GlobalValues.
2241 if (const InlineAsm *IA = dyn_cast<InlineAsm>(V)) {
2241 if (const InlineAsm *IA = dyn_cast<InlineAsm>(V)) {
2248 if (IA->getDialect() == InlineAsm::AD_Intel)
4325 } else if (isa<InlineAsm>(this) || isa<Argument>(this)) {
lib/IR/ConstantsContext.h 418 InlineAsm::AsmDialect AsmDialect;
422 InlineAsm::AsmDialect AsmDialect)
427 InlineAsmKeyType(const InlineAsm *Asm, SmallVectorImpl<Constant *> &)
439 bool operator==(const InlineAsm *Asm) const {
453 using TypeClass = ConstantInfo<InlineAsm>::TypeClass;
455 InlineAsm *create(TypeClass *Ty) const {
457 return new InlineAsm(FTy, AsmString, Constraints, HasSideEffects,
572 using ValType = typename ConstantInfo<ConstantClass>::ValType;
573 using TypeClass = typename ConstantInfo<ConstantClass>::TypeClass;
581 using ConstantClassInfo = DenseMapInfo<ConstantClass *>;
583 static inline ConstantClass *getEmptyKey() {
587 static inline ConstantClass *getTombstoneKey() {
591 static unsigned getHashValue(const ConstantClass *CP) {
596 static bool isEqual(const ConstantClass *LHS, const ConstantClass *RHS) {
596 static bool isEqual(const ConstantClass *LHS, const ConstantClass *RHS) {
608 static bool isEqual(const LookupKey &LHS, const ConstantClass *RHS) {
616 static bool isEqual(const LookupKeyHashed &LHS, const ConstantClass *RHS) {
622 using MapTy = DenseSet<ConstantClass *, MapInfo>;
637 ConstantClass *create(TypeClass *Ty, ValType V, LookupKeyHashed &HashKey) {
638 ConstantClass *Result = V.create(Ty);
648 ConstantClass *getOrCreate(TypeClass *Ty, ValType V) {
653 ConstantClass *Result = nullptr;
666 void remove(ConstantClass *CP) {
673 ConstantClass *replaceOperandsInPlace(ArrayRef<Constant *> Operands,
674 ConstantClass *CP, Value *From,
lib/IR/Core.cpp 451 InlineAsm::AsmDialect AD;
454 AD = InlineAsm::AD_ATT;
457 AD = InlineAsm::AD_Intel;
460 return wrap(InlineAsm::get(unwrap<FunctionType>(Ty),
1810 return wrap(InlineAsm::get(dyn_cast<FunctionType>(unwrap(Ty)), AsmString,
lib/IR/InlineAsm.cpp 42 InlineAsm *InlineAsm::get(FunctionType *FTy, StringRef AsmString,
64 InlineAsm::ConstraintInfoVector &ConstraintsSoFar) {
159 InlineAsm::SubConstraintInfo &scInfo =
209 InlineAsm::SubConstraintInfo &scInfo =
216 InlineAsm::ConstraintInfoVector
266 case InlineAsm::isOutput:
275 case InlineAsm::isInput:
279 case InlineAsm::isClobber:
lib/IR/LLVMContextImpl.h 1312 ConstantUniqueMap<InlineAsm> InlineAsms;
lib/IR/Verifier.cpp 4144 } else if (isa<InlineAsm>(I.getOperand(i))) {
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 274 case InlineAsm::Constraint_i:
275 case InlineAsm::Constraint_m:
276 case InlineAsm::Constraint_Q:
lib/Target/AArch64/AArch64ISelLowering.h 737 return InlineAsm::Constraint_Q;
lib/Target/AArch64/AArch64PromoteConstant.cpp 306 return !(CI && isa<const InlineAsm>(CI->getCalledValue()));
lib/Target/AMDGPU/GCNHazardRecognizer.cpp 773 for (unsigned I = InlineAsm::MIOp_FirstOperand, E = IA->getNumOperands();
lib/Target/AMDGPU/SIISelLowering.cpp11016 if (isa<InlineAsm>(CI->getCalledValue())) {
11022 if (TC.Type == InlineAsm::isOutput) {
lib/Target/AMDGPU/SIInstrInfo.cpp 3213 for (unsigned I = InlineAsm::MIOp_FirstOperand, E = MI.getNumOperands();
lib/Target/ARM/ARMAsmPrinter.cpp 346 if (InlineAsm::isUseOperandTiedToDef(Flags, TiedIdx)) {
347 for (OpNum = InlineAsm::MIOp_FirstOperand; TiedIdx; --TiedIdx) {
349 OpNum += InlineAsm::getNumOperandRegisters(OpFlags) + 1;
358 unsigned NumVals = InlineAsm::getNumOperandRegisters(Flags);
373 if (InlineAsm::hasRegClassConstraint(Flags, RC) &&
lib/Target/ARM/ARMFastISel.cpp 2299 if (isa<InlineAsm>(Callee)) return false;
lib/Target/ARM/ARMISelDAGToDAG.cpp 4654 if (i < InlineAsm::Op_FirstOperand)
4659 Kind = InlineAsm::getKind(Flag);
4668 if (Kind == InlineAsm::Kind_Imm) {
4674 unsigned NumRegs = InlineAsm::getNumOperandRegisters(Flag);
4682 if (Changed && InlineAsm::isUseOperandTiedToDef(Flag, DefIdx))
4690 if (Kind == InlineAsm::Kind_Mem) {
4696 if (Kind != InlineAsm::Kind_RegUse && Kind != InlineAsm::Kind_RegDef
4696 if (Kind != InlineAsm::Kind_RegUse && Kind != InlineAsm::Kind_RegDef
4697 && Kind != InlineAsm::Kind_RegDefEarlyClobber)
4701 bool HasRC = InlineAsm::hasRegClassConstraint(Flag, RC);
4714 if (Kind == InlineAsm::Kind_RegDef ||
4715 Kind == InlineAsm::Kind_RegDefEarlyClobber) {
4744 SDValue Chain = AsmNodeOperands[InlineAsm::Op_InputChain];
4759 AsmNodeOperands[InlineAsm::Op_InputChain] = Chain;
4767 Flag = InlineAsm::getFlagWord(Kind, 1 /* RegNum*/);
4769 Flag = InlineAsm::getFlagWordForMatchingOp(Flag, DefIdx);
4771 Flag = InlineAsm::getFlagWordForRegClass(Flag, ARM::GPRPairRegClassID);
4801 case InlineAsm::Constraint_i:
4805 case InlineAsm::Constraint_m:
4806 case InlineAsm::Constraint_o:
4807 case InlineAsm::Constraint_Q:
4808 case InlineAsm::Constraint_Um:
4809 case InlineAsm::Constraint_Un:
4810 case InlineAsm::Constraint_Uq:
4811 case InlineAsm::Constraint_Us:
4812 case InlineAsm::Constraint_Ut:
4813 case InlineAsm::Constraint_Uv:
4814 case InlineAsm::Constraint_Uy:
lib/Target/ARM/ARMISelLowering.cpp15564 InlineAsm *IA = cast<InlineAsm>(CI->getCalledValue());
15564 InlineAsm *IA = cast<InlineAsm>(CI->getCalledValue());
lib/Target/ARM/ARMISelLowering.h 445 return InlineAsm::Constraint_Q;
447 return InlineAsm::Constraint_o;
454 return InlineAsm::Constraint_Um;
456 return InlineAsm::Constraint_Un;
458 return InlineAsm::Constraint_Uq;
460 return InlineAsm::Constraint_Us;
462 return InlineAsm::Constraint_Ut;
464 return InlineAsm::Constraint_Uv;
466 return InlineAsm::Constraint_Uy;
lib/Target/AVR/AVRAsmPrinter.cpp 105 unsigned NumOpRegs = InlineAsm::getNumOperandRegisters(OpFlags);
162 unsigned NumOpRegs = InlineAsm::getNumOperandRegisters(OpFlags);
lib/Target/AVR/AVRISelLowering.cpp 1733 return InlineAsm::Constraint_Q;
lib/Target/BPF/BPFISelDAGToDAG.cpp 165 case InlineAsm::Constraint_m: // memory
lib/Target/Hexagon/HexagonISelDAGToDAG.cpp 918 case InlineAsm::Constraint_i:
919 case InlineAsm::Constraint_o: // Offsetable.
920 case InlineAsm::Constraint_v: // Not offsetable.
921 case InlineAsm::Constraint_m: // Memory.
lib/Target/Hexagon/HexagonISelLowering.cpp 589 for (unsigned i = InlineAsm::Op_FirstOperand; i != NumOps;) {
591 unsigned NumVals = InlineAsm::getNumOperandRegisters(Flags);
594 switch (InlineAsm::getKind(Flags)) {
597 case InlineAsm::Kind_RegUse:
598 case InlineAsm::Kind_Imm:
599 case InlineAsm::Kind_Mem:
602 case InlineAsm::Kind_Clobber:
603 case InlineAsm::Kind_RegDef:
604 case InlineAsm::Kind_RegDefEarlyClobber: {
lib/Target/Hexagon/HexagonISelLowering.h 275 return InlineAsm::Constraint_o;
lib/Target/Hexagon/HexagonVectorPrint.cpp 101 unsigned ExtraInfo = InlineAsm::Extra_HasSideEffects;
lib/Target/Lanai/LanaiAsmPrinter.cpp 127 unsigned NumVals = InlineAsm::getNumOperandRegisters(Flags);
lib/Target/Lanai/LanaiISelDAGToDAG.cpp 257 case InlineAsm::Constraint_m: // memory
lib/Target/MSP430/MSP430ISelDAGToDAG.cpp 290 case InlineAsm::Constraint_m: // memory
lib/Target/Mips/Mips16HardFloat.cpp 52 InlineAsm *IA = InlineAsm::get(AsmFTy, AsmText, "", true,
52 InlineAsm *IA = InlineAsm::get(AsmFTy, AsmText, "", true,
53 /* IsAlignStack */ false, InlineAsm::AD_ATT);
lib/Target/Mips/MipsAsmPrinter.cpp 570 unsigned NumVals = InlineAsm::getNumOperandRegisters(Flags);
lib/Target/Mips/MipsISelDAGToDAG.cpp 317 case InlineAsm::Constraint_i:
318 case InlineAsm::Constraint_m:
319 case InlineAsm::Constraint_R:
320 case InlineAsm::Constraint_ZC:
lib/Target/Mips/MipsISelLowering.h 658 return InlineAsm::Constraint_o;
660 return InlineAsm::Constraint_R;
662 return InlineAsm::Constraint_ZC;
lib/Target/Mips/MipsSEISelDAGToDAG.cpp 1281 case InlineAsm::Constraint_i:
1285 case InlineAsm::Constraint_m:
1286 case InlineAsm::Constraint_o:
1295 case InlineAsm::Constraint_R:
1309 case InlineAsm::Constraint_ZC:
lib/Target/Mips/MipsSERegisterInfo.cpp 104 unsigned ConstraintID = InlineAsm::getMemoryConstraintID(MO.getImm());
106 case InlineAsm::Constraint_ZC: {
lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp 3697 case InlineAsm::Constraint_m: // memory
lib/Target/PowerPC/PPCISelDAGToDAG.cpp 311 case InlineAsm::Constraint_es:
312 case InlineAsm::Constraint_i:
313 case InlineAsm::Constraint_m:
314 case InlineAsm::Constraint_o:
315 case InlineAsm::Constraint_Q:
316 case InlineAsm::Constraint_Z:
317 case InlineAsm::Constraint_Zy:
lib/Target/PowerPC/PPCISelLowering.h 808 return InlineAsm::Constraint_es;
810 return InlineAsm::Constraint_o;
812 return InlineAsm::Constraint_Q;
814 return InlineAsm::Constraint_Z;
816 return InlineAsm::Constraint_Zy;
lib/Target/PowerPC/PPCTargetTransformInfo.cpp 223 InlineAsm::ConstraintInfoVector CIV = IA->ParseConstraints();
225 InlineAsm::ConstraintInfo &C = CIV[i];
226 if (C.Type != InlineAsm::isInput)
267 if (InlineAsm *IA = dyn_cast<InlineAsm>(CI->getCalledValue())) {
267 if (InlineAsm *IA = dyn_cast<InlineAsm>(CI->getCalledValue())) {
lib/Target/RISCV/RISCVISelDAGToDAG.cpp 176 case InlineAsm::Constraint_i:
177 case InlineAsm::Constraint_m:
182 case InlineAsm::Constraint_A:
lib/Target/RISCV/RISCVISelLowering.cpp 2674 return InlineAsm::Constraint_A;
lib/Target/Sparc/SparcISelDAGToDAG.cpp 180 if (i < InlineAsm::Op_FirstOperand)
185 Kind = InlineAsm::getKind(Flag);
194 if (Kind == InlineAsm::Kind_Imm) {
200 unsigned NumRegs = InlineAsm::getNumOperandRegisters(Flag);
208 if (Changed && InlineAsm::isUseOperandTiedToDef(Flag, DefIdx))
211 if (Kind != InlineAsm::Kind_RegUse && Kind != InlineAsm::Kind_RegDef
211 if (Kind != InlineAsm::Kind_RegUse && Kind != InlineAsm::Kind_RegDef
212 && Kind != InlineAsm::Kind_RegDefEarlyClobber)
216 bool HasRC = InlineAsm::hasRegClassConstraint(Flag, RC);
229 if (Kind == InlineAsm::Kind_RegDef ||
230 Kind == InlineAsm::Kind_RegDefEarlyClobber) {
259 SDValue Chain = AsmNodeOperands[InlineAsm::Op_InputChain];
285 AsmNodeOperands[InlineAsm::Op_InputChain] = Chain;
293 Flag = InlineAsm::getFlagWord(Kind, 1 /* RegNum*/);
295 Flag = InlineAsm::getFlagWordForMatchingOp(Flag, DefIdx);
297 Flag = InlineAsm::getFlagWordForRegClass(Flag, SP::IntPairRegClassID);
383 case InlineAsm::Constraint_i:
384 case InlineAsm::Constraint_o:
385 case InlineAsm::Constraint_m: // memory
lib/Target/Sparc/SparcISelLowering.h 88 return InlineAsm::Constraint_o;
lib/Target/SystemZ/SystemZISelDAGToDAG.cpp 1636 case InlineAsm::Constraint_i:
1637 case InlineAsm::Constraint_Q:
1642 case InlineAsm::Constraint_R:
1647 case InlineAsm::Constraint_S:
1652 case InlineAsm::Constraint_T:
1653 case InlineAsm::Constraint_m:
1654 case InlineAsm::Constraint_o:
lib/Target/SystemZ/SystemZISelLowering.h 441 return InlineAsm::Constraint_o;
443 return InlineAsm::Constraint_Q;
445 return InlineAsm::Constraint_R;
447 return InlineAsm::Constraint_S;
449 return InlineAsm::Constraint_T;
lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp 223 case InlineAsm::Constraint_i:
224 case InlineAsm::Constraint_m:
lib/Target/X86/X86AsmPrinter.cpp 205 const bool IsATT = MI->getInlineAsmDialect() == InlineAsm::AD_ATT;
243 if (MI->getInlineAsmDialect() == InlineAsm::AD_ATT)
527 if (MI->getInlineAsmDialect() == InlineAsm::AD_Intel) {
lib/Target/X86/X86FloatingPoint.cpp 1525 for (unsigned i = InlineAsm::MIOp_FirstOperand, e = MI.getNumOperands();
1529 NumOps = InlineAsm::getNumOperandRegisters(Flags);
1541 if (InlineAsm::hasRegClassConstraint(Flags, RCID)) {
1546 switch (InlineAsm::getKind(Flags)) {
1547 case InlineAsm::Kind_RegUse:
1550 case InlineAsm::Kind_RegDef:
1551 case InlineAsm::Kind_RegDefEarlyClobber:
1556 case InlineAsm::Kind_Clobber:
lib/Target/X86/X86ISelDAGToDAG.cpp 5233 case InlineAsm::Constraint_i:
5237 case InlineAsm::Constraint_o: // offsetable ??
5238 case InlineAsm::Constraint_v: // not offsetable ??
5239 case InlineAsm::Constraint_m: // memory
5240 case InlineAsm::Constraint_X:
lib/Target/X86/X86ISelLowering.cpp45243 InlineAsm *IA = cast<InlineAsm>(CI->getCalledValue());
45243 InlineAsm *IA = cast<InlineAsm>(CI->getCalledValue());
45302 InlineAsm::ConstraintInfoVector Constraints = IA->ParseConstraints();
lib/Target/X86/X86ISelLowering.h 973 return InlineAsm::Constraint_i;
975 return InlineAsm::Constraint_o;
977 return InlineAsm::Constraint_v;
979 return InlineAsm::Constraint_X;
lib/Target/XCore/XCoreISelDAGToDAG.cpp 115 case InlineAsm::Constraint_m: // Memory.
lib/Transforms/IPO/LowerTypeTests.cpp 1391 InlineAsm *JumpTableAsm =
1392 InlineAsm::get(FunctionType::get(IRB.getVoidTy(), ArgTypes, false),
lib/Transforms/IPO/PruneEH.cpp 138 if (const auto *IA = dyn_cast<InlineAsm>(ICS.getCalledValue()))
138 if (const auto *IA = dyn_cast<InlineAsm>(ICS.getCalledValue()))
lib/Transforms/Instrumentation/AddressSanitizer.cpp 693 InlineAsm *EmptyAsm;
2530 EmptyAsm = InlineAsm::get(FunctionType::get(IRB.getVoidTy(), false),
2566 InlineAsm *Asm = InlineAsm::get(
2566 InlineAsm *Asm = InlineAsm::get(
lib/Transforms/Instrumentation/DataFlowSanitizer.cpp 1537 if ((F && F->isIntrinsic()) || isa<InlineAsm>(CS.getCalledValue())) {
lib/Transforms/Instrumentation/HWAddressSanitizer.cpp 484 InlineAsm *Asm = InlineAsm::get(
484 InlineAsm *Asm = InlineAsm::get(
674 InlineAsm *Asm;
678 Asm = InlineAsm::get(
687 Asm = InlineAsm::get(
lib/Transforms/Instrumentation/MemorySanitizer.cpp 589 InlineAsm *EmptyAsm;
836 EmptyAsm = InlineAsm::get(FunctionType::get(IRB.getVoidTy(), false),
3650 int getNumOutputArgs(InlineAsm *IA, CallBase *CB) {
3662 InlineAsm::ConstraintInfoVector Constraints = IA->ParseConstraints();
3664 InlineAsm::ConstraintInfo Info = Constraints[i];
3666 case InlineAsm::isOutput:
3695 InlineAsm *IA = cast<InlineAsm>(CB->getCalledValue());
3695 InlineAsm *IA = cast<InlineAsm>(CB->getCalledValue());
lib/Transforms/Instrumentation/SanitizerCoverage.cpp 235 InlineAsm *EmptyAsm;
443 EmptyAsm = InlineAsm::get(FunctionType::get(IRB.getVoidTy(), false),
734 if (isa<InlineAsm>(Callee))
lib/Transforms/ObjCARC/ObjCARCContract.cpp 494 InlineAsm *IA =
495 InlineAsm::get(FunctionType::get(Type::getVoidTy(Inst->getContext()),
lib/Transforms/Utils/FunctionComparator.cpp 693 int FunctionComparator::cmpInlineAsm(const InlineAsm *L,
694 const InlineAsm *R) const {
745 const InlineAsm *InlineAsmL = dyn_cast<InlineAsm>(L);
745 const InlineAsm *InlineAsmL = dyn_cast<InlineAsm>(L);
746 const InlineAsm *InlineAsmR = dyn_cast<InlineAsm>(R);
746 const InlineAsm *InlineAsmR = dyn_cast<InlineAsm>(R);
lib/Transforms/Utils/ValueMapper.cpp 364 if (const InlineAsm *IA = dyn_cast<InlineAsm>(V)) {
364 if (const InlineAsm *IA = dyn_cast<InlineAsm>(V)) {
371 V = InlineAsm::get(NewTy, IA->getAsmString(), IA->getConstraintString(),
tools/clang/lib/CodeGen/CGBuiltin.cpp 721 llvm::InlineAsm *IA =
722 llvm::InlineAsm::get(FTy, Asm, Constraints, /*hasSideEffects=*/true);
1067 llvm::InlineAsm *IA =
1068 llvm::InlineAsm::get(FTy, Asm, Constraints, /*hasSideEffects=*/true);
6026 llvm::InlineAsm *Emit =
6027 IsThumb ? InlineAsm::get(FTy, ".inst.n 0x" + utohexstr(ZExtValue), "",
6029 : InlineAsm::get(FTy, ".inst 0x" + utohexstr(ZExtValue), "",
12315 llvm::InlineAsm *IA =
12316 llvm::InlineAsm::get(FTy, "int $$0x2c", "", /*hasSideEffects=*/true);
tools/clang/lib/CodeGen/CGObjC.cpp 2160 llvm::InlineAsm *&marker
2176 marker = llvm::InlineAsm::get(type, assembly, "", /*sideeffects*/ true);
3470 llvm::InlineAsm *extender = llvm::InlineAsm::get(extenderType,
3470 llvm::InlineAsm *extender = llvm::InlineAsm::get(extenderType,
tools/clang/lib/CodeGen/CGObjCMac.cpp 4185 llvm::InlineAsm *ReadHazard;
4186 llvm::InlineAsm *WriteHazard;
4230 ReadHazard = llvm::InlineAsm::get(AsmFnTy, "", Constraint, true, false);
4244 WriteHazard = llvm::InlineAsm::get(AsmFnTy, "", Constraint, true, false);
tools/clang/lib/CodeGen/CGStmt.cpp 2274 llvm::InlineAsm::AsmDialect AsmDialect = isa<MSAsmStmt>(&S) ?
2275 llvm::InlineAsm::AD_Intel : llvm::InlineAsm::AD_ATT;
2275 llvm::InlineAsm::AD_Intel : llvm::InlineAsm::AD_ATT;
2276 llvm::InlineAsm *IA =
2277 llvm::InlineAsm::get(FTy, AsmString, Constraints, HasSideEffect,
tools/clang/lib/CodeGen/CodeGenModule.h 205 llvm::InlineAsm *retainAutoreleasedReturnValueMarker;
usr/include/c++/7.4.0/type_traits 1983 { typedef _Up type; };