reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
168 for (NodeAddr<UseNode *> UA : AddAslSN.Addr->members_if(DFG->IsUse, *DFG)) { 169 RegisterRef RR = UA.Addr->getRegRef(*DFG); 172 OffsetRegRD = UA.Addr->getReachingDef(); 178 NodeAddr<InstrNode *> IA = UA.Addr->getOwner(*DFG); 179 if (UA.Addr->getFlags() & NodeAttrs::PhiRef) 183 AA.Addr->getReachingDef() != OffsetRegRD) 186 MachineInstr &UseMI = *NodeAddr<StmtNode *>(IA).Addr->getCode(); 189 if ((OffsetRegDN.Addr->getFlags() & NodeAttrs::PhiRef) && 215 RegisterRef UR = UN.Addr->getRegRef(*DFG); 232 NodeAddr<StmtNode *> TempIA = DA.Addr->getOwner(*DFG); 245 for (NodeAddr<DefNode *> DA : SA.Addr->members_if(DFG->IsDef, *DFG)) { 248 RegisterRef DR = DFG->getPRI().normalize(DA.Addr->getRegRef(*DFG)); 255 NodeAddr<StmtNode *> TempIA = UA.Addr->getOwner(*DFG); 260 if (UA.Addr->getFlags() & NodeAttrs::PhiRef) { 261 NodeAddr<PhiNode *> PA = UA.Addr->getOwner(*DFG); 290 for (NodeAddr<UseNode *> UA : SN.Addr->members_if(DFG->IsUse, *DFG)) { 291 RegisterRef RR = UA.Addr->getRegRef(*DFG); 294 LRExtRegRD = UA.Addr->getReachingDef(); 300 NodeAddr<InstrNode *> IA = UA.Addr->getOwner(*DFG); 303 if (UA.Addr->getFlags() & NodeAttrs::PhiRef) 307 AA.Addr->getReachingDef() != LRExtRegRD) { 313 MachineInstr *UseMI = NodeAddr<StmtNode *>(IA).Addr->getCode(); 316 if ((LRExtRegDN.Addr->getFlags() & NodeAttrs::PhiRef) && 354 NodeAddr<StmtNode *> SN = UN.Addr->getOwner(*DFG); 355 MachineInstr *MI = SN.Addr->getCode(); 394 assert(!(UseN.Addr->getFlags() & NodeAttrs::PhiRef) && 397 NodeAddr<StmtNode *> OwnerN = UseN.Addr->getOwner(*DFG); 398 MachineInstr *UseMI = OwnerN.Addr->getCode(); 441 NodeAddr<StmtNode *> SN = UN.Addr->getOwner(*DFG); 442 MachineInstr &MI = *SN.Addr->getCode(); 606 NodeAddr<StmtNode *> SA = AddAslUN.Addr->getOwner(*DFG); 615 assert(!(UseUN.Addr->getFlags() & NodeAttrs::PhiRef) && 618 NodeAddr<StmtNode *> UseIA = UseUN.Addr->getOwner(*DFG); 621 MachineInstr *UseMI = UseIA.Addr->getCode(); 689 for (auto IA : BA.Addr->members(*DFG)) { 694 MachineInstr *MI = SA.Addr->getCode(); 744 assert(!(UseN.Addr->getFlags() & NodeAttrs::PhiRef) && 747 NodeAddr<StmtNode *> OwnerN = UseN.Addr->getOwner(*DFG); 748 MachineInstr *UseMI = OwnerN.Addr->getCode(); 805 for (NodeAddr<BlockNode *> BA : FA.Addr->members(*DFG))lib/Target/Hexagon/HexagonRDFOpt.cpp
162 for (NodeAddr<BlockNode*> BA : DFG.getFunc().Addr->members(DFG)) { 163 for (auto TA : BA.Addr->members_if(DFG.IsCode<NodeAttrs::Stmt>, DFG)) { 165 for (NodeAddr<RefNode*> RA : SA.Addr->members(DFG)) { 181 dbgs() << "Partly dead: " << *SA.Addr->getCode(); 189 MachineInstr *MI = NodeAddr<StmtNode*>(IA).Addr->getCode(); 199 NodeList Refs = IA.Addr->members(DFG); 201 OpMap.insert(std::make_pair(RA.Id, getOpNum(RA.Addr->getOp()))); 208 RA.Addr->setRegRef(&MI->getOperand(N), DFG); 210 RA.Addr->setRegRef(&MI->getOperand(N-1), DFG); 218 MachineInstr &MI = *NodeAddr<StmtNode*>(IA).Addr->getCode(); 257 for (NodeAddr<DefNode*> DA : IA.Addr->members_if(DFG.IsDef, DFG)) { 258 if (&DA.Addr->getOp() != &Op)lib/Target/Hexagon/RDFCopy.cpp
72 for (NodeAddr<InstrNode*> IA : BA.Addr->members(DFG)) { 76 if (interpretAsCopy(SA.Addr->getCode(), EM)) 92 if (RA.Addr->getKind() == NodeAttrs::Def) 94 assert(RA.Addr->getKind() == NodeAttrs::Use); 95 if (NodeId RD = RA.Addr->getReachingDef()) 107 dbgs() << "Instr: " << *DFG.addr<StmtNode*>(I).Addr->getCode(); 144 for (NodeAddr<DefNode*> DA : SA.Addr->members_if(DFG.IsDef, DFG)) { 145 RegisterRef DR = DA.Addr->getRegRef(DFG); 155 for (NodeId N = DA.Addr->getReachedUse(), NextN; N; N = NextN) { 157 NextN = UA.Addr->getSibling(); 158 uint16_t F = UA.Addr->getFlags(); 161 if (UA.Addr->getRegRef(DFG) != DR) 164 NodeAddr<InstrNode*> IA = UA.Addr->getOwner(DFG); 170 MachineOperand &Op = UA.Addr->getOp(); 176 << *NodeAddr<StmtNode*>(IA).Addr->getCode(); 184 UA.Addr->linkToDef(UA.Id, DFG.addr<DefNode*>(AtCopy)); 186 UA.Addr->setReachingDef(0); 187 UA.Addr->setSibling(0);lib/Target/Hexagon/RDFDeadCode.cpp
86 if (!isLiveInstr(NodeAddr<StmtNode*>(IA).Addr->getCode())) 88 for (NodeAddr<RefNode*> RA : IA.Addr->members(DFG)) { 96 NodeAddr<InstrNode*> IA = DA.Addr->getOwner(DFG); 97 for (NodeAddr<UseNode*> UA : IA.Addr->members_if(DFG.IsUse, DFG)) { 128 for (NodeAddr<BlockNode*> BA : DFG.getFunc().Addr->members(DFG)) 129 for (NodeAddr<InstrNode*> IA : BA.Addr->members(DFG)) 151 for (NodeAddr<DefNode*> DA : IA.Addr->members_if(DFG.IsDef, DFG)) 157 for (NodeAddr<BlockNode*> BA : DFG.getFunc().Addr->members(DFG)) { 158 for (NodeAddr<InstrNode*> IA : BA.Addr->members(DFG)) { 159 for (NodeAddr<RefNode*> RA : IA.Addr->members(DFG)) 163 if (isLiveInstr(NodeAddr<StmtNode*>(IA).Addr->getCode())) 189 uint16_t Type = BA.Addr->getType(); 196 uint16_t Kind = BA.Addr->getKind(); 198 for (auto N : NodeAddr<CodeNode*>(BA).Addr->members(DFG)) 210 uint16_t KindA = A.Addr->getKind(), KindB = B.Addr->getKind(); 210 uint16_t KindA = A.Addr->getKind(), KindB = B.Addr->getKind(); 232 NodeAddr<BlockNode*> BA = IA.Addr->getOwner(DFG); 233 BA.Addr->removeMember(IA, DFG); 237 MachineInstr *MI = NodeAddr<StmtNode*>(IA).Addr->getCode();lib/Target/Hexagon/RDFGraph.cpp
69 uint16_t Attrs = NA.Addr->getAttrs(); 111 << Print<RegisterRef>(RA.Addr->getRegRef(G), G) << '>'; 112 if (RA.Addr->getFlags() & NodeAttrs::Fixed) 119 if (NodeId N = P.Obj.Addr->getReachingDef()) 122 if (NodeId N = P.Obj.Addr->getReachedDef()) 125 if (NodeId N = P.Obj.Addr->getReachedUse()) 128 if (NodeId N = P.Obj.Addr->getSibling()) 136 if (NodeId N = P.Obj.Addr->getReachingDef()) 139 if (NodeId N = P.Obj.Addr->getSibling()) 148 if (NodeId N = P.Obj.Addr->getReachingDef()) 151 if (NodeId N = P.Obj.Addr->getPredecessor()) 154 if (NodeId N = P.Obj.Addr->getSibling()) 160 switch (P.Obj.Addr->getKind()) { 165 if (P.Obj.Addr->getFlags() & NodeAttrs::PhiRef) 220 << PrintListV<RefNode*>(P.Obj.Addr->members(P.G), P.G) << ']'; 225 const MachineInstr &MI = *P.Obj.Addr->getCode(); 245 OS << " [" << PrintListV<RefNode*>(P.Obj.Addr->members(P.G), P.G) << ']'; 251 switch (P.Obj.Addr->getKind()) { 267 MachineBasicBlock *BB = P.Obj.Addr->getCode(); 293 for (auto I : P.Obj.Addr->members(P.G)) 300 << P.Obj.Addr->getCode()->getName() << '\n'; 301 for (auto I : P.Obj.Addr->members(P.G)) 324 << '<' << Print<RegisterRef>(I->Addr->getRegRef(P.G), P.G) << '>'; 401 NA.Addr->Next = Nx; 437 while (NA.Addr != this) { 438 if (NA.Addr->getType() == NodeAttrs::Code) 440 NA = G.addr<NodeBase*>(NA.Addr->getNext()); 448 Ref.Sib = DA.Addr->getReachedDef(); 449 DA.Addr->setReachedDef(Self); 455 Ref.Sib = DA.Addr->getReachedUse(); 456 DA.Addr->setReachedUse(Self); 477 ML.Addr->append(NA); 481 NA.Addr->setNext(Self); 489 MA.Addr->append(NA); 506 Code.FirstM = MA.Addr->getNext(); 511 while (MA.Addr != this) { 512 NodeId MX = MA.Addr->getNext(); 514 MA.Addr->setNext(NA.Addr->getNext()); 514 MA.Addr->setNext(NA.Addr->getNext()); 536 while (NA.Addr != this) { 537 assert(NA.Addr->getType() == NodeAttrs::Code); 538 if (NA.Addr->getKind() == NodeAttrs::Block) 540 NA = G.addr<NodeBase*>(NA.Addr->getNext()); 553 assert(M.Addr->getType() == NodeAttrs::Code); 554 if (M.Addr->getKind() == NodeAttrs::Stmt) { 558 PA.Addr->setNext(M.Id); 561 assert(M.Addr->getKind() == NodeAttrs::Phi); 565 MN = G.addr<NodeBase*>(M.Addr->getNext()); 566 assert(MN.Addr->getType() == NodeAttrs::Code); 567 } while (MN.Addr->getKind() == NodeAttrs::Phi); 579 return NodeAddr<BlockNode*>(NA).Addr->getCode() == BB; 780 P.Addr->init(); 781 P.Addr->setAttrs(Attrs); 789 memcpy(NA.Addr, B.Addr, sizeof(NodeBase)); 789 memcpy(NA.Addr, B.Addr, sizeof(NodeBase)); 791 if (NA.Addr->getType() == NodeAttrs::Ref) { 793 RA.Addr->setReachingDef(0); 794 RA.Addr->setSibling(0); 795 if (NA.Addr->getKind() == NodeAttrs::Def) { 797 DA.Addr->setReachedDef(0); 798 DA.Addr->setReachedUse(0); 809 UA.Addr->setRegRef(&Op, *this); 817 PUA.Addr->setRegRef(RR, *this); 818 PUA.Addr->setPredecessor(PredB.Id); 825 DA.Addr->setRegRef(&Op, *this); 833 DA.Addr->setRegRef(RR, *this); 839 Owner.Addr->addPhi(PA, *this); 846 SA.Addr->setCode(MI); 847 Owner.Addr->addMember(SA, *this); 854 BA.Addr->setCode(BB); 855 Owner.Addr->addMember(BA, *this); 861 FA.Addr->setCode(MF); 883 NodeAddr<BlockNode*> EA = Func.Addr->getEntryBlock(*this); 884 NodeList Blocks = Func.Addr->members(*this); 889 for (NodeAddr<InstrNode*> IA : BA.Addr->members(*this)) 890 for (NodeAddr<RefNode*> RA : IA.Addr->members(*this)) 891 AllRefs.insert(RA.Addr->getRegRef(*this)); 895 MachineBasicBlock &EntryB = *EA.Addr->getCode(); 911 PA.Addr->addMember(DA, *this); 922 const MachineBasicBlock &B = *BA.Addr->getCode(); 937 PA.Addr->addMember(DA, *this); 941 PA.Addr->addMember(PUA, *this); 1046 for (NodeAddr<DefNode*> DA : IA.Addr->members_if(IsDef, *this)) { 1049 if (!(DA.Addr->getFlags() & NodeAttrs::Clobbering)) 1054 RegisterRef RR = PDA.Addr->getRegRef(*this); 1092 for (NodeAddr<DefNode*> DA : IA.Addr->members_if(IsDef, *this)) { 1095 if (DA.Addr->getFlags() & NodeAttrs::Clobbering) 1100 RegisterRef RR = PDA.Addr->getRegRef(*this); 1105 MachineInstr *MI = NodeAddr<StmtNode*>(IA).Addr->getCode(); 1159 if (TA.Addr->getKind() != RA.Addr->getKind()) 1159 if (TA.Addr->getKind() != RA.Addr->getKind()) 1161 if (TA.Addr->getRegRef(*this) != RA.Addr->getRegRef(*this)) 1161 if (TA.Addr->getRegRef(*this) != RA.Addr->getRegRef(*this)) 1167 &RA.Addr->getOp() == &TA.Addr->getOp(); 1167 &RA.Addr->getOp() == &TA.Addr->getOp(); 1172 if (TA.Addr->getKind() != NodeAttrs::Use) 1177 return TUA.Addr->getPredecessor() == RUA.Addr->getPredecessor(); 1177 return TUA.Addr->getPredecessor() == RUA.Addr->getPredecessor(); 1180 RegisterRef RR = RA.Addr->getRegRef(*this); 1181 if (IA.Addr->getKind() == NodeAttrs::Stmt) 1182 return RA.Addr->getNextRef(RR, RelatedStmt, true, *this); 1183 return RA.Addr->getNextRef(RR, RelatedPhi, true, *this); 1219 uint16_t Flags = RA.Addr->getFlags() | NodeAttrs::Shadow; 1221 return TA.Addr->getFlags() == Flags; 1229 NA.Addr->setFlags(Flags | NodeAttrs::Shadow); 1230 IA.Addr->addMemberAfter(Loc.first, NA, *this); 1239 uint16_t Flags = RA.Addr->getFlags() | NodeAttrs::Shadow; 1241 return TA.Addr->getFlags() == Flags; 1311 SA.Addr->addMember(DA, *this); 1325 SA.Addr->addMember(DA, *this); 1360 SA.Addr->addMember(DA, *this); 1377 SA.Addr->addMember(UA, *this); 1388 MachineBasicBlock *BB = BA.Addr->getCode(); 1400 for (NodeAddr<InstrNode*> IA : BA.Addr->members(*this)) 1401 for (NodeAddr<RefNode*> RA : IA.Addr->members_if(IsDef, *this)) 1402 Defs.insert(RA.Addr->getRegRef(*this)); 1470 const MachineBasicBlock *MBB = BA.Addr->getCode(); 1493 PA.Addr->addMember(DA, *this); 1500 PA.Addr->addMember(PUA, *this); 1520 for (NodeAddr<BlockNode*> BA : Func.Addr->members(*this)) { 1521 for (auto P : BA.Addr->members_if(IsPhi, *this)) 1527 if (M.Addr->getKind() != NodeAttrs::Def) 1530 if (DA.Addr->getReachedDef() != 0 || DA.Addr->getReachedUse() != 0) 1530 if (DA.Addr->getReachedDef() != 0 || DA.Addr->getReachedUse() != 0) 1542 NodeList Refs = PA.Addr->members(*this); 1546 if (NodeId RD = RA.Addr->getReachingDef()) { 1548 NodeAddr<InstrNode*> OA = RDA.Addr->getOwner(*this); 1552 if (RA.Addr->isDef()) 1557 NodeAddr<BlockNode*> BA = PA.Addr->getOwner(*this); 1558 BA.Addr->removeMember(PA, *this); 1570 RegisterRef RR = TA.Addr->getRegRef(*this); 1577 RegisterRef QR = I->Addr->getRegRef(*this); 1597 TAP.Addr->setFlags(TAP.Addr->getFlags() | NodeAttrs::Shadow); 1597 TAP.Addr->setFlags(TAP.Addr->getFlags() | NodeAttrs::Shadow); 1602 TAP.Addr->linkToDef(TAP.Id, RDA); 1618 for (NodeAddr<RefNode*> RA : SA.Addr->members_if(P, *this)) { 1619 uint16_t Kind = RA.Addr->getKind(); 1621 RegisterRef RR = RA.Addr->getRegRef(*this); 1648 return IsDef(RA) && (RA.Addr->getFlags() & NodeAttrs::Clobbering); 1651 return IsDef(RA) && !(RA.Addr->getFlags() & NodeAttrs::Clobbering); 1654 assert(BA.Addr && "block node address is needed to create a data-flow link"); 1658 for (NodeAddr<InstrNode*> IA : BA.Addr->members(*this)) { 1661 if (IA.Addr->getKind() == NodeAttrs::Stmt) { 1669 if (IA.Addr->getKind() == NodeAttrs::Stmt) 1676 MachineDomTreeNode *N = MDT.getNode(BA.Addr->getCode()); 1685 if (NA.Addr->getKind() != NodeAttrs::Use) 1687 assert(NA.Addr->getFlags() & NodeAttrs::PhiRef); 1689 return PUA.Addr->getPredecessor() == BA.Id; 1693 MachineBasicBlock *MBB = BA.Addr->getCode(); 1698 for (NodeAddr<InstrNode*> IA : SBA.Addr->members_if(IsPhi, *this)) { 1702 NodeAddr<RefNode*> RA = IA.Addr->getFirstMember(*this); 1704 if (EHLiveIns.count(RA.Addr->getRegRef(*this))) 1708 for (auto U : IA.Addr->members_if(IsUseForBA, *this)) { 1710 RegisterRef RR = PUA.Addr->getRegRef(*this); 1722 NodeId RD = UA.Addr->getReachingDef(); 1723 NodeId Sib = UA.Addr->getSibling(); 1731 auto TA = addr<UseNode*>(RDA.Addr->getReachedUse()); 1733 RDA.Addr->setReachedUse(Sib); 1738 NodeId S = TA.Addr->getSibling(); 1740 TA.Addr->setSibling(UA.Addr->getSibling()); 1740 TA.Addr->setSibling(UA.Addr->getSibling()); 1767 NodeId RD = DA.Addr->getReachingDef(); 1779 N = RA.Addr->getSibling(); 1783 NodeList ReachedDefs = getAllNodes(DA.Addr->getReachedDef()); 1784 NodeList ReachedUses = getAllNodes(DA.Addr->getReachedUse()); 1788 I.Addr->setSibling(0); 1790 I.Addr->setSibling(0); 1793 I.Addr->setReachingDef(RD); 1795 I.Addr->setReachingDef(RD); 1797 NodeId Sib = DA.Addr->getSibling(); 1805 auto TA = addr<DefNode*>(RDA.Addr->getReachedDef()); 1809 RDA.Addr->setReachedDef(Sib); 1814 NodeId S = TA.Addr->getSibling(); 1816 TA.Addr->setSibling(Sib); 1826 Last.Addr->setSibling(RDA.Addr->getReachedDef()); 1826 Last.Addr->setSibling(RDA.Addr->getReachedDef()); 1827 RDA.Addr->setReachedDef(ReachedDefs.front().Id); 1832 Last.Addr->setSibling(RDA.Addr->getReachedUse()); 1832 Last.Addr->setSibling(RDA.Addr->getReachedUse()); 1833 RDA.Addr->setReachedUse(ReachedUses.front().Id);lib/Target/Hexagon/RDFGraph.h
341 : Addr(static_cast<T>(NA.Addr)), Id(NA.Id) {} 344 assert((Addr == NA.Addr) == (Id == NA.Id)); 345 return Addr == NA.Addr; 722 return (P.Addr == nullptr) && (N == 0 || P.Id == N); 787 return BA.Addr->getType() == NodeAttrs::Ref && 788 BA.Addr->getKind() == Kind; 793 return BA.Addr->getType() == NodeAttrs::Code && 794 BA.Addr->getKind() == Kind; 798 return BA.Addr->getType() == NodeAttrs::Ref && 799 BA.Addr->getKind() == NodeAttrs::Def; 803 return BA.Addr->getType() == NodeAttrs::Ref && 804 BA.Addr->getKind() == NodeAttrs::Use; 808 return BA.Addr->getType() == NodeAttrs::Code && 809 BA.Addr->getKind() == NodeAttrs::Phi; 813 uint16_t Flags = DA.Addr->getFlags(); 865 NodeAddr<InstrNode*> IA = RA.Addr->getOwner(*this); 866 IA.Addr->removeMember(RA, *this); 893 while (NA.Addr != this) { 894 if (NA.Addr->getType() == NodeAttrs::Ref) { 896 if (RA.Addr->getRegRef(G) == RR && P(NA)) 900 NA = G.addr<NodeBase*>(NA.Addr->getNext()); 903 assert(NA.Addr->getType() == NodeAttrs::Code); 905 NA = CA.Addr->getFirstMember(G); 919 while (M.Addr != this) { 922 M = G.addr<NodeBase*>(M.Addr->getNext());lib/Target/Hexagon/RDFLiveness.cpp
118 if (RefA.Addr->getFlags() & NodeAttrs::Undef) 126 if (NodeId RD = SNA.Addr->getReachingDef()) 129 for (auto S : DFG.getRelatedRefs(RefA.Addr->getOwner(DFG), RefA)) 130 if (NodeId RD = NodeAddr<RefNode*>(S).Addr->getReachingDef()) 142 if (TA.Addr->getFlags() & NodeAttrs::PhiRef) 145 RegisterRef RR = TA.Addr->getRegRef(DFG); 151 for (auto S : DFG.getRelatedRefs(TA.Addr->getOwner(DFG), TA)) 152 if (NodeId RD = NodeAddr<RefNode*>(S).Addr->getReachingDef()) 161 bool IsPhi = TA.Addr->getFlags() & NodeAttrs::PhiRef; 162 if (!IsPhi && !PRI.alias(RefRR, TA.Addr->getRegRef(DFG))) 165 Owners.insert(TA.Addr->getOwner(DFG).Id); 170 if (IA.Addr->getKind() == NodeAttrs::Stmt) 171 return NodeAddr<StmtNode*>(IA).Addr->getCode()->getParent(); 172 assert(IA.Addr->getKind() == NodeAttrs::Phi); 174 NodeAddr<BlockNode*> BA = PA.Addr->getOwner(DFG); 175 return BA.Addr->getCode(); 186 bool StmtA = OA.Addr->getKind() == NodeAttrs::Stmt; 187 bool StmtB = OB.Addr->getKind() == NodeAttrs::Stmt; 191 MachineInstr *CA = NodeAddr<StmtNode*>(OA).Addr->getCode(); 192 MachineInstr *CB = NodeAddr<StmtNode*>(OB).Addr->getCode(); 227 return TA.Addr->getKind() == NodeAttrs::Def && 236 for (NodeAddr<DefNode*> DA : TA.Addr->members_if(DefInSet, DFG)) { 237 RegisterRef QR = DA.Addr->getRegRef(DFG); 253 uint16_t Flags = DA.Addr->getFlags(); 256 RRs.insert(DA.Addr->getRegRef(DFG)); 261 return DA.Addr->getFlags() & NodeAttrs::Dead; 284 if (!(DA.Addr->getFlags() & NodeAttrs::PhiRef)) 285 DefRRs.insert(DA.Addr->getRegRef(DFG)); 301 if (!(DA.Addr->getFlags() & NodeAttrs::PhiRef)) 303 NodeAddr<PhiNode*> PA = DA.Addr->getOwner(DFG); 308 for (auto U : PA.Addr->members_if(DFG.IsRef<NodeAttrs::Use>, DFG)) { 324 NodeAddr<BlockNode*> BA = IA.Addr->getOwner(DFG); 325 NodeList Ins = BA.Addr->members(DFG); 339 NodeList Refs = I.Addr->members(DFG); 344 if (!PRI.alias(R.Addr->getRegRef(DFG), RefRR)) 348 if (!(R.Addr->getFlags() & NodeAttrs::Clobbering)) 362 MachineBasicBlock *BB = BA.Addr->getCode(); 371 Ins = BA.Addr->members(DFG); 390 bool IsDead = DefA.Addr->getFlags() & NodeAttrs::Dead; 391 NodeId U = !IsDead ? DefA.Addr->getReachedUse() : 0; 394 if (!(UA.Addr->getFlags() & NodeAttrs::Undef)) { 395 RegisterRef UR = UA.Addr->getRegRef(DFG); 399 U = UA.Addr->getSibling(); 403 for (NodeId D = DefA.Addr->getReachedDef(), NextD; D != 0; D = NextD) { 405 NextD = DA.Addr->getSibling(); 406 RegisterRef DR = DA.Addr->getRegRef(DFG); 430 NodeList Blocks = FA.Addr->members(DFG); 432 auto Ps = BA.Addr->members_if(DFG.IsCode<NodeAttrs::Phi>, DFG); 446 NodeList PhiRefs = PhiA.Addr->members(DFG); 456 DRs.insert(R.Addr->getRegRef(DFG)); 471 bool IsDead = DA.Addr->getFlags() & NodeAttrs::Dead; 472 NodeId UN = !IsDead ? DA.Addr->getReachedUse() : 0; 475 uint16_t F = A.Addr->getFlags(); 477 RegisterRef R = PRI.normalize(A.Addr->getRegRef(DFG)); 480 UN = A.Addr->getSibling(); 485 NodeId DN = DA.Addr->getReachedDef(); 488 for (auto T : DFG.getRelatedRefs(A.Addr->getOwner(DFG), A)) { 489 uint16_t Flags = NodeAddr<DefNode*>(T).Addr->getFlags(); 496 DN = A.Addr->getSibling(); 521 assert((UA.Addr->getFlags() & NodeAttrs::Undef) == 0); 528 Covered.insert(DA.Addr->getRegRef(DFG)); 556 if (PUA.Addr->getReachingDef() == 0) 559 RegisterRef UR = PUA.Addr->getRegRef(DFG); 564 if (D.Addr->getFlags() & NodeAttrs::PhiRef) { 565 NodeId RP = D.Addr->getOwner(DFG).Id; 573 DefRRs.insert(D.Addr->getRegRef(DFG)); 617 NodeList PUs = PA.Addr->members_if(DFG.IsRef<NodeAttrs::Use>, DFG); 622 RegisterRef UR = PRI.normalize(UA.Addr->getRegRef(DFG)); 670 NodeList Ds = PA.Addr->members_if(DFG.IsRef<NodeAttrs::Def>, DFG); 672 RegisterRef RR = NodeAddr<DefNode*>(Ds[0]).Addr->getRegRef(DFG); 686 for (NodeAddr<BlockNode*> BA : DFG.getFunc().Addr->members(DFG)) { 687 MachineBasicBlock *BB = BA.Addr->getCode(); 688 for (NodeAddr<InstrNode*> IA : BA.Addr->members(DFG)) { 689 for (NodeAddr<RefNode*> RA : IA.Addr->members(DFG)) 721 NodeList Blocks = FA.Addr->members(DFG); 725 MachineBasicBlock *MB = BA.Addr->getCode(); 727 for (auto P : BA.Addr->members_if(DFG.IsCode<NodeAttrs::Phi>, DFG)) 743 NodeList Phis = BA.Addr->members_if(DFG.IsCode<NodeAttrs::Phi>, DFG); 750 for (auto U : PA.Addr->members_if(DFG.IsRef<NodeAttrs::Use>, DFG)) { 754 if (PUA.Addr->getReachingDef() == 0) 768 auto PrA = DFG.addr<BlockNode*>(PUA.Addr->getPredecessor()); 769 RefMap &LOX = PhiLOX[PrA.Addr->getCode()]; 782 TA.insert(D.Addr->getRegRef(DFG)).intersect(S); 1001 NodeAddr<InstrNode*> IA = DA.Addr->getOwner(DFG); 1002 NodeAddr<BlockNode*> BA = IA.Addr->getOwner(DFG); 1003 if (B != BA.Addr->getCode()) { 1019 assert(!(IA.Addr->getFlags() & NodeAttrs::Phi)); 1024 if (RRs.insert(DA.Addr->getRegRef(DFG)).hasCoverOf(LRef)) 1035 NodeAddr<InstrNode*> ITA = TA.Addr->getOwner(DFG); 1036 NodeAddr<BlockNode*> BTA = ITA.Addr->getOwner(DFG); 1038 if (BTA.Addr->getCode() != B) { 1051 if (!(TA.Addr->getFlags() & NodeAttrs::Preserving)) 1052 RRs.insert(TA.Addr->getRegRef(DFG)); 1069 for (auto I : DFG.getFunc().Addr->findBlock(B, DFG).Addr->members(DFG)) { 1069 for (auto I : DFG.getFunc().Addr->findBlock(B, DFG).Addr->members(DFG)) { 1071 if (IA.Addr->getKind() != NodeAttrs::Stmt) 1073 for (NodeAddr<UseNode*> UA : IA.Addr->members_if(DFG.IsUse, DFG)) { 1074 if (UA.Addr->getFlags() & NodeAttrs::Undef) 1076 RegisterRef RR = PRI.normalize(UA.Addr->getRegRef(DFG));lib/Target/Hexagon/RDFLiveness.h
62 return getAllReachingDefs(RefA.Addr->getRegRef(DFG), RefA, false,