|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AArch64/AArch64GenDAGISel.inc114817 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
114832 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
gen/lib/Target/ARM/ARMGenDAGISel.inc54334 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
54378 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
gen/lib/Target/AVR/AVRGenDAGISel.inc 1648 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
1657 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc72505 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
gen/lib/Target/PowerPC/PPCGenDAGISel.inc44195 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
include/llvm/CodeGen/BasicTTIImpl.h 174 static ISD::MemIndexedMode getISDIndexedMode(TTI::MemIndexedMode M) {
include/llvm/CodeGen/SelectionDAG.h 350 SDNodeT *newSDNode(ArgTypes &&... Args) {
352 SDNodeT(std::forward<ArgTypes>(Args)...);
363 ArgTypes &&... Args) {
367 return SDNodeT(IROrder, DebugLoc(), std::forward<ArgTypes>(Args)...)
1096 SDValue Offset, ISD::MemIndexedMode AM);
1097 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
1103 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
1126 SDValue Offset, ISD::MemIndexedMode AM);
include/llvm/CodeGen/SelectionDAGNodes.h 1036 static const char* getIndexedModeName(ISD::MemIndexedMode AM);
2202 SDVTList VTs, ISD::MemIndexedMode AM, EVT MemVT,
2215 ISD::MemIndexedMode getAddressingMode() const {
2236 ISD::MemIndexedMode AM, ISD::LoadExtType ETy, EVT MemVT,
2264 ISD::MemIndexedMode AM, bool isTrunc, EVT MemVT,
include/llvm/CodeGen/TargetLowering.h 2971 ISD::MemIndexedMode &/*AM*/,
2982 ISD::MemIndexedMode &/*AM*/,
lib/CodeGen/SelectionDAG/DAGCombiner.cpp13538 ISD::MemIndexedMode AM = ISD::UNINDEXED;
13770 ISD::MemIndexedMode AM = ISD::UNINDEXED;
13855 ISD::MemIndexedMode AM = LD->getAddressingMode();
lib/CodeGen/SelectionDAG/SelectionDAG.cpp 6693 SDValue SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
6718 SDValue SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
6805 ISD::MemIndexedMode AM) {
6938 ISD::MemIndexedMode AM) {
lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp 445 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 1155 ISD::MemIndexedMode AM = LD->getAddressingMode();
lib/Target/AArch64/AArch64ISelLowering.cpp11858 ISD::MemIndexedMode &AM,
11882 ISD::MemIndexedMode &AM,
11904 ISD::MemIndexedMode &AM, SelectionDAG &DAG) const {
lib/Target/AArch64/AArch64ISelLowering.h 748 ISD::MemIndexedMode &AM, bool &IsInc,
751 ISD::MemIndexedMode &AM,
754 SDValue &Offset, ISD::MemIndexedMode &AM,
lib/Target/ARM/ARMISelDAGToDAG.cpp 764 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD)
800 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD)
820 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD)
899 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD)
1019 ISD::MemIndexedMode AM = LdSt->getAddressingMode();
1301 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD)
1353 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD)
1471 ISD::MemIndexedMode AM = LD->getAddressingMode();
1551 ISD::MemIndexedMode AM = LD->getAddressingMode();
1577 ISD::MemIndexedMode AM = LD->getAddressingMode();
1628 ISD::MemIndexedMode AM = LD->getAddressingMode();
lib/Target/ARM/ARMISelLowering.cpp15259 ISD::MemIndexedMode &AM,
15308 ISD::MemIndexedMode &AM,
lib/Target/ARM/ARMISelLowering.h 400 ISD::MemIndexedMode &AM,
407 SDValue &Offset, ISD::MemIndexedMode &AM,
lib/Target/AVR/AVRISelDAGToDAG.cpp 123 ISD::MemIndexedMode AM = LD->getAddressingMode();
170 ISD::MemIndexedMode AM = LD->getAddressingMode();
lib/Target/AVR/AVRISelLowering.cpp 774 ISD::MemIndexedMode &AM,
831 ISD::MemIndexedMode &AM,
lib/Target/AVR/AVRISelLowering.h 96 ISD::MemIndexedMode &AM,
100 SDValue &Offset, ISD::MemIndexedMode &AM,
lib/Target/Hexagon/HexagonISelDAGToDAG.cpp 450 ISD::MemIndexedMode AM = LD->getAddressingMode();
559 ISD::MemIndexedMode AM = ST->getAddressingMode();
lib/Target/Hexagon/HexagonISelLowering.cpp 546 SDValue &Base, SDValue &Offset, ISD::MemIndexedMode &AM,
lib/Target/Hexagon/HexagonISelLowering.h 263 ISD::MemIndexedMode &AM,
lib/Target/MSP430/MSP430ISelDAGToDAG.cpp 302 ISD::MemIndexedMode AM = LD->getAddressingMode();
lib/Target/MSP430/MSP430ISelLowering.cpp 1326 ISD::MemIndexedMode &AM,
lib/Target/MSP430/MSP430ISelLowering.h 180 ISD::MemIndexedMode &AM,
lib/Target/PowerPC/PPCISelLowering.cpp 2545 ISD::MemIndexedMode &AM,
lib/Target/PowerPC/PPCISelLowering.h 689 ISD::MemIndexedMode &AM,
usr/include/c++/7.4.0/bits/move.h 72 constexpr _Tp&&
73 forward(typename std::remove_reference<_Tp>::type& __t) noexcept
83 constexpr _Tp&&
84 forward(typename std::remove_reference<_Tp>::type&& __t) noexcept
usr/include/c++/7.4.0/type_traits 1629 { typedef _Tp type; };
1633 { typedef _Tp type; };