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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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Declarations
include/llvm/CodeGen/SelectionDAGNodes.h 184 inline const SDValue &getOperand(unsigned i) const;
References
lib/CodeGen/SelectionDAG/DAGCombiner.cpp 810 LHS = N.getOperand(0);
811 RHS = N.getOperand(1);
812 CC = N.getOperand(2);
817 !TLI.isConstTrueVal(N.getOperand(2).getNode()) ||
818 !TLI.isConstFalseVal(N.getOperand(3).getNode()))
825 LHS = N.getOperand(0);
826 RHS = N.getOperand(1);
827 CC = N.getOperand(4);
896 auto *C1 = dyn_cast<ConstantSDNode>(N0.getOperand(1));
949 if (SDNode *C1 = DAG.isConstantIntBuildVectorOrConstantInt(N0.getOperand(1))) {
953 return DAG.getNode(Opc, DL, VT, N0.getOperand(0), OpNode);
959 SDValue OpNode = DAG.getNode(Opc, SDLoc(N0), VT, N0.getOperand(0), N1);
962 return DAG.getNode(Opc, DL, VT, OpNode, N0.getOperand(1));
1118 if (SDValue Op0 = SExtPromoteOperand(Op.getOperand(0), PVT))
1119 return DAG.getNode(ISD::AssertSext, DL, PVT, Op0, Op.getOperand(1));
1122 if (SDValue Op0 = ZExtPromoteOperand(Op.getOperand(0), PVT))
1123 return DAG.getNode(ISD::AssertZext, DL, PVT, Op0, Op.getOperand(1));
1194 SDValue N0 = Op.getOperand(0);
1198 SDValue N1 = Op.getOperand(1);
1259 SDValue N0 = Op.getOperand(0);
1260 SDValue N1 = Op.getOperand(1);
1276 ReplaceLoadWithPromotedLoad(Op.getOperand(0).getNode(), N0.getNode());
1308 return DAG.getNode(Op.getOpcode(), SDLoc(Op), VT, Op.getOperand(0));
1933 SDValue CT = Sel.getOperand(1);
1938 SDValue CF = Sel.getOperand(2);
1989 SDValue SelectOp = DAG.getSelect(DL, VT, Sel.getOperand(0), NewCT, NewCF);
2009 if (Z.getOperand(0).getOpcode() != ISD::SETCC ||
2010 Z.getOperand(0).getValueType() != MVT::i1)
2014 SDValue SetCC = Z.getOperand(0);
2016 if (CC != ISD::SETEQ || !isNullConstant(SetCC.getOperand(1)) ||
2017 SetCC.getOperand(0).getOpcode() != ISD::AND ||
2018 !isOneConstant(SetCC.getOperand(0).getOperand(1)))
2018 !isOneConstant(SetCC.getOperand(0).getOperand(1)))
2027 SDValue LowBit = DAG.getZExtOrTrunc(SetCC.getOperand(0), DL, VT);
2050 SDValue Not = ShiftOp.getOperand(0);
2056 SDValue ShAmt = ShiftOp.getOperand(1);
2066 SDValue NewShift = DAG.getNode(ShOpcode, DL, VT, Not.getOperand(0), ShAmt);
2115 isConstantOrConstantVector(N0.getOperand(1), /* NoOpaque */ true)) {
2117 N0.getOperand(1).getNode());
2119 return DAG.getNode(ISD::ADD, DL, VT, N0.getOperand(0), Sub);
2124 isConstantOrConstantVector(N0.getOperand(0), /* NoOpaque */ true)) {
2126 N0.getOperand(0).getNode());
2128 return DAG.getNode(ISD::SUB, DL, VT, Add, N0.getOperand(1));
2137 SDValue X = N0.getOperand(0);
2149 isa<FrameIndexSDNode>(N0.getOperand(0)) &&
2150 isa<ConstantSDNode>(N0.getOperand(1)) &&
2151 DAG.haveNoCommonBitsSet(N0.getOperand(0), N0.getOperand(1))) {
2151 DAG.haveNoCommonBitsSet(N0.getOperand(0), N0.getOperand(1))) {
2152 SDValue Add0 = DAG.getNode(ISD::ADD, DL, VT, N1, N0.getOperand(1));
2153 return DAG.getNode(ISD::ADD, DL, VT, N0.getOperand(0), Add0);
2166 if (N0.getOpcode() == ISD::SUB && isNullOrNullSplat(N0.getOperand(0)))
2167 return DAG.getNode(ISD::SUB, DL, VT, N1, N0.getOperand(1));
2170 if (N1.getOpcode() == ISD::SUB && isNullOrNullSplat(N1.getOperand(0)))
2171 return DAG.getNode(ISD::SUB, DL, VT, N0, N1.getOperand(1));
2174 if (N1.getOpcode() == ISD::SUB && N0 == N1.getOperand(1))
2175 return N1.getOperand(0);
2178 if (N0.getOpcode() == ISD::SUB && N1 == N0.getOperand(1))
2179 return N0.getOperand(0);
2183 N0.getOperand(0) == N1.getOperand(1))
2183 N0.getOperand(0) == N1.getOperand(1))
2184 return DAG.getNode(ISD::SUB, DL, VT, N1.getOperand(0),
2185 N0.getOperand(1));
2189 N0.getOperand(1) == N1.getOperand(0))
2189 N0.getOperand(1) == N1.getOperand(0))
2190 return DAG.getNode(ISD::SUB, DL, VT, N0.getOperand(0),
2191 N1.getOperand(1));
2194 if (N1.getOpcode() == ISD::SUB && N1.getOperand(1).getOpcode() == ISD::ADD &&
2195 N0 == N1.getOperand(1).getOperand(0))
2195 N0 == N1.getOperand(1).getOperand(0))
2196 return DAG.getNode(ISD::SUB, DL, VT, N1.getOperand(0),
2197 N1.getOperand(1).getOperand(1));
2197 N1.getOperand(1).getOperand(1));
2200 if (N1.getOpcode() == ISD::SUB && N1.getOperand(1).getOpcode() == ISD::ADD &&
2201 N0 == N1.getOperand(1).getOperand(1))
2201 N0 == N1.getOperand(1).getOperand(1))
2202 return DAG.getNode(ISD::SUB, DL, VT, N1.getOperand(0),
2203 N1.getOperand(1).getOperand(0));
2203 N1.getOperand(1).getOperand(0));
2207 N1.getOperand(0).getOpcode() == ISD::SUB &&
2208 N0 == N1.getOperand(0).getOperand(1))
2208 N0 == N1.getOperand(0).getOperand(1))
2209 return DAG.getNode(N1.getOpcode(), DL, VT, N1.getOperand(0).getOperand(0),
2209 return DAG.getNode(N1.getOpcode(), DL, VT, N1.getOperand(0).getOperand(0),
2210 N1.getOperand(1));
2214 SDValue N00 = N0.getOperand(0);
2215 SDValue N01 = N0.getOperand(1);
2216 SDValue N10 = N1.getOperand(0);
2217 SDValue N11 = N1.getOperand(1);
2231 if (ISD::matchBinaryPredicate(N0.getOperand(1), N1, MatchUSUBSAT,
2233 return DAG.getNode(ISD::USUBSAT, DL, VT, N0.getOperand(0),
2234 N0.getOperand(1));
2244 N0.getOperand(0));
2252 if (isBitwiseNot(N0.getOperand(0))) {
2253 A = N0.getOperand(1);
2254 Xor = N0.getOperand(0);
2255 } else if (isBitwiseNot(N0.getOperand(1))) {
2256 A = N0.getOperand(0);
2257 Xor = N0.getOperand(1);
2261 return DAG.getNode(ISD::SUB, DL, VT, A, Xor.getOperand(0));
2270 SDValue Not = DAG.getNode(ISD::XOR, DL, VT, N0.getOperand(0),
2272 return DAG.getNode(ISD::SUB, DL, VT, N0.getOperand(1), Not);
2279 SDValue Xor = DAG.getNode(ISD::XOR, DL, VT, N0.getOperand(1), N1);
2280 return DAG.getNode(ISD::ADD, DL, VT, Xor, N0.getOperand(0));
2364 V = V.getOperand(0);
2368 if (V.getOpcode() == ISD::AND && isOneConstant(V.getOperand(1))) {
2370 V = V.getOperand(0);
2409 if (DAG.ComputeNumSignBits(N1.getOperand(0)) != VT.getScalarSizeInBits())
2414 return DAG.getNode(IsAdd ? ISD::SUB : ISD::ADD, DL, VT, N0, N1.getOperand(0));
2424 if (N1.getOpcode() == ISD::SHL && N1.getOperand(0).getOpcode() == ISD::SUB &&
2425 isNullOrNullSplat(N1.getOperand(0).getOperand(0)))
2425 isNullOrNullSplat(N1.getOperand(0).getOperand(0)))
2428 N1.getOperand(0).getOperand(1),
2428 N1.getOperand(0).getOperand(1),
2429 N1.getOperand(1)));
2439 N0.getOpcode() == ISD::ADD && isOneOrOneSplat(N0.getOperand(1))) {
2440 SDValue Not = DAG.getNode(ISD::XOR, DL, VT, N0.getOperand(0),
2449 isConstantOrConstantVector(N0.getOperand(1), /*NoOpaques=*/true)) {
2450 SDValue Add = DAG.getNode(ISD::ADD, DL, VT, N0.getOperand(0), N1);
2451 return DAG.getNode(ISD::SUB, DL, VT, Add, N0.getOperand(1));
2456 isConstantOrConstantVector(N0.getOperand(0), /*NoOpaques=*/true)) {
2457 SDValue Sub = DAG.getNode(ISD::SUB, DL, VT, N1, N0.getOperand(1));
2458 return DAG.getNode(ISD::ADD, DL, VT, Sub, N0.getOperand(0));
2465 N0.getOperand(0).getScalarValueSizeInBits() == 1 &&
2467 SDValue ZExt = DAG.getNode(ISD::ZERO_EXTEND, DL, VT, N0.getOperand(0));
2473 VTSDNode *TN = cast<VTSDNode>(N1.getOperand(1));
2475 SDValue ZExt = DAG.getNode(ISD::AND, DL, VT, N1.getOperand(0),
2482 if (N1.getOpcode() == ISD::ADDCARRY && isNullConstant(N1.getOperand(1)) &&
2485 N0, N1.getOperand(0), N1.getOperand(2));
2485 N0, N1.getOperand(0), N1.getOperand(2));
2561 ConstantSDNode *Const = isConstOrConstSplat(V.getOperand(1), false);
2581 return V.getOperand(0);
2619 DAG.getConstant(0, DL, VT), N0.getOperand(0));
2641 if (N1.getOpcode() == ISD::ADDCARRY && isNullConstant(N1.getOperand(1))) {
2642 SDValue Y = N1.getOperand(0);
2646 N1.getOperand(2));
2753 isNullConstant(Carry0.getOperand(1))) {
2754 Z = Carry0.getOperand(2);
2756 isOneConstant(Carry0.getOperand(1))) {
2758 Z = DAG.getConstant(1, SDLoc(Carry0.getOperand(1)), VT);
2781 if (Carry0.getOperand(0) == Carry1.getValue(0)) {
2782 return cancelDiamond(Carry1.getOperand(0), Carry1.getOperand(1));
2782 return cancelDiamond(Carry1.getOperand(0), Carry1.getOperand(1));
2792 if (Carry1.getOperand(0) == Carry0.getValue(0)) {
2793 return cancelDiamond(Carry0.getOperand(0), Carry1.getOperand(1));
2793 return cancelDiamond(Carry0.getOperand(0), Carry1.getOperand(1));
2796 if (Carry1.getOperand(1) == Carry0.getValue(0)) {
2797 return cancelDiamond(Carry1.getOperand(0), Carry0.getOperand(0));
2797 return cancelDiamond(Carry1.getOperand(0), Carry0.getOperand(0));
2810 N0.getOperand(0), NotC);
2824 N0.getOperand(0), N0.getOperand(1), CarryIn);
2824 N0.getOperand(0), N0.getOperand(1), CarryIn);
2898 ConstantSDNode *ShiftAmt = isConstOrConstSplat(N1.getOperand(1));
2902 return DAG.getNode(NewSh, DL, VT, N1.getOperand(0), N1.getOperand(1));
2902 return DAG.getNode(NewSh, DL, VT, N1.getOperand(0), N1.getOperand(1));
2926 if (N1.getOpcode() == ISD::SUB && isNullOrNullSplat(N1.getOperand(0)))
2927 return DAG.getNode(ISD::ADD, DL, VT, N0, N1.getOperand(1));
2930 if (N1.getOpcode() == ISD::SUB && N0 == N1.getOperand(0))
2931 return N1.getOperand(1);
2934 if (N0.getOpcode() == ISD::ADD && N0.getOperand(0) == N1)
2935 return N0.getOperand(1);
2938 if (N0.getOpcode() == ISD::ADD && N0.getOperand(1) == N1)
2939 return N0.getOperand(0);
2944 isConstantOrConstantVector(N0.getOperand(1), /* NoOpaques */ true)) {
2946 ISD::SUB, DL, VT, N0.getOperand(1).getNode(), N1.getNode());
2948 return DAG.getNode(ISD::ADD, DL, VT, N0.getOperand(0), NewC);
2953 SDValue N11 = N1.getOperand(1);
2959 return DAG.getNode(ISD::SUB, DL, VT, NewC, N1.getOperand(0));
2966 isConstantOrConstantVector(N0.getOperand(1), /* NoOpaques */ true)) {
2968 ISD::ADD, DL, VT, N0.getOperand(1).getNode(), N1.getNode());
2970 return DAG.getNode(ISD::SUB, DL, VT, N0.getOperand(0), NewC);
2976 isConstantOrConstantVector(N0.getOperand(0), /* NoOpaques */ true)) {
2978 ISD::SUB, DL, VT, N0.getOperand(0).getNode(), N1.getNode());
2980 return DAG.getNode(ISD::SUB, DL, VT, NewC, N0.getOperand(1));
2985 (N0.getOperand(1).getOpcode() == ISD::SUB ||
2986 N0.getOperand(1).getOpcode() == ISD::ADD) &&
2987 N0.getOperand(1).getOperand(0) == N1)
2987 N0.getOperand(1).getOperand(0) == N1)
2988 return DAG.getNode(N0.getOperand(1).getOpcode(), DL, VT, N0.getOperand(0),
2988 return DAG.getNode(N0.getOperand(1).getOpcode(), DL, VT, N0.getOperand(0),
2989 N0.getOperand(1).getOperand(1));
2989 N0.getOperand(1).getOperand(1));
2992 if (N0.getOpcode() == ISD::ADD && N0.getOperand(1).getOpcode() == ISD::ADD &&
2993 N0.getOperand(1).getOperand(1) == N1)
2993 N0.getOperand(1).getOperand(1) == N1)
2994 return DAG.getNode(ISD::ADD, DL, VT, N0.getOperand(0),
2995 N0.getOperand(1).getOperand(0));
2995 N0.getOperand(1).getOperand(0));
2998 if (N0.getOpcode() == ISD::SUB && N0.getOperand(1).getOpcode() == ISD::SUB &&
2999 N0.getOperand(1).getOperand(1) == N1)
2999 N0.getOperand(1).getOperand(1) == N1)
3000 return DAG.getNode(ISD::SUB, DL, VT, N0.getOperand(0),
3001 N0.getOperand(1).getOperand(0));
3001 N0.getOperand(1).getOperand(0));
3006 DAG.getNode(ISD::SUB, DL, VT, N1.getOperand(1),
3007 N1.getOperand(0)));
3011 if (N1.getOperand(0).getOpcode() == ISD::SUB &&
3012 isNullOrNullSplat(N1.getOperand(0).getOperand(0))) {
3012 isNullOrNullSplat(N1.getOperand(0).getOperand(0))) {
3014 N1.getOperand(0).getOperand(1),
3014 N1.getOperand(0).getOperand(1),
3015 N1.getOperand(1));
3018 if (N1.getOperand(1).getOpcode() == ISD::SUB &&
3019 isNullOrNullSplat(N1.getOperand(1).getOperand(0))) {
3019 isNullOrNullSplat(N1.getOperand(1).getOperand(0))) {
3021 N1.getOperand(0),
3022 N1.getOperand(1).getOperand(1));
3022 N1.getOperand(1).getOperand(1));
3044 SDValue Xor = DAG.getNode(ISD::XOR, DL, VT, N0.getOperand(1),
3046 return DAG.getNode(ISD::ADD, DL, VT, Xor, N0.getOperand(0));
3054 SDValue Add = DAG.getNode(ISD::ADD, DL, VT, N0, N1.getOperand(0));
3061 isConstantOrConstantVector(N0.getOperand(1), /*NoOpaques=*/true)) {
3062 SDValue Sub = DAG.getNode(ISD::SUB, DL, VT, N0.getOperand(0), N1);
3063 return DAG.getNode(ISD::ADD, DL, VT, Sub, N0.getOperand(1));
3067 isConstantOrConstantVector(N1.getOperand(1), /*NoOpaques=*/true)) {
3068 SDValue Sub = DAG.getNode(ISD::SUB, DL, VT, N0, N1.getOperand(0));
3069 return DAG.getNode(ISD::SUB, DL, VT, Sub, N1.getOperand(1));
3074 isConstantOrConstantVector(N0.getOperand(1), /*NoOpaques=*/true)) {
3075 SDValue Sub = DAG.getNode(ISD::SUB, DL, VT, N0.getOperand(0), N1);
3076 return DAG.getNode(ISD::SUB, DL, VT, Sub, N0.getOperand(1));
3080 isConstantOrConstantVector(N0.getOperand(0), /*NoOpaques=*/true)) {
3081 SDValue Add = DAG.getNode(ISD::ADD, DL, VT, N0.getOperand(1), N1);
3082 return DAG.getNode(ISD::SUB, DL, VT, N0.getOperand(0), Add);
3089 N1.getOperand(0).getScalarValueSizeInBits() == 1 &&
3092 SDValue SExt = DAG.getNode(ISD::SIGN_EXTEND, DL, VT, N1.getOperand(0));
3099 SDValue X0 = N0.getOperand(0), X1 = N0.getOperand(1);
3099 SDValue X0 = N0.getOperand(0), X1 = N0.getOperand(1);
3100 SDValue S0 = N1.getOperand(0);
3103 if (ConstantSDNode *C = isConstOrConstSplat(N1.getOperand(1)))
3127 VTSDNode *TN = cast<VTSDNode>(N1.getOperand(1));
3129 SDValue ZExt = DAG.getNode(ISD::AND, DL, VT, N1.getOperand(0),
3138 SDValue ShAmt = N1.getOperand(1);
3142 SDValue SRA = DAG.getNode(ISD::SRA, DL, VT, N1.getOperand(0), ShAmt);
3441 isConstantOrConstantVector(N0.getOperand(1), /* NoOpaques */ true)) {
3442 SDValue C3 = DAG.getNode(ISD::SHL, SDLoc(N), VT, N1, N0.getOperand(1));
3444 return DAG.getNode(ISD::MUL, SDLoc(N), VT, N0.getOperand(0), C3);
3454 isConstantOrConstantVector(N0.getOperand(1)) &&
3458 isConstantOrConstantVector(N1.getOperand(1)) &&
3464 SDValue Mul = DAG.getNode(ISD::MUL, SDLoc(N), VT, Sh.getOperand(0), Y);
3465 return DAG.getNode(ISD::SHL, SDLoc(N), VT, Mul, Sh.getOperand(1));
3472 DAG.isConstantIntBuildVectorOrConstantInt(N0.getOperand(1)) &&
3476 N0.getOperand(0), N1),
3478 N0.getOperand(1), N1));
3842 SDValue N10 = N1.getOperand(0);
3848 EVT ADDVT = N1.getOperand(1).getValueType();
3851 SDValue Add = DAG.getNode(ISD::ADD, DL, ADDVT, N1.getOperand(1), Trunc);
3909 DAG.isKnownToBeAPowerOfTwo(N1.getOperand(0))) {
4266 SDValue X = N0.getOperand(0);
4267 SDValue Y = N1.getOperand(0);
4320 N0.getOperand(1) == N1.getOperand(1)) {
4320 N0.getOperand(1) == N1.getOperand(1)) {
4325 return DAG.getNode(HandOpcode, DL, VT, Logic, N0.getOperand(1));
4383 SDValue ShOp = N0.getOperand(1);
4388 if (N0.getOperand(1) == N1.getOperand(1) && ShOp.getNode()) {
4388 if (N0.getOperand(1) == N1.getOperand(1) && ShOp.getNode()) {
4390 N0.getOperand(0), N1.getOperand(0));
4390 N0.getOperand(0), N1.getOperand(0));
4396 ShOp = N0.getOperand(0);
4401 if (N0.getOperand(0) == N1.getOperand(0) && ShOp.getNode()) {
4401 if (N0.getOperand(0) == N1.getOperand(0) && ShOp.getNode()) {
4402 SDValue Logic = DAG.getNode(LogicOpcode, DL, VT, N0.getOperand(1),
4403 N1.getOperand(1));
4575 if (ConstantSDNode *ADDI = dyn_cast<ConstantSDNode>(N0.getOperand(1))) {
4576 if (ConstantSDNode *SRLI = dyn_cast<ConstantSDNode>(N1.getOperand(1))) {
4588 if (DAG.MaskedValueIsZero(N0.getOperand(1), Mask)) {
4594 N0.getOperand(0), DAG.getConstant(ADDC, DL, VT));
4610 if (ConstantSDNode *CShift = dyn_cast<ConstantSDNode>(N0.getOperand(1))) {
4642 N0.getOperand(0));
4817 cast<VTSDNode>(Op.getOperand(1))->getVT() :
4818 Op.getOperand(0).getValueType();
4997 Not = Not.getOperand(0);
5004 SDValue Srl = Not.getOperand(0);
5006 Srl = Srl.getOperand(0);
5010 !isa<ConstantSDNode>(Srl.getOperand(1)))
5024 SDValue X = DAG.getZExtOrTrunc(Srl.getOperand(0), DL, VT);
5100 ISD::matchBinaryPredicate(N0.getOperand(1), N1, MatchSubset))
5104 SDValue N0Op0 = N0.getOperand(0);
5129 N0.getValueSizeInBits() == N0.getOperand(0).getScalarValueSizeInBits() &&
5130 N0.getOperand(0).getOpcode() == ISD::LOAD &&
5131 N0.getOperand(0).getResNo() == 0) ||
5134 N0 : N0.getOperand(0) );
5231 N0.getOperand(0).getOpcode() == ISD::LOAD))) {
5234 ? cast<LoadSDNode>(N0.getOperand(0)) : cast<LoadSDNode>(N0);
5267 if (isNullOrNullSplat(N0.getOperand(0))) {
5268 SDValue SubRHS = N0.getOperand(1);
5270 SubRHS.getOperand(0).getScalarValueSizeInBits() == 1)
5273 SubRHS.getOperand(0).getScalarValueSizeInBits() == 1)
5274 return DAG.getNode(ISD::ZERO_EXTEND, SDLoc(N), VT, SubRHS.getOperand(0));
5309 if (SDValue BSwap = MatchBSwapHWordLow(N0.getNode(), N0.getOperand(0),
5310 N0.getOperand(1), false))
5339 if (N0.getOpcode() == ISD::AND && N0.getOperand(0).getOpcode() == ISD::SRL)
5341 if (N1.getOpcode() == ISD::AND && N1.getOperand(0).getOpcode() == ISD::SHL)
5346 ConstantSDNode *N01C = dyn_cast<ConstantSDNode>(N0.getOperand(1));
5352 N0 = N0.getOperand(0);
5359 ConstantSDNode *N11C = dyn_cast<ConstantSDNode>(N1.getOperand(1));
5362 N1 = N1.getOperand(0);
5373 ConstantSDNode *N01C = dyn_cast<ConstantSDNode>(N0.getOperand(1));
5374 ConstantSDNode *N11C = dyn_cast<ConstantSDNode>(N1.getOperand(1));
5385 ConstantSDNode *N001C = dyn_cast<ConstantSDNode>(N00.getOperand(1));
5388 N00 = N00.getOperand(0);
5396 ConstantSDNode *N101C = dyn_cast<ConstantSDNode>(N10.getOperand(1));
5402 N10 = N10.getOperand(0);
5451 SDValue N0 = N.getOperand(0);
5459 N1C = dyn_cast<ConstantSDNode>(N.getOperand(1));
5461 N1C = dyn_cast<ConstantSDNode>(N0.getOperand(1));
5490 ConstantSDNode *C = dyn_cast<ConstantSDNode>(N0.getOperand(1));
5498 ConstantSDNode *C = dyn_cast<ConstantSDNode>(N0.getOperand(1));
5507 ConstantSDNode *C = dyn_cast<ConstantSDNode>(N.getOperand(1));
5515 ConstantSDNode *C = dyn_cast<ConstantSDNode>(N.getOperand(1));
5523 Parts[MaskByteOffset] = N0.getOperand(0).getNode();
5530 return isBSwapHWordElement(N.getOperand(0), Parts) &&
5531 isBSwapHWordElement(N.getOperand(1), Parts);
5533 if (N.getOpcode() == ISD::SRL && N.getOperand(0).getOpcode() == ISD::BSWAP) {
5534 ConstantSDNode *C = isConstOrConstSplat(N.getOperand(1));
5537 Parts[0] = Parts[1] = N.getOperand(0).getOperand(0).getNode();
5537 Parts[0] = Parts[1] = N.getOperand(0).getOperand(0).getNode();
5574 SDValue N00 = N0.getOperand(0);
5575 SDValue N01 = N0.getOperand(1);
5622 getAsNonOpaqueConstant(N0.getOperand(1))) {
5624 getAsNonOpaqueConstant(N1.getOperand(1))) {
5630 if (DAG.MaskedValueIsZero(N0.getOperand(0), RHSMask&~LHSMask) &&
5631 DAG.MaskedValueIsZero(N1.getOperand(0), LHSMask&~RHSMask)) {
5633 N0.getOperand(0), N1.getOperand(0));
5633 N0.getOperand(0), N1.getOperand(0));
5644 N0.getOperand(0) == N1.getOperand(0) &&
5644 N0.getOperand(0) == N1.getOperand(0) &&
5648 N0.getOperand(1), N1.getOperand(1));
5648 N0.getOperand(1), N1.getOperand(1));
5649 return DAG.getNode(ISD::AND, DL, VT, N0.getOperand(0), X);
5661 if (isBitwiseNot(N0.getOperand(1)) && N0.getOperand(1).getOperand(0) == N1)
5661 if (isBitwiseNot(N0.getOperand(1)) && N0.getOperand(1).getOperand(0) == N1)
5661 if (isBitwiseNot(N0.getOperand(1)) && N0.getOperand(1).getOperand(0) == N1)
5662 return DAG.getNode(ISD::OR, SDLoc(N), VT, N0.getOperand(0), N1);
5665 if (isBitwiseNot(N0.getOperand(0)) && N0.getOperand(0).getOperand(0) == N1)
5665 if (isBitwiseNot(N0.getOperand(0)) && N0.getOperand(0).getOperand(0) == N1)
5665 if (isBitwiseNot(N0.getOperand(0)) && N0.getOperand(0).getOperand(0) == N1)
5666 return DAG.getNode(ISD::OR, SDLoc(N), VT, N0.getOperand(1), N1);
5706 bool ZeroN00 = ISD::isBuildVectorAllZeros(N0.getOperand(0).getNode());
5707 bool ZeroN01 = ISD::isBuildVectorAllZeros(N0.getOperand(1).getNode());
5708 bool ZeroN10 = ISD::isBuildVectorAllZeros(N1.getOperand(0).getNode());
5709 bool ZeroN11 = ISD::isBuildVectorAllZeros(N1.getOperand(1).getNode());
5751 SDValue NewLHS = ZeroN00 ? N0.getOperand(1) : N0.getOperand(0);
5751 SDValue NewLHS = ZeroN00 ? N0.getOperand(1) : N0.getOperand(0);
5752 SDValue NewRHS = ZeroN10 ? N1.getOperand(1) : N1.getOperand(0);
5752 SDValue NewRHS = ZeroN10 ? N1.getOperand(1) : N1.getOperand(0);
5806 ISD::matchBinaryPredicate(N0.getOperand(1), N1, MatchIntersect, true)) {
5808 ISD::OR, SDLoc(N1), VT, N1.getNode(), N0.getOperand(1).getNode())) {
5809 SDValue IOR = DAG.getNode(ISD::OR, SDLoc(N0), VT, N0.getOperand(0), N1);
5847 DAG.isConstantIntBuildVectorOrConstantInt(Op.getOperand(1))) {
5848 Mask = Op.getOperand(1);
5849 return Op.getOperand(0);
5900 SDValue OppShiftLHS = OppShift.getOperand(0);
5904 ConstantSDNode *OppShiftCst = isConstOrConstSplat(OppShift.getOperand(1));
5909 ExtractFrom.getOperand(0) == ExtractFrom.getOperand(1) &&
5909 ExtractFrom.getOperand(0) == ExtractFrom.getOperand(1) &&
5910 ExtractFrom.getOperand(0) == OppShiftLHS &&
5939 OppShiftLHS.getOperand(0) != ExtractFrom.getOperand(0) ||
5939 OppShiftLHS.getOperand(0) != ExtractFrom.getOperand(0) ||
5944 ConstantSDNode *OppLHSCst = isConstOrConstSplat(OppShiftLHS.getOperand(1));
5947 isConstOrConstSplat(ExtractFrom.getOperand(1));
5989 EVT ShiftVT = OppShift.getOperand(1).getValueType();
6039 if (ConstantSDNode *NegC = isConstOrConstSplat(Neg.getOperand(1))) {
6040 KnownBits Known = DAG.computeKnownBits(Neg.getOperand(0));
6044 Neg = Neg.getOperand(0);
6053 ConstantSDNode *NegC = isConstOrConstSplat(Neg.getOperand(0));
6056 SDValue NegOp1 = Neg.getOperand(1);
6061 if (ConstantSDNode *PosC = isConstOrConstSplat(Pos.getOperand(1))) {
6062 KnownBits Known = DAG.computeKnownBits(Pos.getOperand(0));
6066 Pos = Pos.getOperand(0);
6092 else if (Pos.getOpcode() == ISD::ADD && Pos.getOperand(0) == NegOp1) {
6093 if (ConstantSDNode *PosC = isConstOrConstSplat(Pos.getOperand(1)))
6150 LHS.getOperand(0).getValueType() == RHS.getOperand(0).getValueType()) {
6150 LHS.getOperand(0).getValueType() == RHS.getOperand(0).getValueType()) {
6152 if (SDValue Rot = MatchRotate(LHS.getOperand(0), RHS.getOperand(0), DL)) {
6152 if (SDValue Rot = MatchRotate(LHS.getOperand(0), RHS.getOperand(0), DL)) {
6195 if (LHSShift.getOperand(0) != RHSShift.getOperand(0))
6195 if (LHSShift.getOperand(0) != RHSShift.getOperand(0))
6209 SDValue LHSShiftArg = LHSShift.getOperand(0);
6210 SDValue LHSShiftAmt = LHSShift.getOperand(1);
6211 SDValue RHSShiftArg = RHSShift.getOperand(0);
6212 SDValue RHSShiftAmt = RHSShift.getOperand(1);
6262 LExtOp0 = LHSShiftAmt.getOperand(0);
6263 RExtOp0 = RHSShiftAmt.getOperand(0);
6448 return stripTruncAndExt(Value.getOperand(0));
6515 SDValue Value = Trunc.getOperand(0);
6519 dyn_cast<ConstantSDNode>(Value.getOperand(1));
6530 Value = Value.getOperand(0);
6802 SDValue Xor = And.getOperand(XorIdx);
6805 SDValue Xor0 = Xor.getOperand(0);
6806 SDValue Xor1 = Xor.getOperand(1);
6816 M = And.getOperand(XorIdx ? 0 : 1);
6916 return DAG.getSelectCC(SDLoc(N0), LHS, RHS, N0.getOperand(2),
6917 N0.getOperand(3), NotCC);
6924 isSetCCEquivalent(N0.getOperand(0), LHS, RHS, CC)){
6925 SDValue V = N0.getOperand(0);
6936 SDValue N00 = N0.getOperand(0), N01 = N0.getOperand(1);
6936 SDValue N00 = N0.getOperand(0), N01 = N0.getOperand(1);
6948 SDValue N00 = N0.getOperand(0), N01 = N0.getOperand(1);
6948 SDValue N00 = N0.getOperand(0), N01 = N0.getOperand(1);
6962 isNullConstant(N0.getOperand(0))) {
6963 return DAG.getNode(ISD::ADD, DL, VT, N0.getOperand(1),
6969 SDValue X = N0.getOperand(0);
6977 ConstantSDNode *ShiftC = isConstOrConstSplat(N0.getOperand(1));
6990 SDValue Not = DAG.getNOT(DL, N0.getOperand(0), VT);
6991 return DAG.getNode(N0Opcode, DL, VT, Not, N0.getOperand(1));
7002 SDValue A0 = A.getOperand(0), A1 = A.getOperand(1);
7002 SDValue A0 = A.getOperand(0), A1 = A.getOperand(1);
7003 SDValue S0 = S.getOperand(0);
7006 if (ConstantSDNode *C = isConstOrConstSplat(S.getOperand(1)))
7036 isAllOnesConstant(N1) && isOneConstant(N0.getOperand(0))) {
7038 N0.getOperand(1));
7083 ConstantSDNode *ShiftCNode = isConstOrConstSplat(V.getOperand(1));
7088 ShiftOp = V.getOperand(0);
7106 if (matchFirstShift(LogicOp.getOperand(0), X, C0Val))
7107 Y = LogicOp.getOperand(1);
7108 else if (matchFirstShift(LogicOp.getOperand(1), X, C0Val))
7109 Y = LogicOp.getOperand(0);
7167 ConstantSDNode *BinOpCst = getAsNonOpaqueConstant(LHS.getOperand(1));
7174 SDValue BinOpLHSVal = LHS.getOperand(0);
7178 isa<ConstantSDNode>(BinOpLHSVal.getOperand(1));
7191 SDValue NewRHS = DAG.getNode(N->getOpcode(), DL, VT, LHS.getOperand(1),
7195 SDValue NewShift = DAG.getNode(N->getOpcode(), DL, VT, LHS.getOperand(0),
7208 SDValue N01 = N->getOperand(0).getOperand(1);
7211 SDValue N00 = N->getOperand(0).getOperand(0);
7253 N1.getOperand(0).getOpcode() == ISD::AND) {
7262 SDNode *C2 = DAG.isConstantIntBuildVectorOrConstantInt(N0.getOperand(1));
7306 TLI.getBooleanContents(N00.getOperand(0).getValueType()) ==
7334 N1.getOperand(0).getOpcode() == ISD::AND) {
7352 if (ISD::matchBinaryPredicate(N1, N0.getOperand(1), MatchOutOfRange))
7362 if (ISD::matchBinaryPredicate(N1, N0.getOperand(1), MatchInRange)) {
7364 SDValue Sum = DAG.getNode(ISD::ADD, DL, ShiftVT, N1, N0.getOperand(1));
7365 return DAG.getNode(ISD::SHL, DL, VT, N0.getOperand(0), Sum);
7377 N0.getOperand(0).getOpcode() == ISD::SHL) {
7378 SDValue N0Op0 = N0.getOperand(0);
7379 SDValue InnerShiftAmt = N0Op0.getOperand(1);
7408 SDValue Ext = DAG.getNode(N0.getOpcode(), DL, VT, N0Op0.getOperand(0));
7419 N0.getOperand(0).getOpcode() == ISD::SRL) {
7420 SDValue N0Op0 = N0.getOperand(0);
7421 SDValue InnerShiftAmt = N0Op0.getOperand(1);
7433 EVT InnerShiftAmtVT = N0Op0.getOperand(1).getValueType();
7446 if (ConstantSDNode *N0C1 = isConstOrConstSplat(N0.getOperand(1))) {
7451 return DAG.getNode(ISD::SHL, DL, VT, N0.getOperand(0),
7453 return DAG.getNode(N0.getOpcode(), DL, VT, N0.getOperand(0),
7466 if (ConstantSDNode *N0C1 = isConstOrConstSplat(N0.getOperand(1))) {
7475 Shift = DAG.getNode(ISD::SHL, DL, VT, N0.getOperand(0),
7480 Shift = DAG.getNode(ISD::SRL, DL, VT, N0.getOperand(0),
7491 if (N0.getOpcode() == ISD::SRA && N1 == N0.getOperand(1) &&
7496 return DAG.getNode(ISD::AND, DL, VT, N0.getOperand(0), HiBitsMask);
7506 isConstantOrConstantVector(N0.getOperand(1), /* No Opaques */ true) &&
7508 SDValue Shl0 = DAG.getNode(ISD::SHL, SDLoc(N0), VT, N0.getOperand(0), N1);
7509 SDValue Shl1 = DAG.getNode(ISD::SHL, SDLoc(N1), VT, N0.getOperand(1), N1);
7518 isConstantOrConstantVector(N0.getOperand(1), /* No Opaques */ true)) {
7519 SDValue Shl = DAG.getNode(ISD::SHL, SDLoc(N1), VT, N0.getOperand(1), N1);
7521 return DAG.getNode(ISD::MUL, SDLoc(N), VT, N0.getOperand(0), Shl);
7564 if (N1C && N0.getOpcode() == ISD::SHL && N1 == N0.getOperand(1)) {
7573 N0.getOperand(0), DAG.getValueType(ExtVT));
7594 if (ISD::matchBinaryPredicate(N1, N0.getOperand(1), SumOfShifts)) {
7600 return DAG.getNode(ISD::SRA, DL, VT, N0.getOperand(0), ShiftValue);
7611 const ConstantSDNode *N01C = isConstOrConstSplat(N0.getOperand(1));
7633 getShiftAmountTy(N0.getOperand(0).getValueType()));
7635 N0.getOperand(0), Amt);
7648 N0.getOperand(0).getOpcode() == ISD::SHL &&
7649 N0.getOperand(0).getOperand(1) == N1 && N0.getOperand(0).hasOneUse()) {
7649 N0.getOperand(0).getOperand(1) == N1 && N0.getOperand(0).hasOneUse()) {
7649 N0.getOperand(0).getOperand(1) == N1 && N0.getOperand(0).hasOneUse()) {
7650 if (ConstantSDNode *AddC = isConstOrConstSplat(N0.getOperand(1))) {
7651 SDValue Shl = N0.getOperand(0);
7666 SDValue Trunc = DAG.getZExtOrTrunc(Shl.getOperand(0), DL, TruncVT);
7677 N1.getOperand(0).getOpcode() == ISD::AND) {
7687 (N0.getOperand(0).getOpcode() == ISD::SRL ||
7688 N0.getOperand(0).getOpcode() == ISD::SRA) &&
7689 N0.getOperand(0).hasOneUse() &&
7690 N0.getOperand(0).getOperand(1).hasOneUse() && N1C) {
7690 N0.getOperand(0).getOperand(1).hasOneUse() && N1C) {
7691 SDValue N0Op0 = N0.getOperand(0);
7692 if (ConstantSDNode *LargeShift = isConstOrConstSplat(N0Op0.getOperand(1))) {
7700 DAG.getNode(ISD::SRA, DL, LargeVT, N0Op0.getOperand(0), Amt);
7761 if (ISD::matchBinaryPredicate(N1, N0.getOperand(1), MatchOutOfRange))
7771 if (ISD::matchBinaryPredicate(N1, N0.getOperand(1), MatchInRange)) {
7774 SDValue Sum = DAG.getNode(ISD::ADD, DL, ShiftVT, N1, N0.getOperand(1));
7775 return DAG.getNode(ISD::SRL, DL, VT, N0.getOperand(0), Sum);
7782 N0.getOperand(0).getOpcode() == ISD::SRL) {
7783 if (auto N001C = isConstOrConstSplat(N0.getOperand(0).getOperand(1))) {
7783 if (auto N001C = isConstOrConstSplat(N0.getOperand(0).getOperand(1))) {
7786 EVT InnerShiftVT = N0.getOperand(0).getValueType();
7787 EVT ShiftCountVT = N0.getOperand(0).getOperand(1).getValueType();
7787 EVT ShiftCountVT = N0.getOperand(0).getOperand(1).getValueType();
7796 N0.getOperand(0).getOperand(0),
7796 N0.getOperand(0).getOperand(0),
7805 if (N0.getOpcode() == ISD::SHL && N0.getOperand(1) == N1 &&
7811 return DAG.getNode(ISD::AND, DL, VT, N0.getOperand(0), Mask);
7818 EVT SmallVT = N0.getOperand(0).getValueType();
7827 N0.getOperand(0),
7843 return DAG.getNode(ISD::SRL, SDLoc(N), VT, N0.getOperand(0), N1);
7849 KnownBits Known = DAG.computeKnownBits(N0.getOperand(0));
7867 SDValue Op = N0.getOperand(0);
7885 N1.getOperand(0).getOpcode() == ISD::AND) {
8049 return N0.getOperand(0);
8189 VT != Cond.getOperand(0).getValueType())
8194 SDValue X = Cond.getOperand(0);
8195 SDValue CondC = Cond.getOperand(1);
8196 ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
8451 SDValue Cond0 = N0.getOperand(0), Cond1 = N0.getOperand(1);
8451 SDValue Cond0 = N0.getOperand(0), Cond1 = N0.getOperand(1);
8452 ISD::CondCode CC = cast<CondCodeSDNode>(N0.getOperand(2))->get();
8470 N2.getOpcode() == ISD::ADD && Cond0 == N2.getOperand(0)) {
8471 auto *C = dyn_cast<ConstantSDNode>(N2.getOperand(1));
8487 SDValue UAO = DAG.getNode(ISD::UADDO, DL, VTs, Cond0, N2.getOperand(1));
8499 N2, N0.getOperand(2));
8539 BottomHalf = cast<ConstantSDNode>(Cond.getOperand(i));
8551 TopHalf = cast<ConstantSDNode>(Cond.getOperand(i));
8635 SDValue N1Elt = N1.getOperand(i);
8636 SDValue N2Elt = N2.getOperand(i);
8698 SDValue LHS = N0.getOperand(0), RHS = N0.getOperand(1);
8698 SDValue LHS = N0.getOperand(0), RHS = N0.getOperand(1);
8699 ISD::CondCode CC = cast<CondCodeSDNode>(N0.getOperand(2))->get();
8705 N1 == LHS && N2.getOpcode() == ISD::SUB && N1 == N2.getOperand(1))
8706 isAbs = ISD::isBuildVectorAllZeros(N2.getOperand(0).getNode());
8708 N2 == LHS && N1.getOpcode() == ISD::SUB && N2 == N1.getOperand(1))
8709 isAbs = ISD::isBuildVectorAllZeros(N1.getOperand(0).getNode());
8822 ISD::SELECT_CC, SDLoc(N), N2.getValueType(), SCC.getOperand(0),
8823 SCC.getOperand(1), N2, N3, SCC.getOperand(2));
8823 SCC.getOperand(1), N2, N3, SCC.getOperand(2));
8950 SDValue Op = N0.getOperand(i);
9167 N0.getOperand(1).getOpcode() != ISD::Constant ||
9174 N1.getOperand(1).getOpcode() != ISD::Constant ||
9179 if (!isa<LoadSDNode>(N1.getOperand(0)))
9181 LoadSDNode *Load = cast<LoadSDNode>(N1.getOperand(0));
9197 if (!ExtendUsesToFormExtLoad(VT, N1.getNode(), N1.getOperand(0),
9208 N1.getOperand(1));
9210 APInt Mask = cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue();
9216 ExtendSetCCUses(SetCCs, N1.getOperand(0), ExtLoad, ISD::ZERO_EXTEND);
9252 VSel.getOperand(0).getOpcode() != ISD::SETCC)
9256 SDValue SetCC = VSel.getOperand(0);
9257 EVT SetCCVT = getSetCCResultType(SetCC.getOperand(0).getValueType());
9262 SDValue A = VSel.getOperand(1);
9263 SDValue B = VSel.getOperand(2);
9389 SDValue X = SetCC.getOperand(0);
9390 SDValue Ones = SetCC.getOperand(1);
9391 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC.getOperand(2))->get();
9421 return DAG.getNode(ISD::SIGN_EXTEND, DL, VT, N0.getOperand(0));
9427 SDNode *oye = N0.getOperand(0).getNode();
9438 SDValue Op = N0.getOperand(0);
9498 isa<LoadSDNode>(N0.getOperand(0)) &&
9499 N0.getOperand(1).getOpcode() == ISD::Constant &&
9501 LoadSDNode *LN00 = cast<LoadSDNode>(N0.getOperand(0));
9506 bool DoXform = ExtendUsesToFormExtLoad(VT, N0.getNode(), N0.getOperand(0),
9513 APInt Mask = cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue();
9517 ExtendSetCCUses(SetCCs, N0.getOperand(0), ExtLoad, ISD::SIGN_EXTEND);
9543 SDValue N00 = N0.getOperand(0);
9544 SDValue N01 = N0.getOperand(1);
9545 ISD::CondCode CC = cast<CondCodeSDNode>(N0.getOperand(2))->get();
9546 EVT N00VT = N0.getOperand(0).getValueType();
9624 isNullOrNullSplat(N0.getOperand(0)) &&
9625 N0.getOperand(1).getOpcode() == ISD::ZERO_EXTEND &&
9627 SDValue Zext = DAG.getZExtOrTrunc(N0.getOperand(1).getOperand(0), DL, VT);
9627 SDValue Zext = DAG.getZExtOrTrunc(N0.getOperand(1).getOperand(0), DL, VT);
9633 isAllOnesOrAllOnesSplat(N0.getOperand(1)) &&
9634 N0.getOperand(0).getOpcode() == ISD::ZERO_EXTEND &&
9636 SDValue Zext = DAG.getZExtOrTrunc(N0.getOperand(0).getOperand(0), DL, VT);
9636 SDValue Zext = DAG.getZExtOrTrunc(N0.getOperand(0).getOperand(0), DL, VT);
9657 cast<CondCodeSDNode>(N.getOperand(2))->get() != ISD::SETNE)
9695 SDValue NewZext = DAG.getZExtOrTrunc(CtPop.getOperand(0), DL, VT);
9710 N0.getOperand(0));
9734 SDNode *oye = N0.getOperand(0).getNode();
9743 EVT SrcVT = N0.getOperand(0).getValueType();
9751 SDValue Op = N0.getOperand(0);
9762 SDValue Op = DAG.getAnyExtOrTrunc(N0.getOperand(0), SDLoc(N), VT);
9775 N0.getOperand(0).getOpcode() == ISD::TRUNCATE &&
9776 N0.getOperand(1).getOpcode() == ISD::Constant &&
9777 (!TLI.isTruncateFree(N0.getOperand(0).getOperand(0).getValueType(),
9777 (!TLI.isTruncateFree(N0.getOperand(0).getOperand(0).getValueType(),
9780 SDValue X = N0.getOperand(0).getOperand(0);
9780 SDValue X = N0.getOperand(0).getOperand(0);
9782 APInt Mask = cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue();
9811 isa<LoadSDNode>(N0.getOperand(0)) &&
9812 N0.getOperand(1).getOpcode() == ISD::Constant &&
9814 LoadSDNode *LN00 = cast<LoadSDNode>(N0.getOperand(0));
9822 auto *AndC = cast<ConstantSDNode>(N0.getOperand(1));
9830 DoXform = ExtendUsesToFormExtLoad(VT, N0.getNode(), N0.getOperand(0),
9837 APInt Mask = cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue();
9842 ExtendSetCCUses(SetCCs, N0.getOperand(0), ExtLoad, ISD::ZERO_EXTEND);
9881 EVT N00VT = N0.getOperand(0).getValueType();
9894 SDValue VSetCC = DAG.getNode(ISD::SETCC, DL, VT, N0.getOperand(0),
9895 N0.getOperand(1), N0.getOperand(2));
9895 N0.getOperand(1), N0.getOperand(2));
9904 DAG.getNode(ISD::SETCC, DL, MatchingVectorType, N0.getOperand(0),
9905 N0.getOperand(1), N0.getOperand(2));
9905 N0.getOperand(1), N0.getOperand(2));
9913 DL, N0.getOperand(0), N0.getOperand(1), DAG.getConstant(1, DL, VT),
9913 DL, N0.getOperand(0), N0.getOperand(1), DAG.getConstant(1, DL, VT),
9915 cast<CondCodeSDNode>(N0.getOperand(2))->get(), true))
9921 isa<ConstantSDNode>(N0.getOperand(1)) &&
9922 N0.getOperand(0).getOpcode() == ISD::ZERO_EXTEND &&
9924 SDValue ShAmt = N0.getOperand(1);
9926 SDValue InnerZExt = N0.getOperand(0);
9930 InnerZExt.getOperand(0).getValueSizeInBits();
9942 DAG.getNode(ISD::ZERO_EXTEND, DL, VT, N0.getOperand(0)),
9968 return DAG.getNode(N0.getOpcode(), SDLoc(N), VT, N0.getOperand(0));
9974 SDNode *oye = N0.getOperand(0).getNode();
9986 return DAG.getAnyExtOrTrunc(N0.getOperand(0), SDLoc(N), VT);
9991 N0.getOperand(0).getOpcode() == ISD::TRUNCATE &&
9992 N0.getOperand(1).getOpcode() == ISD::Constant &&
9993 !TLI.isTruncateFree(N0.getOperand(0).getOperand(0).getValueType(),
9993 !TLI.isTruncateFree(N0.getOperand(0).getOperand(0).getValueType(),
9996 SDValue X = N0.getOperand(0).getOperand(0);
9996 SDValue X = N0.getOperand(0).getOperand(0);
9998 APInt Mask = cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue();
10064 EVT N00VT = N0.getOperand(0).getValueType();
10074 return DAG.getSetCC(SDLoc(N), VT, N0.getOperand(0),
10075 N0.getOperand(1),
10076 cast<CondCodeSDNode>(N0.getOperand(2))->get());
10083 DAG.getSetCC(SDLoc(N), MatchingVectorType, N0.getOperand(0),
10084 N0.getOperand(1),
10085 cast<CondCodeSDNode>(N0.getOperand(2))->get());
10092 DL, N0.getOperand(0), N0.getOperand(1), DAG.getConstant(1, DL, VT),
10092 DL, N0.getOperand(0), N0.getOperand(1), DAG.getConstant(1, DL, VT),
10094 cast<CondCodeSDNode>(N0.getOperand(2))->get(), true))
10112 AssertVT == cast<VTSDNode>(N0.getOperand(1))->getVT())
10116 N0.getOperand(0).getOpcode() == Opcode) {
10122 SDValue BigA = N0.getOperand(0);
10123 EVT BigA_AssertVT = cast<VTSDNode>(BigA.getOperand(1))->getVT();
10132 BigA.getOperand(0), MinAssertVTVal);
10140 N0.getOperand(0).getOpcode() == ISD::AssertSext &&
10142 SDValue BigA = N0.getOperand(0);
10143 EVT BigA_AssertVT = cast<VTSDNode>(BigA.getOperand(1))->getVT();
10151 BigA.getOperand(0), N1);
10191 auto *LN0 = dyn_cast<LoadSDNode>(N0.getOperand(0));
10192 auto *N01 = dyn_cast<ConstantSDNode>(N0.getOperand(1));
10227 if (auto *ConstShift = dyn_cast<ConstantSDNode>(SRL.getOperand(1))) {
10232 N0 = N0.getOperand(0);
10279 if (ConstantSDNode *N01 = dyn_cast<ConstantSDNode>(N0.getOperand(1))) {
10281 N0 = N0.getOperand(0);
10307 EVT PtrType = N0.getOperand(1).getValueType();
10392 EVT.bitsLT(cast<VTSDNode>(N0.getOperand(1))->getVT()))
10394 N0.getOperand(0), N1);
10401 SDValue N00 = N0.getOperand(0);
10413 N0.getOperand(0).getScalarValueSizeInBits() == EVTBits) {
10417 N0.getOperand(0));
10423 SDValue N00 = N0.getOperand(0);
10447 if (auto *ShAmt = dyn_cast<ConstantSDNode>(N0.getOperand(1)))
10451 unsigned InSignBits = DAG.ComputeNumSignBits(N0.getOperand(0));
10453 return DAG.getNode(ISD::SRA, SDLoc(N), VT, N0.getOperand(0),
10454 N0.getOperand(1));
10496 if (SDValue BSwap = MatchBSwapHWordLow(N0.getNode(), N0.getOperand(0),
10497 N0.getOperand(1), false))
10549 return DAG.getNode(ISD::TRUNCATE, SDLoc(N), VT, N0.getOperand(0));
10563 if (N0.getOperand(0).getValueType().bitsLT(VT))
10564 return DAG.getNode(N0.getOpcode(), SDLoc(N), VT, N0.getOperand(0));
10566 if (N0.getOperand(0).getValueType().bitsGT(VT))
10567 return DAG.getNode(ISD::TRUNCATE, SDLoc(N), VT, N0.getOperand(0));
10570 return N0.getOperand(0);
10589 EVT VecTy = N0.getOperand(0).getValueType();
10607 DAG.getBitcast(NVT, N0.getOperand(0)),
10617 SDValue Cond = N0.getOperand(0);
10618 SDValue TruncOp0 = DAG.getNode(ISD::TRUNCATE, SL, VT, N0.getOperand(1));
10619 SDValue TruncOp1 = DAG.getNode(ISD::TRUNCATE, SL, VT, N0.getOperand(2));
10628 SDValue Amt = N0.getOperand(1);
10635 SDValue Trunc = DAG.getNode(ISD::TRUNCATE, SL, VT, N0.getOperand(0));
10663 N0.getOperand(0).getOpcode() == ISD::BUILD_VECTOR &&
10664 N0.getOperand(0).hasOneUse()) {
10665 SDValue BuildVect = N0.getOperand(0);
10681 Opnds.push_back(BuildVect.getOperand(i));
10730 SDValue X = N0.getOperand(i);
10768 SDValue VecSrc = N0.getOperand(0);
10796 auto X = DAG.getNode(ISD::TRUNCATE, SL, VT, N0.getOperand(0));
10797 auto Y = DAG.getNode(ISD::TRUNCATE, SL, VT, N0.getOperand(1));
10799 return DAG.getNode(N0.getOpcode(), SL, VTs, X, Y, N0.getOperand(2));
10807 SDValue N00 = N0.getOperand(0);
10811 if (N00.getOperand(0)->getValueType(0).getVectorElementType() ==
10814 N00.getOperand(0), N0.getOperand(1));
10814 N00.getOperand(0), N0.getOperand(1));
10833 (isConstantOrConstantVector(N0.getOperand(0), true) ||
10834 isConstantOrConstantVector(N0.getOperand(1), true))) {
10840 SDValue NarrowL = DAG.getNode(ISD::TRUNCATE, DL, VT, N0.getOperand(0));
10841 SDValue NarrowR = DAG.getNode(ISD::TRUNCATE, DL, VT, N0.getOperand(1));
10854 return Elt.getOperand(Elt.getResNo()).getNode();
10935 SDValue LogicOp0 = N0.getOperand(0);
10936 ConstantSDNode *LogicOp1 = isConstOrConstSplat(N0.getOperand(1), true);
10939 LogicOp0.getOperand(0).getValueType() == VT) {
10940 SDValue FPOp = DAG.getNode(FPOpcode, SDLoc(N), VT, LogicOp0.getOperand(0));
10990 return DAG.getBitcast(VT, N0.getOperand(0));
11037 SDValue NewConv = DAG.getBitcast(VT, N0.getOperand(0));
11085 isa<ConstantFPSDNode>(N0.getOperand(0)) &&
11087 unsigned OrigXWidth = N0.getOperand(1).getValueSizeInBits();
11090 SDValue X = DAG.getBitcast(IntXVT, N0.getOperand(1));
11113 SDValue Cst = DAG.getBitcast(VT, N0.getOperand(0));
11115 SDValue X = DAG.getBitcast(VT, N0.getOperand(1));
11138 SDValue Cst = DAG.getBitcast(VT, N0.getOperand(0));
11166 Op.getOperand(0).getValueType() == VT)
11167 return SDValue(Op.getOperand(0));
11377 N0.getOperand(0), N0.getOperand(1), N1, Flags);
11377 N0.getOperand(0), N0.getOperand(1), N1, Flags);
11384 N1.getOperand(0), N1.getOperand(1), N0, Flags);
11384 N1.getOperand(0), N1.getOperand(1), N0, Flags);
11391 SDValue N00 = N0.getOperand(0);
11396 N00.getOperand(0)),
11398 N00.getOperand(1)), N1, Flags);
11405 SDValue N10 = N1.getOperand(0);
11410 N10.getOperand(0)),
11412 N10.getOperand(1)), N0, Flags);
11421 N0.getOperand(2).getOpcode() == ISD::FMUL &&
11422 N0->hasOneUse() && N0.getOperand(2)->hasOneUse()) {
11424 N0.getOperand(0), N0.getOperand(1),
11424 N0.getOperand(0), N0.getOperand(1),
11426 N0.getOperand(2).getOperand(0),
11426 N0.getOperand(2).getOperand(0),
11427 N0.getOperand(2).getOperand(1),
11427 N0.getOperand(2).getOperand(1),
11434 N1.getOperand(2).getOpcode() == ISD::FMUL &&
11435 N1->hasOneUse() && N1.getOperand(2)->hasOneUse()) {
11437 N1.getOperand(0), N1.getOperand(1),
11437 N1.getOperand(0), N1.getOperand(1),
11439 N1.getOperand(2).getOperand(0),
11439 N1.getOperand(2).getOperand(0),
11440 N1.getOperand(2).getOperand(1),
11440 N1.getOperand(2).getOperand(1),
11457 SDValue N02 = N0.getOperand(2);
11459 SDValue N020 = N02.getOperand(0);
11462 return FoldFAddFMAFPExtFMul(N0.getOperand(0), N0.getOperand(1),
11462 return FoldFAddFMAFPExtFMul(N0.getOperand(0), N0.getOperand(1),
11463 N020.getOperand(0), N020.getOperand(1),
11463 N020.getOperand(0), N020.getOperand(1),
11486 SDValue N00 = N0.getOperand(0);
11488 SDValue N002 = N00.getOperand(2);
11491 return FoldFAddFPExtFMAFMul(N00.getOperand(0), N00.getOperand(1),
11491 return FoldFAddFPExtFMAFMul(N00.getOperand(0), N00.getOperand(1),
11492 N002.getOperand(0), N002.getOperand(1),
11492 N002.getOperand(0), N002.getOperand(1),
11501 SDValue N12 = N1.getOperand(2);
11503 SDValue N120 = N12.getOperand(0);
11506 return FoldFAddFMAFPExtFMul(N1.getOperand(0), N1.getOperand(1),
11506 return FoldFAddFMAFPExtFMul(N1.getOperand(0), N1.getOperand(1),
11507 N120.getOperand(0), N120.getOperand(1),
11507 N120.getOperand(0), N120.getOperand(1),
11519 SDValue N10 = N1.getOperand(0);
11521 SDValue N102 = N10.getOperand(2);
11524 return FoldFAddFPExtFMAFMul(N10.getOperand(0), N10.getOperand(1),
11524 return FoldFAddFPExtFMAFMul(N10.getOperand(0), N10.getOperand(1),
11525 N102.getOperand(0), N102.getOperand(1),
11525 N102.getOperand(0), N102.getOperand(1),
11583 N0.getOperand(0), N0.getOperand(1),
11583 N0.getOperand(0), N0.getOperand(1),
11592 N1.getOperand(0)),
11593 N1.getOperand(1), N0, Flags);
11597 if (N0.getOpcode() == ISD::FNEG && isContractableFMUL(N0.getOperand(0)) &&
11598 (Aggressive || (N0->hasOneUse() && N0.getOperand(0).hasOneUse()))) {
11599 SDValue N00 = N0.getOperand(0).getOperand(0);
11599 SDValue N00 = N0.getOperand(0).getOperand(0);
11600 SDValue N01 = N0.getOperand(0).getOperand(1);
11600 SDValue N01 = N0.getOperand(0).getOperand(1);
11611 SDValue N00 = N0.getOperand(0);
11616 N00.getOperand(0)),
11618 N00.getOperand(1)),
11627 SDValue N10 = N1.getOperand(0);
11633 N10.getOperand(0))),
11635 N10.getOperand(1)),
11647 SDValue N00 = N0.getOperand(0);
11649 SDValue N000 = N00.getOperand(0);
11655 N000.getOperand(0)),
11657 N000.getOperand(1)),
11670 SDValue N00 = N0.getOperand(0);
11672 SDValue N000 = N00.getOperand(0);
11678 N000.getOperand(0)),
11680 N000.getOperand(1)),
11691 isContractableFMUL(N0.getOperand(2)) && N0->hasOneUse() &&
11692 N0.getOperand(2)->hasOneUse()) {
11694 N0.getOperand(0), N0.getOperand(1),
11694 N0.getOperand(0), N0.getOperand(1),
11696 N0.getOperand(2).getOperand(0),
11696 N0.getOperand(2).getOperand(0),
11697 N0.getOperand(2).getOperand(1),
11697 N0.getOperand(2).getOperand(1),
11705 isContractableFMUL(N1.getOperand(2))) {
11706 SDValue N20 = N1.getOperand(2).getOperand(0);
11706 SDValue N20 = N1.getOperand(2).getOperand(0);
11707 SDValue N21 = N1.getOperand(2).getOperand(1);
11707 SDValue N21 = N1.getOperand(2).getOperand(1);
11710 N1.getOperand(0)),
11711 N1.getOperand(1),
11721 SDValue N02 = N0.getOperand(2);
11723 SDValue N020 = N02.getOperand(0);
11727 N0.getOperand(0), N0.getOperand(1),
11727 N0.getOperand(0), N0.getOperand(1),
11730 N020.getOperand(0)),
11732 N020.getOperand(1)),
11746 SDValue N00 = N0.getOperand(0);
11748 SDValue N002 = N00.getOperand(2);
11753 N00.getOperand(0)),
11755 N00.getOperand(1)),
11758 N002.getOperand(0)),
11760 N002.getOperand(1)),
11770 N1.getOperand(2).getOpcode() == ISD::FP_EXTEND) {
11771 SDValue N120 = N1.getOperand(2).getOperand(0);
11771 SDValue N120 = N1.getOperand(2).getOperand(0);
11774 SDValue N1200 = N120.getOperand(0);
11775 SDValue N1201 = N120.getOperand(1);
11777 DAG.getNode(ISD::FNEG, SL, VT, N1.getOperand(0)),
11778 N1.getOperand(1),
11796 N1.getOperand(0).getOpcode() == PreferredFusedOpcode) {
11797 SDValue CvtSrc = N1.getOperand(0);
11798 SDValue N100 = CvtSrc.getOperand(0);
11799 SDValue N101 = CvtSrc.getOperand(1);
11800 SDValue N102 = CvtSrc.getOperand(2);
11803 SDValue N1020 = N102.getOperand(0);
11804 SDValue N1021 = N102.getOperand(1);
11866 if (auto *C = isConstOrConstSplatFP(X.getOperand(1), true)) {
11868 return DAG.getNode(PreferredFusedOpcode, SL, VT, X.getOperand(0), Y,
11871 return DAG.getNode(PreferredFusedOpcode, SL, VT, X.getOperand(0), Y,
11889 if (auto *C0 = isConstOrConstSplatFP(X.getOperand(0), true)) {
11892 DAG.getNode(ISD::FNEG, SL, VT, X.getOperand(1)), Y,
11896 DAG.getNode(ISD::FNEG, SL, VT, X.getOperand(1)), Y,
11899 if (auto *C1 = isConstOrConstSplatFP(X.getOperand(1), true)) {
11901 return DAG.getNode(PreferredFusedOpcode, SL, VT, X.getOperand(0), Y,
11904 return DAG.getNode(PreferredFusedOpcode, SL, VT, X.getOperand(0), Y,
11968 auto *C = isConstOrConstSplatFP(FMul.getOperand(1), true);
11974 SDValue B = N0.getOperand(0);
11980 SDValue B = N1.getOperand(0);
11992 if (N0.getOpcode() == ISD::FNEG && N0.getOperand(0) == N1)
11996 if (N1.getOpcode() == ISD::FNEG && N1.getOperand(0) == N0)
12008 isConstantFPBuildVectorOrConstantFP(N0.getOperand(1))) {
12009 SDValue NewC = DAG.getNode(ISD::FADD, DL, VT, N0.getOperand(1), N1, Flags);
12010 return DAG.getNode(ISD::FADD, DL, VT, N0.getOperand(0), NewC, Flags);
12018 bool CFP00 = isConstantFPBuildVectorOrConstantFP(N0.getOperand(0));
12019 bool CFP01 = isConstantFPBuildVectorOrConstantFP(N0.getOperand(1));
12022 if (CFP01 && !CFP00 && N0.getOperand(0) == N1) {
12023 SDValue NewCFP = DAG.getNode(ISD::FADD, DL, VT, N0.getOperand(1),
12030 N1.getOperand(0) == N1.getOperand(1) &&
12030 N1.getOperand(0) == N1.getOperand(1) &&
12031 N0.getOperand(0) == N1.getOperand(0)) {
12031 N0.getOperand(0) == N1.getOperand(0)) {
12032 SDValue NewCFP = DAG.getNode(ISD::FADD, DL, VT, N0.getOperand(1),
12034 return DAG.getNode(ISD::FMUL, DL, VT, N0.getOperand(0), NewCFP, Flags);
12039 bool CFP10 = isConstantFPBuildVectorOrConstantFP(N1.getOperand(0));
12040 bool CFP11 = isConstantFPBuildVectorOrConstantFP(N1.getOperand(1));
12043 if (CFP11 && !CFP10 && N1.getOperand(0) == N0) {
12044 SDValue NewCFP = DAG.getNode(ISD::FADD, DL, VT, N1.getOperand(1),
12051 N0.getOperand(0) == N0.getOperand(1) &&
12051 N0.getOperand(0) == N0.getOperand(1) &&
12052 N1.getOperand(0) == N0.getOperand(0)) {
12052 N1.getOperand(0) == N0.getOperand(0)) {
12053 SDValue NewCFP = DAG.getNode(ISD::FADD, DL, VT, N1.getOperand(1),
12055 return DAG.getNode(ISD::FMUL, DL, VT, N1.getOperand(0), NewCFP, Flags);
12060 bool CFP00 = isConstantFPBuildVectorOrConstantFP(N0.getOperand(0));
12062 if (!CFP00 && N0.getOperand(0) == N0.getOperand(1) &&
12062 if (!CFP00 && N0.getOperand(0) == N0.getOperand(1) &&
12063 (N0.getOperand(0) == N1)) {
12070 bool CFP10 = isConstantFPBuildVectorOrConstantFP(N1.getOperand(0));
12072 if (!CFP10 && N1.getOperand(0) == N1.getOperand(1) &&
12072 if (!CFP10 && N1.getOperand(0) == N1.getOperand(1) &&
12073 N1.getOperand(0) == N0) {
12081 N0.getOperand(0) == N0.getOperand(1) &&
12081 N0.getOperand(0) == N0.getOperand(1) &&
12082 N1.getOperand(0) == N1.getOperand(1) &&
12082 N1.getOperand(0) == N1.getOperand(1) &&
12083 N0.getOperand(0) == N1.getOperand(0)) {
12083 N0.getOperand(0) == N1.getOperand(0)) {
12084 return DAG.getNode(ISD::FMUL, DL, VT, N0.getOperand(0),
12230 SDValue N00 = N0.getOperand(0);
12231 SDValue N01 = N0.getOperand(1);
12244 N0.getOperand(0) == N0.getOperand(1)) {
12244 N0.getOperand(0) == N0.getOperand(1)) {
12247 return DAG.getNode(ISD::FMUL, DL, VT, N0.getOperand(0), MulConsts, Flags);
12278 SDValue Cond = Select.getOperand(0);
12279 auto TrueOpnd = dyn_cast<ConstantFPSDNode>(Select.getOperand(1));
12280 auto FalseOpnd = dyn_cast<ConstantFPSDNode>(Select.getOperand(2));
12283 Cond.getOpcode() == ISD::SETCC && Cond.getOperand(0) == X &&
12284 isa<ConstantFPSDNode>(Cond.getOperand(1)) &&
12285 cast<ConstantFPSDNode>(Cond.getOperand(1))->isExactlyValue(0.0)) {
12286 ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
12373 if (N2.getOpcode() == ISD::FMUL && N0 == N2.getOperand(0) &&
12375 isConstantFPBuildVectorOrConstantFP(N2.getOperand(1))) {
12377 DAG.getNode(ISD::FADD, DL, VT, N1, N2.getOperand(1),
12384 isConstantFPBuildVectorOrConstantFP(N0.getOperand(1))) {
12386 N0.getOperand(0),
12387 DAG.getNode(ISD::FMUL, DL, VT, N1, N0.getOperand(1),
12413 return DAG.getNode(ISD::FMA, DL, VT, N0.getOperand(0),
12428 if (N1CFP && N2.getOpcode() == ISD::FNEG && N2.getOperand(0) == N0) {
12561 if (SDValue RV = buildRsqrtEstimate(N1.getOperand(0), Flags))
12564 N1.getOperand(0).getOpcode() == ISD::FSQRT) {
12565 if (SDValue RV = buildRsqrtEstimate(N1.getOperand(0).getOperand(0),
12565 if (SDValue RV = buildRsqrtEstimate(N1.getOperand(0).getOperand(0),
12572 N1.getOperand(0).getOpcode() == ISD::FSQRT) {
12573 if (SDValue RV = buildRsqrtEstimate(N1.getOperand(0).getOperand(0),
12573 if (SDValue RV = buildRsqrtEstimate(N1.getOperand(0).getOperand(0),
12575 RV = DAG.getNode(ISD::FP_ROUND, SDLoc(N1), VT, RV, N1.getOperand(1));
12584 if (N1.getOperand(0).getOpcode() == ISD::FSQRT) {
12585 SqrtOp = N1.getOperand(0);
12586 OtherOp = N1.getOperand(1);
12587 } else if (N1.getOperand(1).getOpcode() == ISD::FSQRT) {
12588 SqrtOp = N1.getOperand(1);
12589 OtherOp = N1.getOperand(0);
12594 if (SDValue RV = buildRsqrtEstimate(SqrtOp.getOperand(0), Flags)) {
12694 return DAG.getNode(ISD::FCOPYSIGN, SDLoc(N), VT, N0.getOperand(0), N1);
12702 return DAG.getNode(ISD::FCOPYSIGN, SDLoc(N), VT, N0, N1.getOperand(1));
12707 return DAG.getNode(ISD::FCOPYSIGN, SDLoc(N), VT, N0, N1.getOperand(0));
12813 N0.getOperand(0).getValueType() == VT)
12814 return DAG.getNode(ISD::FTRUNC, SDLoc(N), VT, N0.getOperand(0));
12817 N0.getOperand(0).getValueType() == VT)
12818 return DAG.getNode(ISD::FTRUNC, SDLoc(N), VT, N0.getOperand(0));
12857 { N0.getOperand(0), N0.getOperand(1),
12857 { N0.getOperand(0), N0.getOperand(1),
12859 N0.getOperand(2) };
12866 N0.getOperand(0).getOpcode() == ISD::SETCC &&!VT.isVector() &&
12871 { N0.getOperand(0).getOperand(0), N0.getOperand(0).getOperand(1),
12871 { N0.getOperand(0).getOperand(0), N0.getOperand(0).getOperand(1),
12871 { N0.getOperand(0).getOperand(0), N0.getOperand(0).getOperand(1),
12871 { N0.getOperand(0).getOperand(0), N0.getOperand(0).getOperand(1),
12873 N0.getOperand(0).getOperand(2) };
12873 N0.getOperand(0).getOperand(2) };
12917 { N0.getOperand(0), N0.getOperand(1),
12917 { N0.getOperand(0), N0.getOperand(1),
12919 N0.getOperand(2) };
12938 SDValue Src = N0.getOperand(0);
13013 if (N0.getOpcode() == ISD::FP_EXTEND && VT == N0.getOperand(0).getValueType())
13014 return N0.getOperand(0);
13028 if (N0.getOperand(0).getValueType() == MVT::f80 && VT == MVT::f16)
13038 return DAG.getNode(ISD::FP_ROUND, DL, VT, N0.getOperand(0),
13046 N0.getOperand(0), N1);
13049 Tmp, N0.getOperand(1));
13074 return DAG.getNode(ISD::FP16_TO_FP, SDLoc(N), VT, N0.getOperand(0));
13080 SDValue In = N0.getOperand(0);
13084 In, N0.getOperand(1));
13174 SDValue Int = N0.getOperand(0);
13198 ConstantFPSDNode *CFP1 = dyn_cast<ConstantFPSDNode>(N0.getOperand(1));
13206 ISD::FMUL, SDLoc(N), VT, N0.getOperand(0),
13207 DAG.getNode(ISD::FNEG, SDLoc(N), VT, N0.getOperand(1)),
13268 return DAG.getNode(ISD::FABS, SDLoc(N), VT, N0.getOperand(0));
13272 SDValue Int = N0.getOperand(0);
13311 N1.getOperand(0).getValueType())) {
13313 Chain, N1.getOperand(2),
13314 N1.getOperand(0), N1.getOperand(1), N2);
13314 N1.getOperand(0), N1.getOperand(1), N2);
13328 (N.getOperand(0).hasOneUse() &&
13329 N.getOperand(0).getOpcode() == ISD::SRL))) {
13332 N = N.getOperand(0);
13351 SDValue Op0 = N.getOperand(0);
13352 SDValue Op1 = N.getOperand(1);
13355 SDValue AndOp1 = Op0.getOperand(1);
13442 N->getOperand(0), Simp.getOperand(2),
13443 Simp.getOperand(0), Simp.getOperand(1),
13443 Simp.getOperand(0), Simp.getOperand(1),
14687 SliceInst = SliceInst.getOperand(0);
14860 MaskedLoad = CheckForMaskedLoad(Value.getOperand(0), Ptr, Chain);
14863 Value.getOperand(1), ST,this))
14867 MaskedLoad = CheckForMaskedLoad(Value.getOperand(1), Ptr, Chain);
14870 Value.getOperand(0), ST,this))
14875 Value.getOperand(1).getOpcode() != ISD::Constant)
14878 SDValue N0 = Value.getOperand(0);
14888 SDValue N1 = Value.getOperand(1);
15040 SDNode *MulVar = AddNode.getOperand(0).getNode();
15179 SDValue Vec = Val.getOperand(0);
15180 SDValue Idx = Val.getOperand(1);
16133 EVT SVT = Value.getOperand(0).getValueType();
16144 return DAG.getStore(Chain, SDLoc(N), Value.getOperand(0), Ptr,
16293 TLI.isTruncStoreLegal(Value.getOperand(0).getValueType(),
16295 return DAG.getTruncStore(Chain, SDLoc(N), Value.getOperand(0),
16354 Chains.push_back(Chain.getOperand(--Nops));
16361 Chains.push_back(Chain.getOperand(0));
16430 SDValue Op1 = Val.getOperand(0);
16431 SDValue Op2 = Val.getOperand(1);
16439 Hi = Op1.getOperand(0);
16445 ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op1.getOperand(1));
16452 !Lo.getOperand(0).getValueType().isScalarInteger() ||
16453 Lo.getOperand(0).getValueSizeInBits() > HalfValBitSize ||
16455 !Hi.getOperand(0).getValueType().isScalarInteger() ||
16456 Hi.getOperand(0).getValueSizeInBits() > HalfValBitSize)
16461 EVT LowTy = (Lo.getOperand(0).getOpcode() == ISD::BITCAST)
16462 ? Lo.getOperand(0).getValueType()
16464 EVT HighTy = (Hi.getOperand(0).getOpcode() == ISD::BITCAST)
16465 ? Hi.getOperand(0).getValueType()
16477 Lo = DAG.getNode(ISD::ZERO_EXTEND, DL, VT, Lo.getOperand(0));
16478 Hi = DAG.getNode(ISD::ZERO_EXTEND, DL, VT, Hi.getOperand(0));
16505 isa<ConstantSDNode>(InsertVal.getOperand(1))) {
16509 SDValue X = Vec.getOperand(0);
16510 SDValue Y = Vec.getOperand(1);
16516 if (InsertVal.getOperand(0) == X) {
16518 } else if (InsertVal.getOperand(0) == Y) {
16525 auto *ExtrIndex = cast<ConstantSDNode>(InsertVal.getOperand(1));
16544 !InsertVal.getOperand(0).getValueType().isVector())
16547 SDValue SubVec = InsertVal.getOperand(0);
16602 InVec == InVal.getOperand(0) && EltNo == InVal.getOperand(1))
16602 InVec == InVal.getOperand(0) && EltNo == InVal.getOperand(1))
16629 && isa<ConstantSDNode>(InVec.getOperand(2))) {
16634 InVec.getOperand(0), InVal, EltNo);
16637 VT, NewOp, InVec.getOperand(1), InVec.getOperand(2));
16637 VT, NewOp, InVec.getOperand(1), InVec.getOperand(2));
16778 SDValue Op0 = Vec.getOperand(0);
16779 SDValue Op1 = Vec.getOperand(1);
16808 Index == VecOp.getOperand(2)) {
16809 SDValue Elt = VecOp.getOperand(1);
16818 SDValue InOp = VecOp.getOperand(0);
16836 SDValue Elt = VecOp.getOperand(IndexC->getZExtValue());
16857 SDValue BCSrc = VecOp.getOperand(0);
16865 SDValue X = BCSrc.getOperand(0);
16905 SVInVec = VecOp.getOperand(0);
16907 SVInVec = VecOp.getOperand(1);
16912 SDValue InOp = SVInVec.getOperand(OrigElt);
16970 EVT BCVT = VecOp.getOperand(0).getValueType();
16975 VecOp = VecOp.getOperand(0);
17001 VecOp.getOperand(0).getValueType() == ExtVT &&
17002 ISD::isNormalLoad(VecOp.getOperand(0).getNode())) {
17007 LN0 = cast<LoadSDNode>(VecOp.getOperand(0));
17025 VecOp = (Idx < (int)NumElts) ? VecOp.getOperand(0) : VecOp.getOperand(1);
17025 VecOp = (Idx < (int)NumElts) ? VecOp.getOperand(0) : VecOp.getOperand(1);
17032 VecOp = VecOp.getOperand(0);
17091 EVT InTy = In.getOperand(0).getValueType();
17311 Zext.getOperand(0).getOpcode() != ISD::EXTRACT_VECTOR_ELT ||
17312 !isa<ConstantSDNode>(Zext.getOperand(0).getOperand(1)) ||
17312 !isa<ConstantSDNode>(Zext.getOperand(0).getOperand(1)) ||
17318 SDValue Extract = Zext.getOperand(0);
17322 Extract.getOperand(0).getValueSizeInBits() != VT.getSizeInBits())
17349 EVT VecVT = Extract.getOperand(0).getValueType();
17352 SDValue Shuf = TLI.buildLegalVectorShuffle(VecVT, DL, Extract.getOperand(0),
17408 !isa<ConstantSDNode>(Op.getOperand(1)))
17410 SDValue ExtractedFromVec = Op.getOperand(0);
17589 Op.getOperand(0).getOpcode() == ISD::EXTRACT_VECTOR_ELT &&
17590 Op0.getOperand(0).getOperand(0) == Op.getOperand(0).getOperand(0))
17590 Op0.getOperand(0).getOperand(0) == Op.getOperand(0).getOperand(0))
17590 Op0.getOperand(0).getOperand(0) == Op.getOperand(0).getOperand(0))
17590 Op0.getOperand(0).getOperand(0) == Op.getOperand(0).getOperand(0))
17591 if (auto *C = dyn_cast<ConstantSDNode>(Op.getOperand(0).getOperand(1)))
17591 if (auto *C = dyn_cast<ConstantSDNode>(Op.getOperand(0).getOperand(1)))
17603 SDValue In = Op0.getOperand(0).getOperand(0);
17603 SDValue In = Op0.getOperand(0).getOperand(0);
17619 Op0.getOperand(0).getOperand(1));
17619 Op0.getOperand(0).getOperand(1));
17669 (Op0.getOperand(0) == Op.getOperand(0)))
17669 (Op0.getOperand(0) == Op.getOperand(0)))
17670 if (auto CNode = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
17684 (Op0.getOperand(0).getValueType() == N->getValueType(0)))
17685 return Op0.getOperand(0);
17690 Op0.getOperand(0), Op0.getOperand(1));
17690 Op0.getOperand(0), Op0.getOperand(1));
17725 !Op.getOperand(0).getValueType().isVector())
17726 Ops.push_back(Op.getOperand(0));
17792 SDValue ExtVec = Op.getOperand(0);
17805 if (!isa<ConstantSDNode>(Op.getOperand(1)))
17875 if (SVT == Scalar.getOperand(0).getValueType())
17876 Scalar = Scalar.getOperand(0);
17929 EVT OpSVT = Op.getOperand(0).getValueType();
17950 DAG.getNode(ISD::TRUNCATE, SDLoc(N), MinVT, Op.getOperand(i)));
17988 if (Op.getOperand(0) != SingleSource)
17991 SingleSource = Op.getOperand(0);
18000 auto *CS = dyn_cast<ConstantSDNode>(Op.getOperand(1));
18021 V.getOperand(1).getValueType() == SubVT && V.getOperand(2) == Index) {
18021 V.getOperand(1).getValueType() == SubVT && V.getOperand(2) == Index) {
18022 return V.getOperand(1);
18026 V.getOperand(0).getValueType() == SubVT &&
18029 return V.getOperand(SubIdx);
18043 SDValue Bop0 = BinOp.getOperand(0), Bop1 = BinOp.getOperand(1);
18043 SDValue Bop0 = BinOp.getOperand(0), Bop1 = BinOp.getOperand(1);
18132 BinOp.getOperand(0), NewExtIndex);
18134 BinOp.getOperand(1), NewExtIndex);
18157 return V.getOperand(ConcatOpNum);
18160 SDValue SubVecL = GetSubVector(peekThroughBitcasts(BinOp.getOperand(0)));
18161 SDValue SubVecR = GetSubVector(peekThroughBitcasts(BinOp.getOperand(1)));
18173 BinOp.getOperand(0), IndexC);
18177 BinOp.getOperand(1), IndexC);
18238 V.hasOneUse() && isa<ConstantSDNode>(V.getOperand(1))) {
18239 if (TLI.isExtractSubvectorCheap(NVT, V.getOperand(0).getValueType(),
18242 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, SDLoc(N), NVT, V.getOperand(0),
18243 V.getOperand(1));
18250 V.getOperand(0).getValueType().isVector()) {
18251 SDValue SrcOp = V.getOperand(0);
18265 V.getOperand(0), NewIndex);
18279 V.getOperand(0).getValueType() == NVT) {
18329 EVT SmallVT = V.getOperand(1).getValueType();
18335 auto *InsIdx = dyn_cast<ConstantSDNode>(V.getOperand(2));
18344 return DAG.getBitcast(NVT, V.getOperand(1));
18347 DAG.getBitcast(N->getOperand(0).getValueType(), V.getOperand(0)),
18370 !N0.getOperand(1).isUndef() || !N1.getOperand(1).isUndef())
18370 !N0.getOperand(1).isUndef() || !N1.getOperand(1).isUndef())
18401 SDValue X = N0.getOperand(0), Y = N1.getOperand(0);
18401 SDValue X = N0.getOperand(0), Y = N1.getOperand(0);
18420 EVT ConcatVT = N0.getOperand(0).getValueType();
18432 N0 = DAG.getVectorShuffle(ConcatVT, SDLoc(N), N0.getOperand(0),
18433 N0.getOperand(1),
18465 Ops.push_back(N0.getOperand(OpIdx));
18467 Ops.push_back(N1.getOperand(OpIdx - N0.getNumOperands()));
18531 Op = S.getOperand(Idx);
18533 SDValue Op0 = S.getOperand(0);
18644 SDValue N00 = N0.getOperand(0);
18796 auto *InsIndexC = dyn_cast<ConstantSDNode>(Op0.getOperand(2));
18811 Op0.getOperand(2).getValueType());
18813 Op1, Op0.getOperand(1), NewInsIndex);
18905 SDValue L = N0.getOperand(0), R = N0.getOperand(1);
18905 SDValue L = N0.getOperand(0), R = N0.getOperand(1);
18987 N0.getOperand(0).getValueType() == N1.getOperand(0).getValueType()))) {
18987 N0.getOperand(0).getValueType() == N1.getOperand(0).getValueType()))) {
19255 N1.getOperand(1) == N2 && N1.getOperand(0).getValueType() == VT)
19255 N1.getOperand(1) == N2 && N1.getOperand(0).getValueType() == VT)
19256 return N1.getOperand(0);
19263 N1.getOperand(0).getOpcode() == ISD::EXTRACT_SUBVECTOR &&
19264 N1.getOperand(0).getOperand(1) == N2 &&
19264 N1.getOperand(0).getOperand(1) == N2 &&
19265 N1.getOperand(0).getOperand(0).getValueType().getVectorNumElements() ==
19265 N1.getOperand(0).getOperand(0).getValueType().getVectorNumElements() ==
19267 N1.getOperand(0).getOperand(0).getValueType().getSizeInBits() ==
19267 N1.getOperand(0).getOperand(0).getValueType().getSizeInBits() ==
19269 return DAG.getBitcast(VT, N1.getOperand(0).getOperand(0));
19269 return DAG.getBitcast(VT, N1.getOperand(0).getOperand(0));
19277 SDValue CN0 = N0.getOperand(0);
19278 SDValue CN1 = N1.getOperand(0);
19294 N0.getOperand(1).getValueType() == N1.getValueType() &&
19295 N0.getOperand(2) == N2)
19296 return DAG.getNode(ISD::INSERT_SUBVECTOR, SDLoc(N), VT, N0.getOperand(0),
19303 N1.getOperand(0).isUndef() && isNullConstant(N1.getOperand(2)))
19303 N1.getOperand(0).isUndef() && isNullConstant(N1.getOperand(2)))
19305 N1.getOperand(1), N2);
19354 N1.getValueType() == N0.getOperand(1).getValueType() &&
19355 isa<ConstantSDNode>(N0.getOperand(2))) {
19360 N0.getOperand(0), N1, N2);
19363 VT, NewOp, N0.getOperand(1), N0.getOperand(2));
19363 VT, NewOp, N0.getOperand(1), N0.getOperand(2));
19370 N0.getOperand(0).getValueType() == N1.getValueType()) {
19401 ConstantSDNode *AndConst = getAsNonOpaqueConstant(N0.getOperand(1));
19404 N0.getOperand(0));
19475 SDValue Elt = RHS.getOperand(EltIdx);
19608 LHS.getOperand(1).isUndef() && RHS.getOperand(1).isUndef() &&
19608 LHS.getOperand(1).isUndef() && RHS.getOperand(1).isUndef() &&
19611 SDValue NewBinOp = DAG.getNode(Opcode, DL, VT, LHS.getOperand(0),
19612 RHS.getOperand(0), N->getFlags());
19613 SDValue UndefV = LHS.getOperand(1);
19622 if (LHS.getOpcode() == ISD::INSERT_SUBVECTOR && LHS.getOperand(0).isUndef() &&
19623 RHS.getOpcode() == ISD::INSERT_SUBVECTOR && RHS.getOperand(0).isUndef() &&
19624 LHS.getOperand(2) == RHS.getOperand(2) &&
19624 LHS.getOperand(2) == RHS.getOperand(2) &&
19626 SDValue X = LHS.getOperand(1);
19627 SDValue Y = RHS.getOperand(1);
19628 SDValue Z = LHS.getOperand(2);
19658 EVT NarrowVT = LHS.getOperand(0).getValueType();
19659 if (NarrowVT == RHS.getOperand(0).getValueType() &&
19666 ConcatOps.push_back(DAG.getNode(Opcode, DL, NarrowVT, LHS.getOperand(i),
19667 RHS.getOperand(i)));
19684 SDValue SCC = SimplifySelectCC(DL, N0.getOperand(0), N0.getOperand(1), N1, N2,
19684 SDValue SCC = SimplifySelectCC(DL, N0.getOperand(0), N0.getOperand(1), N1, N2,
19685 cast<CondCodeSDNode>(N0.getOperand(2))->get());
19697 SCC.getOperand(0), SCC.getOperand(1),
19697 SCC.getOperand(0), SCC.getOperand(1),
19698 SCC.getOperand(4), Flags);
19701 SCC.getOperand(2), SCC.getOperand(3));
19701 SCC.getOperand(2), SCC.getOperand(3));
19736 CC = cast<CondCodeSDNode>(Cmp.getOperand(2))->get();
19737 CmpLHS = Cmp.getOperand(0);
19738 Zero = isConstOrConstSplatFP(Cmp.getOperand(1));
19742 Sqrt.getOperand(0) == CmpLHS && (CC == ISD::SETOLT ||
19768 if (LHS.getOperand(0) != RHS.getOperand(0) ||
19768 if (LHS.getOperand(0) != RHS.getOperand(0) ||
20159 N0 == Count.getOperand(0) &&
20166 N0 == Count.getOperand(0) &&
20632 C = C.getOperand(0);
20641 C = C.getOperand(0);
20650 C = C.getOperand(0);
20692 Chains.push_back(Chain.getOperand(--n));
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp 1279 SDValue Vec = Op.getOperand(0);
1280 SDValue Idx = Op.getOperand(1);
1361 SDValue Vec = Op.getOperand(0);
1362 SDValue Part = Op.getOperand(1);
1363 SDValue Idx = Op.getOperand(2);
1589 SDValue Chain = Tmp1.getOperand(0);
1595 SDValue Size = Tmp2.getOperand(1);
3426 Tmp1 = DAG.getSelectCC(dl, Tmp1.getOperand(0), Tmp1.getOperand(1),
3426 Tmp1 = DAG.getSelectCC(dl, Tmp1.getOperand(0), Tmp1.getOperand(1),
3428 cast<CondCodeSDNode>(Tmp1.getOperand(2))->get());
3486 Tmp1, Tmp2.getOperand(2),
3487 Tmp2.getOperand(0), Tmp2.getOperand(1),
3487 Tmp2.getOperand(0), Tmp2.getOperand(1),
3493 isa<ConstantSDNode>(Tmp2.getOperand(1)) &&
3494 cast<ConstantSDNode>(Tmp2.getOperand(1))->getZExtValue() == 1))
lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp 528 EVT CondLHSVT = Cond.getOperand(0).getValueType();
lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp 547 if (Op.getOperand(j).getValueType().isVector())
548 if (Op.getOperand(j)
553 Operands[j] = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Op.getOperand(j));
555 Operands[j] = DAG.getNode(ISD::BITCAST, dl, NVT, Op.getOperand(j));
557 Operands[j] = Op.getOperand(j);
572 MVT VT = Op.getOperand(0).getSimpleValueType();
583 if (Op.getOperand(j).getValueType().isVector())
584 Operands[j] = DAG.getNode(Opc, dl, NVT, Op.getOperand(j));
586 Operands[j] = Op.getOperand(j);
610 SDValue Promoted = DAG.getNode(NewOpc, dl, NVT, Op.getOperand(0));
749 NewChain = Scalarized.getOperand(1);
750 Value = Scalarized.getOperand(0);
894 SDValue Mask = Op.getOperand(0);
895 SDValue Op1 = Op.getOperand(1);
896 SDValue Op2 = Op.getOperand(2);
957 Op = Op.getOperand(0);
968 SDValue Src = Op.getOperand(0);
1003 SDValue Src = Op.getOperand(0);
1028 SDValue Src = Op.getOperand(0);
1084 Op = DAG.getNode(ISD::BITCAST, DL, ByteVT, Op.getOperand(0));
1112 Op = DAG.getNode(ISD::BITCAST, DL, ByteVT, Op.getOperand(0));
1137 SDValue Mask = Op.getOperand(0);
1138 SDValue Op1 = Op.getOperand(1);
1139 SDValue Op2 = Op.getOperand(2);
1204 EVT VT = Op.getOperand(0).getValueType();
1233 SDValue HI = DAG.getNode(ISD::SRL, DL, VT, Op.getOperand(0), HalfWord);
1234 SDValue LO = DAG.getNode(ISD::AND, DL, VT, Op.getOperand(0), HalfWordMask);
1253 Zero, Op.getOperand(0));
1375 SDValue Chain = Op.getOperand(0);
1390 SDValue Oper = Op.getOperand(j);
1419 SDValue LHS = Op.getOperand(0), RHS = Op.getOperand(1), CC = Op.getOperand(2);
1419 SDValue LHS = Op.getOperand(0), RHS = Op.getOperand(1), CC = Op.getOperand(2);
1419 SDValue LHS = Op.getOperand(0), RHS = Op.getOperand(1), CC = Op.getOperand(2);
lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp 535 SDValue Arg = N->getOperand(2).getOperand(0);
3817 N = N.getOperand(0);
3822 N = N.getOperand(0);
3826 N = N.getOperand(0);
3828 N = N.getOperand(0);
3831 return isSETCCorConvertedSETCC(N.getOperand(0)) &&
3832 isSETCCorConvertedSETCC(N.getOperand(1));
3961 EVT MaskVT = getSetCCResultType(Cond.getOperand(0).getValueType());
3969 EVT VT0 = getSetCCResultType(SETCC0.getOperand(0).getValueType());
3970 EVT VT1 = getSetCCResultType(SETCC1.getOperand(0).getValueType());
lib/CodeGen/SelectionDAG/SelectionDAG.cpp 281 if (AllowUndefs && Op.getOperand(i).isUndef()) {
287 auto *Cst = dyn_cast<ConstantSDNode>(Op.getOperand(i));
313 SDValue LHSOp = LHS.getOperand(i);
314 SDValue RHSOp = RHS.getOperand(i);
2163 if (auto *RHSC = dyn_cast<ConstantSDNode>(V.getOperand(1))) {
2172 GetDemandedBits(V.getOperand(0), SrcDemandedBits))
2174 V.getOperand(1));
2180 if (ConstantSDNode *RHSC = isConstOrConstSplat(V.getOperand(1))) {
2183 DemandedBits.isSubsetOf(computeKnownBits(V.getOperand(0)).Zero |
2185 return V.getOperand(0);
2190 SDValue Src = V.getOperand(0);
2258 SDValue Op = V.getOperand(i);
2291 SDValue Src = V.getOperand(0);
2292 ConstantSDNode *SubIdx = dyn_cast<ConstantSDNode>(V.getOperand(1));
2310 SDValue LHS = V.getOperand(0);
2311 SDValue RHS = V.getOperand(1);
2366 return V.getOperand(Idx / NumElts);
2386 if (ConstantSDNode *SA = isConstOrConstSplat(V.getOperand(1))) {
2399 auto *BV = dyn_cast<BuildVectorSDNode>(V.getOperand(1));
2472 SDValue SrcOp = Op.getOperand(i);
2519 SDValue LHS = Op.getOperand(0);
2528 SDValue RHS = Op.getOperand(1);
2538 EVT SubVectorVT = Op.getOperand(0).getValueType();
2545 SDValue Sub = Op.getOperand(i);
2559 SDValue Src = Op.getOperand(0);
2560 SDValue Sub = Op.getOperand(1);
2561 ConstantSDNode *SubIdx = dyn_cast<ConstantSDNode>(Op.getOperand(2));
2593 SDValue Src = Op.getOperand(0);
2594 ConstantSDNode *SubIdx = dyn_cast<ConstantSDNode>(Op.getOperand(1));
2611 SDValue N0 = Op.getOperand(0);
2619 SDValue N0 = Op.getOperand(0);
2689 Known = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
2690 Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
2698 Known = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
2699 Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
2707 Known = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
2708 Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
2718 Known = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
2719 Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
2740 Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
2743 Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
2753 Known = computeKnownBits(Op.getOperand(2), DemandedElts, Depth+1);
2757 Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth+1);
2764 Known = computeKnownBits(Op.getOperand(3), DemandedElts, Depth+1);
2768 Known2 = computeKnownBits(Op.getOperand(2), DemandedElts, Depth+1);
2790 if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
2797 Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
2807 Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
2820 Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
2829 if (ConstantSDNode *C = isConstOrConstSplat(Op.getOperand(2), DemandedElts)) {
2835 Known = computeKnownBits(Op.getOperand(Opcode == ISD::FSHL ? 0 : 1),
2842 Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
2843 Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
2860 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
2876 Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
2896 Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
2905 Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
2913 Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
2984 EVT InVT = Op.getOperand(0).getValueType();
2986 Known = computeKnownBits(Op.getOperand(0), InDemandedElts, Depth + 1);
2991 Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
2996 EVT InVT = Op.getOperand(0).getValueType();
2998 Known = computeKnownBits(Op.getOperand(0), InDemandedElts, Depth + 1);
3005 Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
3012 Known = computeKnownBits(Op.getOperand(0), Depth+1);
3017 Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
3022 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
3024 Known = computeKnownBits(Op.getOperand(0), Depth+1);
3037 if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
3046 Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
3047 Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
3057 if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
3084 Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
3085 Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
3090 if (ConstantSDNode *Rem = isConstOrConstSplat(Op.getOperand(1))) {
3094 Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
3114 if (ConstantSDNode *Rem = isConstOrConstSplat(Op.getOperand(1))) {
3118 Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
3129 Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
3130 Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
3139 Known = computeKnownBits(Op.getOperand(0), Depth+1);
3152 SDValue InVec = Op.getOperand(0);
3153 SDValue EltNo = Op.getOperand(1);
3176 SDValue InVec = Op.getOperand(0);
3177 SDValue InVal = Op.getOperand(1);
3178 SDValue EltNo = Op.getOperand(2);
3212 Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
3218 Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
3224 Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
3243 Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
3244 Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
3257 Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
3258 Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
3276 if ((CstLow = isConstOrConstSplat(Op.getOperand(1), DemandedElts)))
3277 if (Op.getOperand(0).getOpcode() == (IsMax ? ISD::SMIN : ISD::SMAX))
3279 isConstOrConstSplat(Op.getOperand(0).getOperand(1), DemandedElts);
3279 isConstOrConstSplat(Op.getOperand(0).getOperand(1), DemandedElts);
3302 Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
3304 Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
3372 auto *C = isConstOrConstSplat(Val.getOperand(0));
3380 auto *C = isConstOrConstSplat(Val.getOperand(0));
3434 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
3437 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
3446 SDValue SrcOp = Op.getOperand(i);
3447 Tmp2 = ComputeNumSignBits(Op.getOperand(i), Depth + 1);
3481 Tmp = ComputeNumSignBits(Op.getOperand(0), DemandedLHS, Depth + 1);
3483 Tmp2 = ComputeNumSignBits(Op.getOperand(1), DemandedRHS, Depth + 1);
3494 SDValue N0 = Op.getOperand(0);
3540 Tmp = VTBits - Op.getOperand(0).getScalarValueSizeInBits();
3541 return ComputeNumSignBits(Op.getOperand(0), DemandedElts, Depth+1) + Tmp;
3544 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarSizeInBits();
3546 Tmp2 = ComputeNumSignBits(Op.getOperand(0), DemandedElts, Depth+1);
3549 SDValue Src = Op.getOperand(0);
3557 Tmp = ComputeNumSignBits(Op.getOperand(0), DemandedElts, Depth+1);
3560 isConstOrConstSplat(Op.getOperand(1), DemandedElts)) {
3568 isConstOrConstSplat(Op.getOperand(1), DemandedElts)) {
3570 Tmp = ComputeNumSignBits(Op.getOperand(0), DemandedElts, Depth+1);
3580 Tmp = ComputeNumSignBits(Op.getOperand(0), DemandedElts, Depth+1);
3582 Tmp2 = ComputeNumSignBits(Op.getOperand(1), DemandedElts, Depth+1);
3592 Tmp = ComputeNumSignBits(Op.getOperand(1), DemandedElts, Depth+1);
3594 Tmp2 = ComputeNumSignBits(Op.getOperand(2), DemandedElts, Depth+1);
3597 Tmp = ComputeNumSignBits(Op.getOperand(2), DemandedElts, Depth+1);
3599 Tmp2 = ComputeNumSignBits(Op.getOperand(3), DemandedElts, Depth+1);
3608 if ((CstLow = isConstOrConstSplat(Op.getOperand(1), DemandedElts)))
3609 if (Op.getOperand(0).getOpcode() == (IsMax ? ISD::SMIN : ISD::SMAX))
3611 isConstOrConstSplat(Op.getOperand(0).getOperand(1), DemandedElts);
3611 isConstOrConstSplat(Op.getOperand(0).getOperand(1), DemandedElts);
3623 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth + 1);
3626 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth + 1);
3631 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth + 1);
3634 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth + 1);
3654 if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
3660 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
3669 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
3677 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
3681 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
3683 KnownBits Known = computeKnownBits(Op.getOperand(0), Depth+1);
3696 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
3701 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
3705 if (ConstantSDNode *CLHS = isConstOrConstSplat(Op.getOperand(0)))
3707 KnownBits Known = computeKnownBits(Op.getOperand(1), Depth+1);
3723 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
3728 unsigned SignBitsOp0 = ComputeNumSignBits(Op.getOperand(0), Depth + 1);
3731 unsigned SignBitsOp1 = ComputeNumSignBits(Op.getOperand(1), Depth + 1);
3740 unsigned NumSrcBits = Op.getOperand(0).getScalarValueSizeInBits();
3741 unsigned NumSrcSignBits = ComputeNumSignBits(Op.getOperand(0), Depth + 1);
3747 const int KnownSign = ComputeNumSignBits(Op.getOperand(0), Depth+1);
3749 const int Items = Op.getOperand(0).getValueSizeInBits() / BitWidth;
3760 SDValue InVec = Op.getOperand(0);
3761 SDValue InVal = Op.getOperand(1);
3762 SDValue EltNo = Op.getOperand(2);
3797 SDValue InVec = Op.getOperand(0);
3798 SDValue EltNo = Op.getOperand(1);
3801 const unsigned EltBitWidth = Op.getOperand(0).getScalarValueSizeInBits();
3823 SDValue Src = Op.getOperand(0);
3824 ConstantSDNode *SubIdx = dyn_cast<ConstantSDNode>(Op.getOperand(1));
3838 EVT SubVectorVT = Op.getOperand(0).getValueType();
3846 Tmp2 = ComputeNumSignBits(Op.getOperand(i), DemandedSub, Depth + 1);
3855 SDValue Src = Op.getOperand(0);
3856 SDValue Sub = Op.getOperand(1);
3857 auto *SubIdx = dyn_cast<ConstantSDNode>(Op.getOperand(2));
3970 !isa<ConstantSDNode>(Op.getOperand(1)))
3974 !MaskedValueIsZero(Op.getOperand(0), Op.getConstantOperandAPInt(1)))
4020 return isKnownNeverNaN(Op.getOperand(0), SNaN, Depth + 1);
4025 return isKnownNeverNaN(Op.getOperand(0), SNaN, Depth + 1);
4028 return isKnownNeverNaN(Op.getOperand(1), SNaN, Depth + 1) &&
4029 isKnownNeverNaN(Op.getOperand(2), SNaN, Depth + 1);
4034 return isKnownNeverNaN(Op.getOperand(0), SNaN, Depth + 1);
4043 return isKnownNeverNaN(Op.getOperand(0), SNaN, Depth + 1) &&
4044 isKnownNeverNaN(Op.getOperand(1), SNaN, Depth + 1) &&
4045 isKnownNeverNaN(Op.getOperand(2), SNaN, Depth + 1);
4062 return isKnownNeverNaN(Op.getOperand(0), SNaN, Depth + 1) ||
4063 isKnownNeverNaN(Op.getOperand(1), SNaN, Depth + 1);
4071 return (isKnownNeverNaN(Op.getOperand(0), false, Depth + 1) &&
4072 isKnownNeverSNaN(Op.getOperand(1), Depth + 1)) ||
4073 (isKnownNeverNaN(Op.getOperand(1), false, Depth + 1) &&
4074 isKnownNeverSNaN(Op.getOperand(0), Depth + 1));
4079 return isKnownNeverNaN(Op.getOperand(0), SNaN, Depth + 1) &&
4080 isKnownNeverNaN(Op.getOperand(1), SNaN, Depth + 1);
4083 return isKnownNeverNaN(Op.getOperand(0), SNaN, Depth + 1);
4121 if (isKnownNeverZero(Op.getOperand(1)) ||
4122 isKnownNeverZero(Op.getOperand(0)))
4168 Ops[i].getOperand(0).getValueType() != VT ||
4169 (IdentitySrc && Ops[i].getOperand(0) != IdentitySrc) ||
4170 !isa<ConstantSDNode>(Ops[i].getOperand(1)) ||
4171 cast<ConstantSDNode>(Ops[i].getOperand(1))->getAPIntValue() != i) {
4175 IdentitySrc = Ops[i].getOperand(0);
4214 Op.getOperand(0).getValueType() != VT ||
4215 (IdentitySrc && Op.getOperand(0) != IdentitySrc) ||
4216 !isa<ConstantSDNode>(Op.getOperand(1)) ||
4221 assert((!IdentitySrc || IdentitySrc == Op.getOperand(0)) &&
4223 IdentitySrc = Op.getOperand(0);
4510 return getNode(OpOpcode, DL, VT, Operand.getOperand(0));
4529 return getNode(ISD::ZERO_EXTEND, DL, VT, Operand.getOperand(0));
4551 return getNode(OpOpcode, DL, VT, Operand.getOperand(0));
4557 SDValue OpOp = Operand.getOperand(0);
4578 return getNode(ISD::TRUNCATE, DL, VT, Operand.getOperand(0));
4582 if (Operand.getOperand(0).getValueType().getScalarType()
4584 return getNode(OpOpcode, DL, VT, Operand.getOperand(0));
4585 if (Operand.getOperand(0).getValueType().bitsGT(VT))
4586 return getNode(ISD::TRUNCATE, DL, VT, Operand.getOperand(0));
4587 return Operand.getOperand(0);
4628 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
4643 isa<ConstantSDNode>(Operand.getOperand(1)) &&
4645 Operand.getOperand(0).getValueType() == VT)
4646 return Operand.getOperand(0);
4656 return getNode(ISD::FSUB, DL, VT, Operand.getOperand(1),
4657 Operand.getOperand(0), Flags);
4659 return Operand.getOperand(0);
4663 return getNode(ISD::FABS, DL, VT, Operand.getOperand(0));
5213 llvm::EVT OpVT = N1.getOperand(0).getValueType();
5215 SDValue Op = N1.getOperand(i);
5247 N1.getOperand(0).getValueType().getVectorNumElements();
5249 N1.getOperand(N2C->getZExtValue() / Factor),
5257 SDValue Elt = N1.getOperand(N2C->getZExtValue());
5274 SDValue N1Op2 = N1.getOperand(2);
5279 if (VT == N1.getOperand(1).getValueType())
5280 return N1.getOperand(1);
5282 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
5285 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
5294 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0),
5295 N1.getOperand(1));
5309 return N1.getOperand(N2C->getZExtValue());
5347 VT == N1.getOperand(0).getValueType()) {
5349 return N1.getOperand(N2C->getZExtValue() / Factor);
5354 if (N1.getOpcode() == ISD::INSERT_SUBVECTOR && N2 == N1.getOperand(2) &&
5355 VT == N1.getOperand(1).getValueType())
5356 return N1.getOperand(1);
5550 N2.getOperand(1) == N3 && N2.getOperand(0).getValueType() == VT)
5550 N2.getOperand(1) == N3 && N2.getOperand(0).getValueType() == VT)
5551 return N2.getOperand(0);
5724 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
5725 Src.getOperand(1).getOpcode() == ISD::Constant) {
5726 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
5727 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
6668 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
6669 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
6672 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6675 Offset + cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
8692 V = V.getOperand(0);
8697 while (V.getOpcode() == ISD::BITCAST && V.getOperand(0).hasOneUse())
8698 V = V.getOperand(0);
8704 V = V.getOperand(0);
8711 V = peekThroughBitcasts(V.getOperand(1));
9082 SDValue Op0 = Op.getOperand(0);
9083 SDValue Op1 = Op.getOperand(1);
9278 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
9280 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp 2581 MVT::Other, GuardVal.getOperand(0),
5396 SDValue Op = N.getOperand(1);
5405 getUnderlyingArgRegs(Regs, N.getOperand(0));
9372 cast<RegisterSDNode>(Op.getOperand(1))->getReg() != Reg) &&
9860 dyn_cast<LoadSDNode>(Res.getOperand(LowAddressOp).getNode()))
9868 Res = Res.getOperand(0);
9872 unsigned Reg = cast<RegisterSDNode>(Res.getOperand(1))->getReg();
9884 unsigned Reg = cast<RegisterSDNode>(Res.getOperand(1))->getReg();
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp 2479 return ::CheckSame(MatcherTable, MatcherIndex, N.getOperand(ChildNo),
2521 return ::CheckType(MatcherTable, MatcherIndex, N.getOperand(ChildNo), TLI,
2537 return ::CheckCondCode(MatcherTable, MatcherIndex, N.getOperand(2));
2567 return ::CheckInteger(MatcherTable, MatcherIndex, N.getOperand(ChildNo));
2580 return C && SDISel.CheckAndMask(N.getOperand(0), C, Val);
2593 return C && SDISel.CheckOrMask(N.getOperand(0), C, Val);
2980 N = N.getOperand(ChildNo);
2992 N = N.getOperand(ChildNo);
lib/CodeGen/SelectionDAG/TargetLowering.cpp 484 auto *Op1C = dyn_cast<ConstantSDNode>(Op.getOperand(1));
496 SDValue NewOp = TLO.DAG.getNode(Opcode, DL, VT, Op.getOperand(0), NewC);
544 DAG.getNode(ISD::TRUNCATE, dl, SmallVT, Op.getOperand(0)),
545 DAG.getNode(ISD::TRUNCATE, dl, SmallVT, Op.getOperand(1)));
603 SDValue Src = peekThroughBitcasts(Op.getOperand(0));
659 LHSKnown = DAG.computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
660 RHSKnown = DAG.computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
666 return Op.getOperand(0);
668 return Op.getOperand(1);
672 LHSKnown = DAG.computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
673 RHSKnown = DAG.computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
679 return Op.getOperand(0);
681 return Op.getOperand(1);
685 LHSKnown = DAG.computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
686 RHSKnown = DAG.computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
691 return Op.getOperand(0);
693 return Op.getOperand(1);
698 EVT ExVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
700 return Op.getOperand(0);
705 SDValue Vec = Op.getOperand(0);
706 auto *CIdx = dyn_cast<ConstantSDNode>(Op.getOperand(2));
731 return Op.getOperand(0);
733 return Op.getOperand(1);
815 SDValue Src = Op.getOperand(0);
837 SDValue Vec = Op.getOperand(0);
838 SDValue Scl = Op.getOperand(1);
839 auto *CIdx = dyn_cast<ConstantSDNode>(Op.getOperand(2));
875 SDValue Base = Op.getOperand(0);
876 SDValue Sub = Op.getOperand(1);
884 if (isa<ConstantSDNode>(Op.getOperand(2))) {
915 SDValue Src = Op.getOperand(0);
916 ConstantSDNode *SubIdx = dyn_cast<ConstantSDNode>(Op.getOperand(1));
931 EVT SubVT = Op.getOperand(0).getValueType();
937 if (SimplifyDemandedBits(Op.getOperand(i), DemandedBits, DemandedSubElts,
973 SDValue Op0 = Op.getOperand(0);
974 SDValue Op1 = Op.getOperand(1);
1008 SDValue Op0 = Op.getOperand(0);
1009 SDValue Op1 = Op.getOperand(1);
1035 SDValue Xor = TLO.DAG.getNode(ISD::XOR, dl, VT, Op0.getOperand(0), Op1);
1086 SDValue Op0 = Op.getOperand(0);
1087 SDValue Op1 = Op.getOperand(1);
1132 SDValue Op0 = Op.getOperand(0);
1133 SDValue Op1 = Op.getOperand(1);
1210 if (SimplifyDemandedBits(Op.getOperand(2), DemandedBits, Known, TLO,
1213 if (SimplifyDemandedBits(Op.getOperand(1), DemandedBits, Known2, TLO,
1228 if (SimplifyDemandedBits(Op.getOperand(3), DemandedBits, Known, TLO,
1231 if (SimplifyDemandedBits(Op.getOperand(2), DemandedBits, Known2, TLO,
1246 SDValue Op0 = Op.getOperand(0);
1247 SDValue Op1 = Op.getOperand(1);
1248 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get();
1274 SDValue Op0 = Op.getOperand(0);
1275 SDValue Op1 = Op.getOperand(1);
1293 isConstOrConstSplat(Op0.getOperand(1), DemandedElts)) {
1305 Op, TLO.DAG.getNode(Opc, dl, VT, Op0.getOperand(0), NewSA));
1324 SDValue InnerOp = Op0.getOperand(0);
1346 isConstOrConstSplat(InnerOp.getOperand(1))) {
1355 InnerOp.getOperand(0));
1371 SDValue Op0 = Op.getOperand(0);
1372 SDValue Op1 = Op.getOperand(1);
1397 isConstOrConstSplat(Op0.getOperand(1), DemandedElts)) {
1411 Op, TLO.DAG.getNode(Opc, dl, VT, Op0.getOperand(0), NewSA));
1430 SDValue Op0 = Op.getOperand(0);
1431 SDValue Op1 = Op.getOperand(1);
1494 SDValue Op0 = Op.getOperand(0);
1495 SDValue Op1 = Op.getOperand(1);
1496 SDValue Op2 = Op.getOperand(2);
1532 SDValue Src = Op.getOperand(0);
1542 SDValue Op0 = Op.getOperand(0);
1543 EVT ExVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1599 EVT HalfVT = Op.getOperand(0).getValueType();
1607 if (SimplifyDemandedBits(Op.getOperand(0), MaskLo, KnownLo, TLO, Depth + 1))
1610 if (SimplifyDemandedBits(Op.getOperand(1), MaskHi, KnownHi, TLO, Depth + 1))
1622 SDValue Src = Op.getOperand(0);
1655 SDValue Src = Op.getOperand(0);
1703 SDValue Src = Op.getOperand(0);
1727 SDValue Src = Op.getOperand(0);
1756 auto *ShAmt = dyn_cast<ConstantSDNode>(Src.getOperand(1));
1760 SDValue Shift = Src.getOperand(1);
1775 TLO.DAG.getNode(ISD::TRUNCATE, dl, VT, Src.getOperand(0));
1789 EVT ZVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1791 if (SimplifyDemandedBits(Op.getOperand(0), ~InMask | DemandedBits, Known,
1800 SDValue Src = Op.getOperand(0);
1801 SDValue Idx = Op.getOperand(1);
1827 SDValue Src = Op.getOperand(0);
1923 SDValue Op0 = Op.getOperand(0), Op1 = Op.getOperand(1);
1923 SDValue Op0 = Op.getOperand(0), Op1 = Op.getOperand(1);
2074 SDValue C0 = getUndefOrConstantElt(BO.getOperand(0), i, UndefOp0);
2075 SDValue C1 = getUndefOrConstantElt(BO.getOperand(1), i, UndefOp1);
2129 SDValue Src = Op.getOperand(0);
2218 [&](SDValue Elt) { return Op.getOperand(0) != Elt; })) {
2233 SDValue SrcOp = Op.getOperand(i);
2244 EVT SubVT = Op.getOperand(0).getValueType();
2248 SDValue SubOp = Op.getOperand(i);
2260 if (!isa<ConstantSDNode>(Op.getOperand(2)))
2262 SDValue Base = Op.getOperand(0);
2263 SDValue Sub = Op.getOperand(1);
2283 Op.getOperand(1),
2284 Op.getOperand(2)));
2294 SDValue Src = Op.getOperand(0);
2295 ConstantSDNode *SubIdx = dyn_cast<ConstantSDNode>(Op.getOperand(1));
2311 SDValue Vec = Op.getOperand(0);
2312 SDValue Scl = Op.getOperand(1);
2313 auto *CIdx = dyn_cast<ConstantSDNode>(Op.getOperand(2));
2353 if (SimplifyDemandedVectorElts(Op.getOperand(0), DemandedElts, UnusedUndef,
2362 if (SimplifyDemandedVectorElts(Op.getOperand(1), DemandedLHS, UndefLHS,
2365 if (SimplifyDemandedVectorElts(Op.getOperand(2), DemandedRHS, UndefRHS,
2393 if (SimplifyDemandedVectorElts(Op.getOperand(0), DemandedLHS, UndefLHS,
2396 if (SimplifyDemandedVectorElts(Op.getOperand(1), DemandedRHS, UndefRHS,
2421 buildLegalVectorShuffle(VT, DL, Op.getOperand(0), Op.getOperand(1),
2421 buildLegalVectorShuffle(VT, DL, Op.getOperand(0), Op.getOperand(1),
2450 SDValue Src = Op.getOperand(0);
2487 if (SimplifyDemandedVectorElts(Op.getOperand(1), DemandedElts, UndefRHS,
2491 if (SimplifyDemandedVectorElts(Op.getOperand(0), DemandedElts, UndefLHS,
2505 if (SimplifyDemandedVectorElts(Op.getOperand(1), DemandedElts, UndefRHS,
2509 if (SimplifyDemandedVectorElts(Op.getOperand(0), DemandedElts, UndefLHS,
2520 if (SimplifyDemandedVectorElts(Op.getOperand(1), DemandedElts, SrcUndef,
2523 if (SimplifyDemandedVectorElts(Op.getOperand(0), DemandedElts, KnownUndef,
2539 if (SimplifyDemandedVectorElts(Op.getOperand(0), DemandedElts, KnownUndef,
2794 if (N0.getOperand(0) == N1) {
2795 X = N0.getOperand(1);
2796 Y = N0.getOperand(0);
2797 } else if (N0.getOperand(1) == N1) {
2798 X = N0.getOperand(0);
2799 Y = N0.getOperand(1);
2968 C = V.getOperand(0);
2973 Y = V.getOperand(1);
2985 X = N0.getOperand(0);
2986 SDValue Mask = N0.getOperand(1);
3021 SDValue X = N0.getOperand(0);
3022 SDValue Y = N0.getOperand(1);
3087 N0.getOperand(0).getOpcode() == ISD::CTLZ &&
3088 N0.getOperand(1).getOpcode() == ISD::Constant) {
3102 return DAG.getSetCC(dl, VT, N0.getOperand(0).getOperand(0),
3102 return DAG.getSetCC(dl, VT, N0.getOperand(0).getOperand(0),
3110 CTPOP = N0.getOperand(0);
3116 SDValue CTOp = CTPOP.getOperand(0);
3225 cast<CondCodeSDNode>(TopSetCC.getOperand(2))->get(),
3226 TopSetCC.getOperand(0).getValueType().isInteger());
3227 return DAG.getSetCC(dl, VT, TopSetCC.getOperand(0),
3228 TopSetCC.getOperand(1),
3241 isa<LoadSDNode>(N0.getOperand(0)) &&
3242 N0.getOperand(0).getNode()->hasOneUse() &&
3243 isa<ConstantSDNode>(N0.getOperand(1))) {
3244 LoadSDNode *Lod = cast<LoadSDNode>(N0.getOperand(0));
3295 unsigned InSize = N0.getOperand(0).getValueSizeInBits();
3331 EVT newVT = N0.getOperand(0).getValueType();
3339 SDValue NewSetCC = DAG.getSetCC(dl, NewSetCCVT, N0.getOperand(0),
3350 EVT ExtSrcTy = cast<VTSDNode>(N0.getOperand(1))->getVT();
3361 EVT Op0Ty = N0.getOperand(0).getValueType();
3363 ZextOp = N0.getOperand(0);
3366 ZextOp = DAG.getNode(ISD::AND, dl, Op0Ty, N0.getOperand(0),
3384 getBooleanContents(N0.getOperand(0).getValueType()) ==
3390 ISD::CondCode CC = cast<CondCodeSDNode>(N0.getOperand(2))->get();
3392 N0.getOperand(0).getValueType().isInteger());
3394 isCondCodeLegal(CC, N0.getOperand(0).getSimpleValueType()))
3395 return DAG.getSetCC(dl, VT, N0.getOperand(0), N0.getOperand(1), CC);
3395 return DAG.getSetCC(dl, VT, N0.getOperand(0), N0.getOperand(1), CC);
3400 N0.getOperand(0).getOpcode() == ISD::XOR &&
3401 N0.getOperand(1) == N0.getOperand(0).getOperand(1))) &&
3401 N0.getOperand(1) == N0.getOperand(0).getOperand(1))) &&
3401 N0.getOperand(1) == N0.getOperand(0).getOperand(1))) &&
3402 isa<ConstantSDNode>(N0.getOperand(1)) &&
3403 cast<ConstantSDNode>(N0.getOperand(1))->isOne()) {
3413 Val = N0.getOperand(0);
3416 N0.getOperand(0).getOpcode() == ISD::XOR);
3419 N0.getOperand(0).getOperand(0),
3419 N0.getOperand(0).getOperand(0),
3420 N0.getOperand(1));
3432 Op0 = Op0.getOperand(0);
3435 Op0.getOperand(0).getOpcode() == ISD::SETCC &&
3436 Op0.getOperand(1).getOpcode() == ISD::SETCC) {
3439 return DAG.getSetCC(dl, VT, Op0.getOperand(0), Op0.getOperand(1),
3439 return DAG.getSetCC(dl, VT, Op0.getOperand(0), Op0.getOperand(1),
3443 isa<ConstantSDNode>(Op0.getOperand(1)) &&
3444 cast<ConstantSDNode>(Op0.getOperand(1))->isOne()) {
3448 DAG.getNode(ISD::TRUNCATE, dl, VT, Op0.getOperand(0)),
3452 DAG.getNode(ISD::ANY_EXTEND, dl, VT, Op0.getOperand(0)),
3460 cast<VTSDNode>(Op0.getOperand(1))->getVT() == MVT::i1)
3473 KnownBits XKnown = DAG.computeKnownBits(N0.getOperand(0));
3474 KnownBits YKnown = DAG.computeKnownBits(N0.getOperand(1));
3476 return DAG.getSetCC(dl, VT, N0.getOperand(0), N1, Cond);
3618 if (auto *AndRHS = dyn_cast<ConstantSDNode>(N0.getOperand(1))) {
3648 if (auto *AndRHS = dyn_cast<ConstantSDNode>(N0.getOperand(1))) {
3656 SDValue Shift = DAG.getNode(ISD::SRL, dl, CmpTy, N0.getOperand(0),
3713 return DAG.getSetCC(dl, VT, N0.getOperand(0), NegN1, SwapCond);
3782 if (N0.getOperand(0) == N1.getOperand(0))
3782 if (N0.getOperand(0) == N1.getOperand(0))
3783 return DAG.getSetCC(dl, VT, N0.getOperand(1), N1.getOperand(1), Cond);
3783 return DAG.getSetCC(dl, VT, N0.getOperand(1), N1.getOperand(1), Cond);
3784 if (N0.getOperand(1) == N1.getOperand(1))
3784 if (N0.getOperand(1) == N1.getOperand(1))
3785 return DAG.getSetCC(dl, VT, N0.getOperand(0), N1.getOperand(0), Cond);
3785 return DAG.getSetCC(dl, VT, N0.getOperand(0), N1.getOperand(0), Cond);
3788 if (N0.getOperand(0) == N1.getOperand(1))
3788 if (N0.getOperand(0) == N1.getOperand(1))
3789 return DAG.getSetCC(dl, VT, N0.getOperand(1), N1.getOperand(0),
3789 return DAG.getSetCC(dl, VT, N0.getOperand(1), N1.getOperand(0),
3791 if (N0.getOperand(1) == N1.getOperand(0))
3791 if (N0.getOperand(1) == N1.getOperand(0))
3792 return DAG.getSetCC(dl, VT, N0.getOperand(0), N1.getOperand(1),
3792 return DAG.getSetCC(dl, VT, N0.getOperand(0), N1.getOperand(1),
3802 if (auto *LHSR = dyn_cast<ConstantSDNode>(N0.getOperand(1))) {
3805 return DAG.getSetCC(dl, VT, N0.getOperand(0),
3815 if (DAG.MaskedValueIsZero(N0.getOperand(0), ~LHSR->getAPIntValue()))
3817 DAG.getSetCC(dl, VT, N0.getOperand(0),
3825 if (auto *SUBC = dyn_cast<ConstantSDNode>(N0.getOperand(0))) {
3828 DAG.getSetCC(dl, VT, N0.getOperand(1),
4096 if ((C = dyn_cast<ConstantSDNode>(Op.getOperand(0))))
4097 Op = Op.getOperand(1);
4100 (C = dyn_cast<ConstantSDNode>(Op.getOperand(1))))
4101 Op = Op.getOperand(0);
5009 SDValue N = REMNode.getOperand(0);
5010 SDValue D = REMNode.getOperand(1);
5212 SDValue N = REMNode.getOperand(0);
5213 SDValue D = REMNode.getOperand(1);
5333 if (!isa<ConstantSDNode>(Op.getOperand(0))) {
5354 isFPExtFree(VT, Op.getOperand(0).getValueType())))
5398 if (char V = isNegatibleForFree(Op.getOperand(0), DAG, LegalOperations,
5402 return isNegatibleForFree(Op.getOperand(1), DAG, LegalOperations,
5415 if (char V = isNegatibleForFree(Op.getOperand(0), DAG, LegalOperations,
5420 if (auto *C = isConstOrConstSplatFP(Op.getOperand(1)))
5424 return isNegatibleForFree(Op.getOperand(1), DAG, LegalOperations,
5434 char V2 = isNegatibleForFree(Op.getOperand(2), DAG, LegalOperations,
5440 char V0 = isNegatibleForFree(Op.getOperand(0), DAG, LegalOperations,
5442 char V1 = isNegatibleForFree(Op.getOperand(1), DAG, LegalOperations,
5451 return isNegatibleForFree(Op.getOperand(0), DAG, LegalOperations,
5464 return Op.getOperand(0);
5495 if (isNegatibleForFree(Op.getOperand(0), DAG, LegalOperations, ForCodeSize,
5498 getNegatedExpression(Op.getOperand(0), DAG,
5501 Op.getOperand(1), Flags);
5504 getNegatedExpression(Op.getOperand(1), DAG,
5507 Op.getOperand(0), Flags);
5511 isConstOrConstSplatFP(Op.getOperand(0), /*AllowUndefs*/ true))
5513 return Op.getOperand(1);
5517 Op.getOperand(1), Op.getOperand(0), Flags);
5517 Op.getOperand(1), Op.getOperand(0), Flags);
5522 if (isNegatibleForFree(Op.getOperand(0), DAG, LegalOperations, ForCodeSize,
5525 getNegatedExpression(Op.getOperand(0), DAG,
5528 Op.getOperand(1), Flags);
5532 Op.getOpcode(), SDLoc(Op), Op.getValueType(), Op.getOperand(0),
5533 getNegatedExpression(Op.getOperand(1), DAG, LegalOperations,
5543 SDValue Neg2 = getNegatedExpression(Op.getOperand(2), DAG, LegalOperations,
5546 char V0 = isNegatibleForFree(Op.getOperand(0), DAG, LegalOperations,
5548 char V1 = isNegatibleForFree(Op.getOperand(1), DAG, LegalOperations,
5553 Op.getOperand(0), DAG, LegalOperations, ForCodeSize, Depth + 1);
5555 Op.getOperand(1), Neg2, Flags);
5559 SDValue Neg1 = getNegatedExpression(Op.getOperand(1), DAG, LegalOperations,
5562 Op.getOperand(0), Neg1, Neg2, Flags);
5568 getNegatedExpression(Op.getOperand(0), DAG,
5573 getNegatedExpression(Op.getOperand(0), DAG,
5576 Op.getOperand(1));
6479 return std::make_pair(Scalarized.getOperand(0), Scalarized.getOperand(1));
6479 return std::make_pair(Scalarized.getOperand(0), Scalarized.getOperand(1));
6862 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get();
6864 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
6866 EVT VT = Op.getOperand(0).getValueType();
6867 SDValue Zext = Op.getOperand(0);
6870 Zext = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Op.getOperand(0));
7285 BottomHalf = Ret.getOperand(0);
7286 TopHalf = Ret.getOperand(1);
7288 BottomHalf = Ret.getOperand(1);
7289 TopHalf = Ret.getOperand(0);
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 379 auto *CSD = dyn_cast<ConstantSDNode>(V.getOperand(1));
410 const SDValue LHS = V.getOperand(0);
411 const SDValue RHS = V.getOperand(1);
435 if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
440 Reg = N.getOperand(0);
456 SrcVT = cast<VTSDNode>(N.getOperand(1))->getVT();
458 SrcVT = N.getOperand(0).getValueType();
471 EVT SrcVT = N.getOperand(0).getValueType();
482 ConstantSDNode *CSD = dyn_cast<ConstantSDNode>(N.getOperand(1));
512 SDValue EV = SV.getOperand(1);
517 ConstantSDNode *EVidx = cast<ConstantSDNode>(EV.getOperand(1).getNode());
519 LaneOp = EV.getOperand(0);
550 !checkV64LaneV128(Op1.getOperand(0), Op1.getOperand(1), MLAOp1, MLAOp2,
550 !checkV64LaneV128(Op1.getOperand(0), Op1.getOperand(1), MLAOp1, MLAOp2,
554 !checkV64LaneV128(Op1.getOperand(0), Op1.getOperand(1), MLAOp1, MLAOp2,
554 !checkV64LaneV128(Op1.getOperand(0), Op1.getOperand(1), MLAOp1, MLAOp2,
655 ConstantSDNode *CSD = dyn_cast<ConstantSDNode>(N.getOperand(1));
662 Ext = getExtendTypeForNode(N.getOperand(0));
666 Reg = N.getOperand(0).getOperand(0);
666 Reg = N.getOperand(0).getOperand(0);
672 Reg = N.getOperand(0);
733 if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
741 Base = N.getOperand(0);
756 Base = N.getOperand(0);
793 dyn_cast<GlobalAddressSDNode>(N.getOperand(1).getNode());
794 Base = N.getOperand(0);
795 OffImm = N.getOperand(1);
812 if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
816 Base = N.getOperand(0);
851 if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
858 Base = N.getOperand(0);
888 ConstantSDNode *CSD = dyn_cast<ConstantSDNode>(N.getOperand(1));
895 getExtendTypeForNode(N.getOperand(0), true);
899 Offset = narrowIfNeeded(CurDAG, N.getOperand(0).getOperand(0));
899 Offset = narrowIfNeeded(CurDAG, N.getOperand(0).getOperand(0));
903 Offset = N.getOperand(0);
922 SDValue LHS = N.getOperand(0);
923 SDValue RHS = N.getOperand(1);
968 Offset = narrowIfNeeded(CurDAG, LHS.getOperand(0));
980 Offset = narrowIfNeeded(CurDAG, RHS.getOperand(0));
1011 SDValue LHS = N.getOperand(0);
1012 SDValue RHS = N.getOperand(1);
1402 EVT WideVT = RegSeq.getOperand(1)->getValueType(0);
1454 EVT WideVT = RegSeq.getOperand(1)->getValueType(0);
1578 Opd0 = Widen(CurDAG, Op0->getOperand(0).getOperand(0));
1586 Opd0 = Op0->getOperand(0).getOperand(0);
1653 Opd0 = Op.getOperand(0);
1683 Opd0 = N->getOperand(0).getOperand(0);
1727 Opd0 = N->getOperand(0).getOperand(0);
1734 Opd0 = N->getOperand(0).getOperand(0);
1787 SDValue Opd0 = Widen(CurDAG, Op.getOperand(0));
1902 cast<const ConstantSDNode>(Op.getOperand(1).getNode())->getZExtValue();
1938 cast<const ConstantSDNode>(Op.getOperand(1).getNode())->getZExtValue();
1940 cast<const ConstantSDNode>(Op.getOperand(2).getNode())->getZExtValue();
1948 cast<const ConstantSDNode>(Op.getOperand(2).getNode())->getZExtValue();
1976 cast<const ConstantSDNode>(Op.getOperand(2).getNode())->getZExtValue();
1978 cast<const ConstantSDNode>(Op.getOperand(3).getNode())->getZExtValue();
1997 if (Op.getOperand(1) == Orig) {
2003 if (Op.getOperand(0) == Orig)
2015 if (Op.getOperand(1) == Orig) {
2021 if (Op.getOperand(0) == Orig)
2153 Op = Op.getOperand(0);
2164 Op = Op.getOperand(0);
2273 SDValue Ops[] = {And.getOperand(0), SDValue(MOVI, 0),
lib/Target/AArch64/AArch64ISelLowering.cpp 994 New = TLO.DAG.getNode(Op.getOpcode(), DL, VT, Op.getOperand(0),
1002 TLO.DAG.getMachineNode(NewOpc, DL, VT, Op.getOperand(0), EncConst), 0);
1043 ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1));
1092 unsigned IntNo = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
1102 MVT VT = Op.getOperand(1).getValueType().getSimpleVT();
1598 return Op.getOpcode() == ISD::SUB && isNullConstant(Op.getOperand(0)) &&
1627 RHS = RHS.getOperand(1);
1632 LHS = LHS.getOperand(1);
1639 RHS = LHS.getOperand(1);
1640 LHS = LHS.getOperand(0);
1717 SDValue SubOp0 = RHS.getOperand(0);
1721 RHS = RHS.getOperand(1);
1942 if (ConstantSDNode *MaskCst = dyn_cast<ConstantSDNode>(V.getOperand(1))) {
1958 if (ConstantSDNode *ShiftCst = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1960 if (isSupportedExtend(Op.getOperand(0)))
2040 SDValue TheLHS = isCMN(LHS, CC) ? LHS.getOperand(1) : LHS;
2107 SDValue LHS = Op.getOperand(0);
2108 SDValue RHS = Op.getOperand(1);
2233 SDValue Sel = Op.getOperand(0);
2234 SDValue Other = Op.getOperand(1);
2271 ISD::CondCode CC = cast<CondCodeSDNode>(Sel.getOperand(4))->get();
2272 SDValue LHS = Sel.getOperand(0);
2273 SDValue RHS = Sel.getOperand(1);
2274 SDValue TVal = Sel.getOperand(2);
2275 SDValue FVal = Sel.getOperand(3);
2343 return DAG.getNode(Opc, SDLoc(Op), VTs, Op.getOperand(0), Op.getOperand(1));
2343 return DAG.getNode(Opc, SDLoc(Op), VTs, Op.getOperand(0), Op.getOperand(1));
2344 return DAG.getNode(Opc, SDLoc(Op), VTs, Op.getOperand(0), Op.getOperand(1),
2344 return DAG.getNode(Opc, SDLoc(Op), VTs, Op.getOperand(0), Op.getOperand(1),
2345 Op.getOperand(2));
2381 unsigned IsWrite = cast<ConstantSDNode>(Op.getOperand(2))->getZExtValue();
2382 unsigned Locality = cast<ConstantSDNode>(Op.getOperand(3))->getZExtValue();
2383 unsigned IsData = cast<ConstantSDNode>(Op.getOperand(4))->getZExtValue();
2401 return DAG.getNode(AArch64ISD::PREFETCH, DL, MVT::Other, Op.getOperand(0),
2402 DAG.getConstant(PrfOp, DL, MVT::i32), Op.getOperand(1));
2410 LC = RTLIB::getFPEXT(Op.getOperand(0).getValueType(), Op.getValueType());
2417 if (Op.getOperand(0).getValueType() != MVT::f128) {
2423 LC = RTLIB::getFPROUND(Op.getOperand(0).getValueType(), Op.getValueType());
2428 SDValue SrcVal = Op.getOperand(0);
2439 EVT InVT = Op.getOperand(0).getValueType();
2450 DAG.getNode(ISD::FP_EXTEND, dl, NewVT, Op.getOperand(0)));
2457 Op.getOperand(0));
2466 SDValue Ext = DAG.getNode(ISD::FP_EXTEND, dl, ExtVT, Op.getOperand(0));
2476 if (Op.getOperand(0).getValueType().isVector())
2480 if (Op.getOperand(0).getValueType() == MVT::f16 &&
2485 DAG.getNode(ISD::FP_EXTEND, dl, MVT::f32, Op.getOperand(0)));
2488 if (Op.getOperand(0).getValueType() != MVT::f128) {
2495 LC = RTLIB::getFPTOSINT(Op.getOperand(0).getValueType(), Op.getValueType());
2497 LC = RTLIB::getFPTOUINT(Op.getOperand(0).getValueType(), Op.getValueType());
2510 SDValue In = Op.getOperand(0);
2543 DAG.getNode(Op.getOpcode(), dl, MVT::f32, Op.getOperand(0)),
2548 if (Op.getOperand(0).getValueType() == MVT::i128)
2558 LC = RTLIB::getSINTTOFP(Op.getOperand(0).getValueType(), Op.getValueType());
2560 LC = RTLIB::getUINTTOFP(Op.getOperand(0).getValueType(), Op.getValueType());
2570 SDValue Arg = Op.getOperand(0);
2603 assert(Op.getOperand(0).getValueType() == MVT::i16);
2606 Op = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i32, Op.getOperand(0));
2756 SDNode *N0 = Op.getOperand(0).getNode();
2757 SDNode *N1 = Op.getOperand(1).getNode();
2821 unsigned IntNo = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
2833 Op.getOperand(1));
2837 return DAG.getNode(ISD::ABS, dl, Ty, Op.getOperand(1));
2844 Op.getOperand(1), Op.getOperand(2));
2844 Op.getOperand(1), Op.getOperand(2));
2847 Op.getOperand(1), Op.getOperand(2));
2847 Op.getOperand(1), Op.getOperand(2));
2850 Op.getOperand(1), Op.getOperand(2));
2850 Op.getOperand(1), Op.getOperand(2));
2853 Op.getOperand(1), Op.getOperand(2));
2853 Op.getOperand(1), Op.getOperand(2));
2857 Op.getOperand(1));
2860 Op.getOperand(1));
2863 Op.getOperand(1));
2866 Op.getOperand(1));
2880 SDValue FnOp = Op.getOperand(1);
2881 SDValue IncomingFPOp = Op.getOperand(2);
4677 SDValue Chain = Op.getOperand(0);
4678 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get();
4679 SDValue LHS = Op.getOperand(2);
4680 SDValue RHS = Op.getOperand(3);
4681 SDValue Dest = Op.getOperand(4);
4740 isa<ConstantSDNode>(LHS.getOperand(1)) &&
4742 SDValue Test = LHS.getOperand(0);
4756 isa<ConstantSDNode>(LHS.getOperand(1)) &&
4758 SDValue Test = LHS.getOperand(0);
4816 SDValue In1 = Op.getOperand(0);
4817 SDValue In2 = Op.getOperand(1);
4901 SDValue Val = Op.getOperand(0);
4948 SDValue LHS = Op.getOperand(0);
4949 SDValue RHS = Op.getOperand(1);
4950 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get();
5062 if (isAllOnesConstant(TVal.getOperand(1))) {
5070 if (isNullConstant(TVal.getOperand(0))) {
5206 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
5207 SDValue LHS = Op.getOperand(0);
5208 SDValue RHS = Op.getOperand(1);
5209 SDValue TVal = Op.getOperand(2);
5210 SDValue FVal = Op.getOperand(3);
5242 LHS = CCVal.getOperand(0);
5243 RHS = CCVal.getOperand(1);
5273 SDValue JT = Op.getOperand(1);
5274 SDValue Entry = Op.getOperand(2);
5280 return DAG.getNode(ISD::BRIND, DL, MVT::Other, Op.getOperand(0),
5322 const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue();
5323 return DAG.getStore(Op.getOperand(0), DL, FR, Op.getOperand(1),
5323 return DAG.getStore(Op.getOperand(0), DL, FR, Op.getOperand(1),
5337 const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue();
5338 return DAG.getStore(Op.getOperand(0), DL, FR, Op.getOperand(1),
5338 return DAG.getStore(Op.getOperand(0), DL, FR, Op.getOperand(1),
5351 SDValue Chain = Op.getOperand(0);
5352 SDValue VAList = Op.getOperand(1);
5353 const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue();
5431 const Value *DestSV = cast<SrcValueSDNode>(Op.getOperand(3))->getValue();
5432 const Value *SrcSV = cast<SrcValueSDNode>(Op.getOperand(4))->getValue();
5434 return DAG.getMemcpy(Op.getOperand(0), DL, Op.getOperand(1), Op.getOperand(2),
5434 return DAG.getMemcpy(Op.getOperand(0), DL, Op.getOperand(1), Op.getOperand(2),
5434 return DAG.getMemcpy(Op.getOperand(0), DL, Op.getOperand(1), Op.getOperand(2),
5444 const Value *V = cast<SrcValueSDNode>(Op.getOperand(2))->getValue();
5447 SDValue Chain = Op.getOperand(0);
5448 SDValue Addr = Op.getOperand(1);
5513 unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
5579 unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
5601 SDValue ShOpLo = Op.getOperand(0);
5602 SDValue ShOpHi = Op.getOperand(1);
5603 SDValue ShAmt = Op.getOperand(2);
5658 SDValue ShOpLo = Op.getOperand(0);
5659 SDValue ShOpHi = Op.getOperand(1);
5660 SDValue ShAmt = Op.getOperand(2);
6287 SDValue V = Op.getOperand(i);
6291 !isa<ConstantSDNode>(V.getOperand(1))) {
6301 SDValue SourceVec = V.getOperand(0);
6307 unsigned EltNo = cast<ConstantSDNode>(V.getOperand(1))->getZExtValue();
6416 SDValue Entry = Op.getOperand(i);
6420 auto Src = find(Sources, Entry.getOperand(0));
6421 int EltNo = cast<ConstantSDNode>(Entry.getOperand(1))->getSExtValue();
6426 EVT OrigEltTy = Entry.getOperand(0).getValueType().getVectorElementType();
6720 SDValue V0 = Op.getOperand(0);
6721 SDValue V1 = Op.getOperand(1);
6852 SDValue V1 = Op.getOperand(0);
6853 SDValue V2 = Op.getOperand(1);
6937 SDValue V1 = Op.getOperand(0);
6938 SDValue V2 = Op.getOperand(1);
6948 V1.getOperand(0));
6952 !isa<ConstantSDNode>(V1.getOperand(Lane)))
6953 return DAG.getNode(AArch64ISD::DUP, dl, VT, V1.getOperand(Lane));
6962 Lane += cast<ConstantSDNode>(V1.getOperand(1))->getZExtValue();
6963 V1 = V1.getOperand(0);
6967 V1 = WidenVector(V1.getOperand(Idx), DAG);
7082 SDValue SplatVal = Op.getOperand(0);
7386 ConstantSDNode *C2node = dyn_cast<ConstantSDNode>(Shift.getOperand(1));
7392 if (!isAllConstantBuildVector(And.getOperand(1), C1))
7405 SDValue X = And.getOperand(0);
7406 SDValue Y = Shift.getOperand(0);
7413 Shift.getOperand(1));
7434 SDValue LHS = Op.getOperand(0);
7436 dyn_cast<BuildVectorSDNode>(Op.getOperand(1).getNode());
7439 LHS = Op.getOperand(1);
7440 BVN = dyn_cast<BuildVectorSDNode>(Op.getOperand(0).getNode());
7589 SDValue V = Op.getOperand(i);
7635 SDValue V = Op.getOperand(i);
7702 SDValue Lane = Value.getOperand(1);
7703 Value = Value.getOperand(0);
7725 Ops.push_back(DAG.getNode(ISD::BITCAST, dl, NewType, Op.getOperand(i)));
7752 SDValue V = Op.getOperand(i);
7788 SDValue Op0 = Op.getOperand(0);
7809 SDValue V = Op.getOperand(i);
7829 EVT VT = Op.getOperand(0).getValueType();
7830 ConstantSDNode *CI = dyn_cast<ConstantSDNode>(Op.getOperand(2));
7848 SDValue WideVec = WidenVector(Op.getOperand(0), DAG);
7852 Op.getOperand(1), Op.getOperand(2));
7852 Op.getOperand(1), Op.getOperand(2));
7863 EVT VT = Op.getOperand(0).getValueType();
7864 ConstantSDNode *CI = dyn_cast<ConstantSDNode>(Op.getOperand(1));
7882 SDValue WideVec = WidenVector(Op.getOperand(0), DAG);
7891 Op.getOperand(1));
7896 EVT VT = Op.getOperand(0).getValueType();
7902 ConstantSDNode *Cst = dyn_cast<ConstantSDNode>(Op.getOperand(1));
7965 Op = Op.getOperand(0);
8007 if (!Op.getOperand(1).getValueType().isVector())
8016 if (isVShiftLImm(Op.getOperand(1), VT, false, Cnt) && Cnt < EltSize)
8017 return DAG.getNode(AArch64ISD::VSHL, DL, VT, Op.getOperand(0),
8022 Op.getOperand(0), Op.getOperand(1));
8022 Op.getOperand(0), Op.getOperand(1));
8026 if (isVShiftRImm(Op.getOperand(1), VT, false, Cnt) && Cnt < EltSize) {
8029 return DAG.getNode(Opc, DL, VT, Op.getOperand(0),
8039 SDValue NegShift = DAG.getNode(AArch64ISD::NEG, DL, VT, Op.getOperand(1));
8042 DAG.getConstant(Opc, DL, MVT::i32), Op.getOperand(0),
8147 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get();
8148 SDValue LHS = Op.getOperand(0);
8149 SDValue RHS = Op.getOperand(1);
8211 SDValue VecOp = ScalarOp.getOperand(0);
8236 Op.getOperand(0));
8243 Op.getOperand(0));
8259 SDValue RHS = Op.getOperand(2);
8263 Op.getOperand(0), Op.getOperand(1), RHS,
8263 Op.getOperand(0), Op.getOperand(1), RHS,
8276 SDValue RHS = Op.getOperand(2);
8280 Op.getOperand(0), Op.getOperand(1), RHS,
8280 Op.getOperand(0), Op.getOperand(1), RHS,
8320 SDValue Chain = Op.getOperand(0);
8321 SDValue Size = Op.getOperand(1);
8322 unsigned Align = cast<ConstantSDNode>(Op.getOperand(2))->getZExtValue();
8479 Base.getOperand(1).getOpcode() == ISD::SHL &&
8480 Base.getOperand(1).hasOneUse() &&
8481 Base.getOperand(1).getOperand(1).getOpcode() == ISD::Constant) {
8481 Base.getOperand(1).getOperand(1).getOpcode() == ISD::Constant) {
8484 uint64_t ShiftAmount = Base.getOperand(1).getConstantOperandVal(1);
9284 auto *ShiftAmt = dyn_cast<ConstantSDNode>(Shift.getOperand(1));
9289 return DAG.getNode(AArch64ISD::CMGEz, SDLoc(N), VT, Shift.getOperand(0));
9303 N0.getOpcode() == ISD::ADD && N0.getOperand(1) == N1 &&
9304 N1.getOpcode() == ISD::SRA && N1.getOperand(0) == N0.getOperand(0))
9304 N1.getOpcode() == ISD::SRA && N1.getOperand(0) == N0.getOperand(0))
9305 if (ConstantSDNode *Y1C = dyn_cast<ConstantSDNode>(N1.getOperand(1)))
9308 N0.getOperand(0));
9312 N0.getOperand(0), DAG.getConstant(0, DL, VT));
9313 return DAG.getNode(AArch64ISD::CSEL, DL, VT, N0.getOperand(0), Neg,
9646 !Op.getOperand(0).getValueType().isSimple() ||
9654 MVT IntTy = Op.getOperand(0).getSimpleValueType().getVectorElementType();
9691 SDValue ConvInput = Op.getOperand(0);
9715 if (!isa<ConstantSDNode>(N.getOperand(1)))
9887 SDValue N00 = N0.getOperand(0);
10073 SDValue Vec = Op1.getOperand(0);
10074 SDValue Lane = Op1.getOperand(1);
10150 N = N.getOperand(0);
10153 return cast<ConstantSDNode>(N.getOperand(1))->getAPIntValue() ==
10154 N.getOperand(0).getValueType().getVectorNumElements() / 2;
10193 SetCCInfo.Info.Generic.Opnd0 = &Op.getOperand(0);
10194 SetCCInfo.Info.Generic.Opnd1 = &Op.getOperand(1);
10195 SetCCInfo.Info.Generic.CC = cast<CondCodeSDNode>(Op.getOperand(2))->get();
10207 SetCCInfo.Info.AArch64.Cmp = &Op.getOperand(3);
10210 cast<ConstantSDNode>(Op.getOperand(2))->getZExtValue());
10215 ConstantSDNode *TValue = dyn_cast<ConstantSDNode>(Op.getOperand(0));
10216 ConstantSDNode *FValue = dyn_cast<ConstantSDNode>(Op.getOperand(1));
10261 ? InfoAndKind.Info.AArch64.Cmp->getOperand(0).getValueType()
10321 if (isEssentiallyExtractHighSubvector(LHS.getOperand(0))) {
10322 RHS = tryExtendDUPToExtractHigh(RHS.getOperand(0), DAG);
10327 } else if (isEssentiallyExtractHighSubvector(RHS.getOperand(0))) {
10328 LHS = tryExtendDUPToExtractHigh(LHS.getOperand(0), DAG);
10450 ConstantSDNode *CMask = dyn_cast<ConstantSDNode>(AndN.getOperand(1));
10455 N->getOperand(0), N->getOperand(1), AndN.getOperand(0));
10715 SDValue EltVal = StVal.getOperand(I);
10773 SplatVal = StVal.getOperand(1);
10774 else if (StVal.getOperand(1) != SplatVal)
10778 ConstantSDNode *CIndex = dyn_cast<ConstantSDNode>(StVal.getOperand(2));
10786 StVal = StVal.getOperand(0);
11426 SDValue LHS = Cmp.getOperand(0);
11427 SDValue RHS = Cmp.getOperand(1);
11574 EVT CmpVT = N0.getOperand(0).getValueType();
11584 N0.getOperand(0), N0.getOperand(1),
11584 N0.getOperand(0), N0.getOperand(1),
11585 cast<CondCodeSDNode>(N0.getOperand(2))->get());
11612 EVT SrcVT = N0.getOperand(0).getValueType();
11640 DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, SrcVT, N0.getOperand(0));
11642 DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, SrcVT, N0.getOperand(1));
11643 SDValue SetCC = DAG.getNode(ISD::SETCC, DL, CCVT, LHS, RHS, N0.getOperand(2));
lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp 324 return Val.getOpcode() == ISD::BITCAST ? Val.getOperand(0) : Val;
333 SDValue Srl = In.getOperand(0);
335 if (ConstantSDNode *ShiftAmt = dyn_cast<ConstantSDNode>(Srl.getOperand(1))) {
337 Out = stripBitcast(Srl.getOperand(0));
350 SDValue Src = In.getOperand(0);
955 (C = dyn_cast<ConstantSDNode>(Addr.getOperand(0)))) {
959 (C = dyn_cast<ConstantSDNode>(Addr.getOperand(1)))) {
960 Base = Addr.getOperand(0);
1171 SDValue N0 = Addr.getOperand(0);
1172 SDValue N1 = Addr.getOperand(1);
1182 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Addr.getOperand(0))) {
1191 Zero, Addr.getOperand(1));
1196 Opnds.push_back(Addr.getOperand(1));
1246 SDValue N0 = Addr.getOperand(0);
1247 SDValue N1 = Addr.getOperand(1);
1260 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Addr.getOperand(0))) {
1272 Zero, Addr.getOperand(1));
1277 Opnds.push_back(Addr.getOperand(1));
1349 C1 = cast<ConstantSDNode>(Addr.getOperand(1));
1351 N0 = Addr.getOperand(0);
1359 SDValue N2 = N0.getOperand(0);
1360 SDValue N3 = N0.getOperand(1);
1512 SDValue N0 = Addr.getOperand(0);
1513 SDValue N1 = Addr.getOperand(1);
1643 SDValue N0 = Addr.getOperand(0);
1644 SDValue N1 = Addr.getOperand(1);
1812 SDValue N0 = Addr.getOperand(0);
1813 SDValue N1 = Addr.getOperand(1);
1876 SDValue N0 = Index.getOperand(0);
1877 SDValue N1 = Index.getOperand(1);
1927 ReplaceNode(N, getS_BFE(Opcode, SDLoc(N), Shl.getOperand(0), CVal - BVal,
1942 ConstantSDNode *Shift = dyn_cast<ConstantSDNode>(Srl.getOperand(1));
1953 Srl.getOperand(0), ShiftVal, WidthVal));
1975 And.getOperand(0), ShiftVal, WidthVal));
1997 const ConstantSDNode *Amt = dyn_cast<ConstantSDNode>(Src.getOperand(1));
2002 ReplaceNode(N, getS_BFE(AMDGPU::S_BFE_I32, SDLoc(N), Src.getOperand(0),
2018 Cond = Cond.getOperand(2);
2023 MVT VT = Cond.getOperand(0).getSimpleValueType();
2030 ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
2209 SDValue PtrBase = Ptr.getOperand(0);
2210 SDValue PtrOffset = Ptr.getOperand(1);
2288 BaseOffset = BaseOffset.getOperand(0);
2385 Src = Src.getOperand(0);
2390 Src = Src.getOperand(0);
2466 Src = Src.getOperand(0);
2472 SDValue Lo = stripBitcast(Src.getOperand(0));
2473 SDValue Hi = stripBitcast(Src.getOperand(1));
2476 Lo = stripBitcast(Lo.getOperand(0));
2481 Hi = stripBitcast(Hi.getOperand(0));
2568 Src = Src.getOperand(0);
2813 (C = dyn_cast<ConstantSDNode>(Addr.getOperand(0)))) {
2817 (C = dyn_cast<ConstantSDNode>(Addr.getOperand(1)))) {
2818 Base = Addr.getOperand(0);
2833 && (IMMOffset = dyn_cast<ConstantSDNode>(Addr.getOperand(1)))
2836 Base = Addr.getOperand(0);
lib/Target/AMDGPU/AMDGPUISelLowering.cpp 1121 auto Ops = {DAG.getConstant(0, SDLoc(), Op.getValueType()), Op.getOperand(0)};
1233 SDValue Lo = DAG.getNode(ISD::BITCAST, SL, MVT::i32, Op.getOperand(0));
1234 SDValue Hi = DAG.getNode(ISD::BITCAST, SL, MVT::i32, Op.getOperand(1));
1250 unsigned Start = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
1252 DAG.ExtractVectorElements(Op.getOperand(0), Args, Start,
1530 SDValue LHS = Op.getOperand(0);
1531 SDValue RHS = Op.getOperand(1);
1646 SDValue LHS = Op.getOperand(0);
1650 SDValue RHS = Op.getOperand(1);
1858 SDValue Num = Op.getOperand(0);
1859 SDValue Den = Op.getOperand(1);
1962 SDValue LHS = Op.getOperand(0);
1963 SDValue RHS = Op.getOperand(1);
2021 SDValue X = Op.getOperand(0);
2022 SDValue Y = Op.getOperand(1);
2035 SDValue Src = Op.getOperand(0);
2075 SDValue Src = Op.getOperand(0);
2124 SDValue Src = Op.getOperand(0);
2153 return DAG.getNode(ISD::FRINT, SDLoc(Op), Op.getValueType(), Op.getOperand(0));
2163 SDValue X = Op.getOperand(0);
2192 SDValue X = Op.getOperand(0);
2261 SDValue Src = Op.getOperand(0);
2289 SDValue Operand = Op.getOperand(0);
2300 SDValue Src = Op.getOperand(0);
2317 SDValue Src = Op.getOperand(0);
2411 SDValue Src = Op.getOperand(0);
2477 SDValue Src = Op.getOperand(0);
2499 assert(Op.getOperand(0).getValueType() == MVT::i64 &&
2507 SDValue Src = Op.getOperand(0);
2526 assert(Op.getOperand(0).getValueType() == MVT::i64 &&
2534 SDValue Src = Op.getOperand(0);
2555 SDValue Src = Op.getOperand(0);
2582 SDValue N0 = Op.getOperand(0);
2681 SDValue Src = Op.getOperand(0);
2704 SDValue Src = Op.getOperand(0);
2727 EVT ExtraVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
2733 SDValue Src = Op.getOperand(0);
2965 SDValue Src = N0.getOperand(0);
3131 if (auto *Mask = dyn_cast<ConstantSDNode>(LHS.getOperand(1))) {
3136 DAG.getNode(ISD::SRL, SL, VT, LHS.getOperand(0), N->getOperand(1)),
3137 DAG.getNode(ISD::SRL, SL, VT, LHS.getOperand(1), N->getOperand(1)));
3174 SDValue Vec = Src.getOperand(0);
3176 SDValue Elt0 = Vec.getOperand(0);
3193 if (auto K = isConstOrConstSplat(Src.getOperand(1))) {
3195 SDValue BV = stripBitcast(Src.getOperand(0));
3198 SDValue SrcElt = BV.getOperand(1);
3221 SDValue Amt = Src.getOperand(1);
3232 Src.getOperand(0));
3297 N0 = N0.getOperand(0);
3300 N1 = N1.getOperand(0);
3428 ConstantSDNode *CmpRhs = dyn_cast<ConstantSDNode>(Cond.getOperand(1));
3433 ISD::CondCode CCOpcode = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
3434 SDValue CmpLHS = Cond.getOperand(0);
3443 RHS.getOperand(0) == CmpLHS &&
3452 LHS.getOperand(0) == CmpLHS &&
3470 N1.getOperand(0), N2.getOperand(0));
3470 N1.getOperand(0), N2.getOperand(0));
3485 SDValue Cond = N.getOperand(0);
3486 SDValue LHS = N.getOperand(1);
3487 SDValue RHS = N.getOperand(2);
3508 SDValue NewLHS = LHS.getOperand(0);
3552 SDValue LHS = Cond.getOperand(0);
3553 SDValue RHS = Cond.getOperand(1);
3554 SDValue CC = Cond.getOperand(2);
3661 SDValue LHS = N0.getOperand(0);
3662 SDValue RHS = N0.getOperand(1);
3667 LHS = LHS.getOperand(0);
3672 RHS = RHS.getOperand(0);
3685 SDValue LHS = N0.getOperand(0);
3686 SDValue RHS = N0.getOperand(1);
3689 LHS = LHS.getOperand(0);
3691 RHS = RHS.getOperand(0);
3708 SDValue LHS = N0.getOperand(0);
3709 SDValue MHS = N0.getOperand(1);
3710 SDValue RHS = N0.getOperand(2);
3713 LHS = LHS.getOperand(0);
3715 MHS = MHS.getOperand(0);
3722 RHS = RHS.getOperand(0);
3742 SDValue LHS = N0.getOperand(0);
3743 SDValue RHS = N0.getOperand(1);
3783 SDValue CvtSrc = N0.getOperand(0);
3787 return DAG.getNode(Opc, SL, VT, CvtSrc.getOperand(0));
3799 SDValue CvtSrc = N0.getOperand(0);
3804 CvtSrc.getOperand(0), N0.getOperand(1));
3804 CvtSrc.getOperand(0), N0.getOperand(1));
3812 return DAG.getNode(ISD::FP_ROUND, SL, VT, Neg, N0.getOperand(1));
3820 SDValue Src = N0.getOperand(0);
3845 SDValue Src = N0.getOperand(0);
3898 SDValue Elt = Src.getOperand(I);
4412 ConstantSDNode *CWidth = dyn_cast<ConstantSDNode>(Op.getOperand(2));
4433 KnownBits LHSKnown = DAG.computeKnownBits(Op.getOperand(0), Depth + 1);
4434 KnownBits RHSKnown = DAG.computeKnownBits(Op.getOperand(1), Depth + 1);
4472 ConstantSDNode *CMask = dyn_cast<ConstantSDNode>(Op.getOperand(2));
4476 KnownBits LHSKnown = DAG.computeKnownBits(Op.getOperand(0), Depth + 1);
4477 KnownBits RHSKnown = DAG.computeKnownBits(Op.getOperand(1), Depth + 1);
4508 auto GA = cast<GlobalAddressSDNode>(Op.getOperand(0).getNode());
4517 unsigned IID = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
4540 ConstantSDNode *Width = dyn_cast<ConstantSDNode>(Op.getOperand(2));
4545 if (!isNullConstant(Op.getOperand(1)))
4549 unsigned Op0SignBits = DAG.ComputeNumSignBits(Op.getOperand(0), Depth + 1);
4554 ConstantSDNode *Width = dyn_cast<ConstantSDNode>(Op.getOperand(2));
4596 return DAG.isKnownNeverNaN(Op.getOperand(0), SNaN, Depth + 1) &&
4597 DAG.isKnownNeverNaN(Op.getOperand(1), SNaN, Depth + 1);
4605 return DAG.isKnownNeverNaN(Op.getOperand(0), SNaN, Depth + 1) &&
4606 DAG.isKnownNeverNaN(Op.getOperand(1), SNaN, Depth + 1) &&
4607 DAG.isKnownNeverNaN(Op.getOperand(2), SNaN, Depth + 1);
4630 return DAG.isKnownNeverNaN(Op.getOperand(0), SNaN, Depth + 1);
4645 = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
4654 return DAG.isKnownNeverNaN(Op.getOperand(1), SNaN, Depth + 1);
4659 return DAG.isKnownNeverNaN(Op.getOperand(1), SNaN, Depth + 1) &&
4660 DAG.isKnownNeverNaN(Op.getOperand(2), SNaN, Depth + 1);
lib/Target/AMDGPU/AMDGPUISelLowering.h 161 return Val.getOpcode() == ISD::BITCAST ? Val.getOperand(0) : Val;
lib/Target/AMDGPU/R600ISelLowering.cpp 501 SDValue Chain = Op.getOperand(0);
503 cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
509 Op.getOperand(2), // Export Value
510 Op.getOperand(3), // ArrayBase
511 Op.getOperand(4), // Type
528 cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
548 Op.getOperand(1),
553 Op.getOperand(2),
554 Op.getOperand(3),
555 Op.getOperand(4),
560 Op.getOperand(5),
561 Op.getOperand(6),
562 Op.getOperand(7),
563 Op.getOperand(8),
564 Op.getOperand(9),
565 Op.getOperand(10)
571 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(1),
573 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2),
575 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(1),
577 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2),
579 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(1),
581 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2),
583 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(1),
585 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2),
635 return DAG.getNode(AMDGPUISD::RSQ, DL, VT, Op.getOperand(1));
638 return DAG.getNode(AMDGPUISD::RSQ_CLAMP, DL, VT, Op.getOperand(1));
711 SDValue Vector = Op.getOperand(0);
712 SDValue Index = Op.getOperand(1);
726 SDValue Vector = Op.getOperand(0);
727 SDValue Value = Op.getOperand(1);
728 SDValue Index = Op.getOperand(2);
759 SDValue Arg = Op.getOperand(0);
793 SDValue Lo = Op.getOperand(0);
794 SDValue Hi = Op.getOperand(1);
795 SDValue Shift = Op.getOperand(2);
829 SDValue Lo = Op.getOperand(0);
830 SDValue Hi = Op.getOperand(1);
831 SDValue Shift = Op.getOperand(2);
868 SDValue Lo = Op.getOperand(0);
869 SDValue Hi = Op.getOperand(1);
944 SDValue LHS = Op.getOperand(0);
945 SDValue RHS = Op.getOperand(1);
946 SDValue True = Op.getOperand(2);
947 SDValue False = Op.getOperand(3);
948 SDValue CC = Op.getOperand(4);
1530 SDValue Chain = Op.getOperand(0);
1531 SDValue Cond = Op.getOperand(1);
1532 SDValue Jump = Op.getOperand(2);
1753 unsigned Idx = dyn_cast<ConstantSDNode>(NewBldVec[i].getOperand(1))
1762 unsigned Idx = dyn_cast<ConstantSDNode>(NewBldVec[i].getOperand(1))
1862 Arg.getOperand(0));
1877 SDValue SelectCC = FNeg.getOperand(0);
1879 SelectCC.getOperand(0).getValueType() != MVT::f32 || // LHS
1880 SelectCC.getOperand(2).getValueType() != MVT::f32 || // True
1881 !isHWTrueValue(SelectCC.getOperand(2)) ||
1882 !isHWFalseValue(SelectCC.getOperand(3))) {
1887 SelectCC.getOperand(0), // LHS
1888 SelectCC.getOperand(1), // RHS
1891 SelectCC.getOperand(4)); // CC
1959 Arg.getOperand(0).getOpcode() == ISD::BUILD_VECTOR &&
1960 (Arg.getOperand(0).getValueType().getVectorNumElements() ==
1965 Arg->getOperand(0).getOperand(Element));
1991 if (LHS.getOperand(2).getNode() != True.getNode() ||
1992 LHS.getOperand(3).getNode() != False.getNode() ||
2001 ISD::CondCode LHSCC = cast<CondCodeSDNode>(LHS.getOperand(4))->get();
2003 LHS.getOperand(0).getValueType().isInteger());
2005 isCondCodeLegal(LHSCC, LHS.getOperand(0).getSimpleValueType()))
2007 LHS.getOperand(0),
2008 LHS.getOperand(1),
2009 LHS.getOperand(2),
2010 LHS.getOperand(3),
2093 Src = Src.getOperand(0);
2099 Src = Src.getOperand(0);
2109 SDValue CstOffset = Src.getOperand(0);
2160 Imm = Src.getOperand(0);
2169 ConstantFPSDNode *FPC = dyn_cast<ConstantFPSDNode>(Src.getOperand(0));
2181 ConstantSDNode *C = dyn_cast<ConstantSDNode>(Src.getOperand(0));
lib/Target/AMDGPU/SIISelLowering.cpp 4309 Results.push_back(Res.getOperand(0));
4310 Results.push_back(Res.getOperand(1));
4438 SDNode *Intr = BRCOND.getOperand(1).getNode();
4439 SDValue Target = BRCOND.getOperand(2);
4478 Ops.push_back(BRCOND.getOperand(0));
4491 BRCOND.getOperand(0)
4501 BRCOND.getOperand(2)
4538 if (cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue() != 0)
4571 SDValue Src = Op.getOperand(0);
4604 SDValue Chain = Op.getOperand(0);
4630 SDValue Chain = Op.getOperand(0);
4766 SDValue Vec = Op.getOperand(0);
4767 SDValue Ins = Op.getOperand(1);
4768 SDValue Idx = Op.getOperand(2);
4787 SDValue Vec = Op.getOperand(0);
4788 SDValue InsVal = Op.getOperand(1);
4789 SDValue Idx = Op.getOperand(2);
4866 SDValue Vec = Op.getOperand(0);
4867 SDValue Idx = Op.getOperand(1);
4915 int SrcNumElts = Op.getOperand(0).getValueType().getVectorNumElements();
4970 { Op.getOperand(0), Op.getOperand(1) });
4970 { Op.getOperand(0), Op.getOperand(1) });
4972 { Op.getOperand(2), Op.getOperand(3) });
4972 { Op.getOperand(2), Op.getOperand(3) });
4984 SDValue Lo = Op.getOperand(0);
4985 SDValue Hi = Op.getOperand(1);
5344 VData = Op.getOperand(2);
5348 SDValue VData2 = Op.getOperand(3);
5365 auto DMaskConst = cast<ConstantSDNode>(Op.getOperand(DMaskIdx));
5370 VData = Op.getOperand(2);
5421 dyn_cast<ConstantFPSDNode>(Op.getOperand(AddrIdx+NumVAddrs-1))) {
5432 dyn_cast<ConstantSDNode>(Op.getOperand(AddrIdx+NumVAddrs-1))) {
5442 MVT VAddrVT = Op.getOperand(DimIdx).getSimpleValueType();
5452 AddrLo = Op.getOperand(i);
5454 AddrLo = Op.getOperand(i);
5463 AddrHi = Op.getOperand(i + 1);
5474 VAddrs.push_back(Op.getOperand(AddrIdx + i));
5503 cast<ConstantSDNode>(Op.getOperand(AddrIdx + NumVAddrs + 2));
5511 SDValue TexFail = Op.getOperand(CtrlIdx);
5536 return DAG.getMergeValues({Undef, Op.getOperand(0)}, DL);
5558 if (!parseCachePolicy(Op.getOperand(CtrlIdx + 1), DAG, nullptr, &SLC,
5562 if (!parseCachePolicy(Op.getOperand(CtrlIdx + 1), DAG, &GLC, &SLC,
5576 Ops.push_back(Op.getOperand(AddrIdx + NumVAddrs)); // rsrc
5578 Ops.push_back(Op.getOperand(AddrIdx + NumVAddrs + 1)); // sampler
5596 Ops.push_back(Op.getOperand(0)); // chain
5711 unsigned IntrinsicID = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
5750 return DAG.getNode(AMDGPUISD::RCP, DL, VT, Op.getOperand(1));
5752 return DAG.getNode(AMDGPUISD::RSQ, DL, VT, Op.getOperand(1));
5757 return DAG.getNode(AMDGPUISD::RSQ_LEGACY, DL, VT, Op.getOperand(1));
5761 return DAG.getNode(AMDGPUISD::RCP_LEGACY, DL, VT, Op.getOperand(1));
5764 return DAG.getNode(AMDGPUISD::RSQ_CLAMP, DL, VT, Op.getOperand(1));
5770 SDValue Rsq = DAG.getNode(AMDGPUISD::RSQ, DL, VT, Op.getOperand(1));
5864 if (!parseCachePolicy(Op.getOperand(3), DAG, &GLC, nullptr,
5867 return lowerSBuffer(VT, DL, Op.getOperand(1), Op.getOperand(2), GLC, DLC,
5867 return lowerSBuffer(VT, DL, Op.getOperand(1), Op.getOperand(2), GLC, DLC,
5874 Op.getOperand(5), SDValue());
5883 Op.getOperand(2), // Attrchan
5884 Op.getOperand(3), // Attr
5885 Op.getOperand(5)); // m0
5888 Op.getOperand(1), // Src0
5889 Op.getOperand(2), // Attrchan
5890 Op.getOperand(3), // Attr
5894 Op.getOperand(4), // high
5902 Op.getOperand(1), // Src0
5903 Op.getOperand(2), // Attrchan
5904 Op.getOperand(3), // Attr
5906 Op.getOperand(4), // high
5916 Op.getOperand(6), SDValue());
5918 Op.getOperand(2), // Src0
5919 Op.getOperand(3), // Attrchan
5920 Op.getOperand(4), // Attr
5922 Op.getOperand(1), // Src2
5924 Op.getOperand(5), // high
5931 return DAG.getNode(AMDGPUISD::SIN_HW, DL, VT, Op.getOperand(1));
5934 return DAG.getNode(AMDGPUISD::COS_HW, DL, VT, Op.getOperand(1));
5937 return DAG.getNode(AMDGPUISD::MUL_U24, DL, VT, Op.getOperand(1), Op.getOperand(2));
5937 return DAG.getNode(AMDGPUISD::MUL_U24, DL, VT, Op.getOperand(1), Op.getOperand(2));
5939 return DAG.getNode(AMDGPUISD::MUL_I24, DL, VT, Op.getOperand(1), Op.getOperand(2));
5939 return DAG.getNode(AMDGPUISD::MUL_I24, DL, VT, Op.getOperand(1), Op.getOperand(2));
5953 Op.getOperand(1), Op.getOperand(2));
5953 Op.getOperand(1), Op.getOperand(2));
5956 return DAG.getNode(AMDGPUISD::FRACT, DL, VT, Op.getOperand(1));
5960 Op.getOperand(1), Op.getOperand(2));
5960 Op.getOperand(1), Op.getOperand(2));
5963 Op.getOperand(1), Op.getOperand(2), Op.getOperand(3),
5963 Op.getOperand(1), Op.getOperand(2), Op.getOperand(3),
5963 Op.getOperand(1), Op.getOperand(2), Op.getOperand(3),
5964 Op.getOperand(4));
5968 Op.getOperand(1), Op.getOperand(2), Op.getOperand(3));
5968 Op.getOperand(1), Op.getOperand(2), Op.getOperand(3));
5968 Op.getOperand(1), Op.getOperand(2), Op.getOperand(3));
5972 Op.getOperand(1), Op.getOperand(2));
5972 Op.getOperand(1), Op.getOperand(2));
5974 const ConstantSDNode *Param = cast<ConstantSDNode>(Op.getOperand(3));
5978 SDValue Numerator = Op.getOperand(1);
5979 SDValue Denominator = Op.getOperand(2);
5993 if (Op.getOperand(1).getValueType() == MVT::i1 &&
6004 Op.getOperand(1), Op.getOperand(2), Op.getOperand(3));
6004 Op.getOperand(1), Op.getOperand(2), Op.getOperand(3));
6004 Op.getOperand(1), Op.getOperand(2), Op.getOperand(3));
6007 Op.getOperand(1), Op.getOperand(2), Op.getOperand(3),
6007 Op.getOperand(1), Op.getOperand(2), Op.getOperand(3),
6007 Op.getOperand(1), Op.getOperand(2), Op.getOperand(3),
6008 Op.getOperand(4));
6011 Op.getOperand(1), Op.getOperand(2));
6011 Op.getOperand(1), Op.getOperand(2));
6013 return DAG.getNode(AMDGPUISD::FFBH_I32, DL, VT, Op.getOperand(1));
6016 Op.getOperand(1), Op.getOperand(2), Op.getOperand(3));
6016 Op.getOperand(1), Op.getOperand(2), Op.getOperand(3));
6016 Op.getOperand(1), Op.getOperand(2), Op.getOperand(3));
6019 Op.getOperand(1), Op.getOperand(2), Op.getOperand(3));
6019 Op.getOperand(1), Op.getOperand(2), Op.getOperand(3));
6019 Op.getOperand(1), Op.getOperand(2), Op.getOperand(3));
6041 return DAG.getNode(Opcode, DL, VT, Op.getOperand(1), Op.getOperand(2));
6041 return DAG.getNode(Opcode, DL, VT, Op.getOperand(1), Op.getOperand(2));
6044 Op.getOperand(1), Op.getOperand(2));
6044 Op.getOperand(1), Op.getOperand(2));
6048 return DAG.getNode(AMDGPUISD::FMAD_FTZ, DL, VT, Op.getOperand(1),
6049 Op.getOperand(2), Op.getOperand(3));
6049 Op.getOperand(2), Op.getOperand(3));
6074 Op.getOperand(1));
6115 unsigned IntrID = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
6243 unsigned Glc = cast<ConstantSDNode>(Op.getOperand(5))->getZExtValue();
6244 unsigned Slc = cast<ConstantSDNode>(Op.getOperand(6))->getZExtValue();
6246 if (auto Idx = dyn_cast<ConstantSDNode>(Op.getOperand(3)))
6249 Op.getOperand(0), // Chain
6250 Op.getOperand(2), // rsrc
6251 Op.getOperand(3), // vindex
6259 unsigned Offset = setBufferOffsets(Op.getOperand(4), DAG, &Ops[3]);
6289 auto Offsets = splitBufferOffsets(Op.getOperand(3), DAG);
6291 Op.getOperand(0), // Chain
6292 Op.getOperand(2), // rsrc
6295 Op.getOperand(4), // soffset
6297 Op.getOperand(5), // cachepolicy, swizzled buffer
6309 auto Offsets = splitBufferOffsets(Op.getOperand(4), DAG);
6311 Op.getOperand(0), // Chain
6312 Op.getOperand(2), // rsrc
6313 Op.getOperand(3), // vindex
6315 Op.getOperand(5), // soffset
6317 Op.getOperand(6), // cachepolicy, swizzled buffer
6330 unsigned Dfmt = cast<ConstantSDNode>(Op.getOperand(7))->getZExtValue();
6331 unsigned Nfmt = cast<ConstantSDNode>(Op.getOperand(8))->getZExtValue();
6332 unsigned Glc = cast<ConstantSDNode>(Op.getOperand(9))->getZExtValue();
6333 unsigned Slc = cast<ConstantSDNode>(Op.getOperand(10))->getZExtValue();
6335 if (auto Idx = dyn_cast<ConstantSDNode>(Op.getOperand(3)))
6338 Op.getOperand(0), // Chain
6339 Op.getOperand(2), // rsrc
6340 Op.getOperand(3), // vindex
6341 Op.getOperand(4), // voffset
6342 Op.getOperand(5), // soffset
6343 Op.getOperand(6), // offset
6359 auto Offsets = splitBufferOffsets(Op.getOperand(3), DAG);
6362 Op.getOperand(0), // Chain
6363 Op.getOperand(2), // rsrc
6366 Op.getOperand(4), // soffset
6368 Op.getOperand(5), // format
6369 Op.getOperand(6), // cachepolicy, swizzled buffer
6383 auto Offsets = splitBufferOffsets(Op.getOperand(4), DAG);
6386 Op.getOperand(0), // Chain
6387 Op.getOperand(2), // rsrc
6388 Op.getOperand(3), // vindex
6390 Op.getOperand(5), // soffset
6392 Op.getOperand(6), // format
6393 Op.getOperand(7), // cachepolicy, swizzled buffer
6414 unsigned Slc = cast<ConstantSDNode>(Op.getOperand(6))->getZExtValue();
6416 if (auto Idx = dyn_cast<ConstantSDNode>(Op.getOperand(4)))
6419 Op.getOperand(0), // Chain
6420 Op.getOperand(2), // vdata
6421 Op.getOperand(3), // rsrc
6422 Op.getOperand(4), // vindex
6429 unsigned Offset = setBufferOffsets(Op.getOperand(5), DAG, &Ops[4]);
6489 auto Offsets = splitBufferOffsets(Op.getOperand(4), DAG);
6491 Op.getOperand(0), // Chain
6492 Op.getOperand(2), // vdata
6493 Op.getOperand(3), // rsrc
6496 Op.getOperand(5), // soffset
6498 Op.getOperand(6), // cachepolicy
6563 auto Offsets = splitBufferOffsets(Op.getOperand(5), DAG);
6565 Op.getOperand(0), // Chain
6566 Op.getOperand(2), // vdata
6567 Op.getOperand(3), // rsrc
6568 Op.getOperand(4), // vindex
6570 Op.getOperand(6), // soffset
6572 Op.getOperand(7), // cachepolicy
6627 unsigned Slc = cast<ConstantSDNode>(Op.getOperand(7))->getZExtValue();
6629 if (auto Idx = dyn_cast<ConstantSDNode>(Op.getOperand(5)))
6632 Op.getOperand(0), // Chain
6633 Op.getOperand(2), // src
6634 Op.getOperand(3), // cmp
6635 Op.getOperand(4), // rsrc
6636 Op.getOperand(5), // vindex
6643 unsigned Offset = setBufferOffsets(Op.getOperand(6), DAG, &Ops[5]);
6655 auto Offsets = splitBufferOffsets(Op.getOperand(5), DAG);
6657 Op.getOperand(0), // Chain
6658 Op.getOperand(2), // src
6659 Op.getOperand(3), // cmp
6660 Op.getOperand(4), // rsrc
6663 Op.getOperand(6), // soffset
6665 Op.getOperand(7), // cachepolicy
6676 auto Offsets = splitBufferOffsets(Op.getOperand(6), DAG);
6678 Op.getOperand(0), // Chain
6679 Op.getOperand(2), // src
6680 Op.getOperand(3), // cmp
6681 Op.getOperand(4), // rsrc
6682 Op.getOperand(5), // vindex
6684 Op.getOperand(7), // soffset
6686 Op.getOperand(8), // cachepolicy
6769 SDValue Chain = Op.getOperand(0);
6770 unsigned IntrinsicID = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
6775 const ConstantSDNode *Tgt = cast<ConstantSDNode>(Op.getOperand(2));
6776 const ConstantSDNode *En = cast<ConstantSDNode>(Op.getOperand(3));
6777 const ConstantSDNode *Done = cast<ConstantSDNode>(Op.getOperand(8));
6778 const ConstantSDNode *VM = cast<ConstantSDNode>(Op.getOperand(9));
6784 Op.getOperand(4), // src0
6785 Op.getOperand(5), // src1
6786 Op.getOperand(6), // src2
6787 Op.getOperand(7), // src3
6797 const ConstantSDNode *Tgt = cast<ConstantSDNode>(Op.getOperand(2));
6798 const ConstantSDNode *En = cast<ConstantSDNode>(Op.getOperand(3));
6799 SDValue Src0 = Op.getOperand(4);
6800 SDValue Src1 = Op.getOperand(5);
6801 const ConstantSDNode *Done = cast<ConstantSDNode>(Op.getOperand(6));
6802 const ConstantSDNode *VM = cast<ConstantSDNode>(Op.getOperand(7));
6827 Op.getOperand(0)), 0);
6832 SDValue VData = Op.getOperand(2);
6836 unsigned Dfmt = cast<ConstantSDNode>(Op.getOperand(8))->getZExtValue();
6837 unsigned Nfmt = cast<ConstantSDNode>(Op.getOperand(9))->getZExtValue();
6838 unsigned Glc = cast<ConstantSDNode>(Op.getOperand(10))->getZExtValue();
6839 unsigned Slc = cast<ConstantSDNode>(Op.getOperand(11))->getZExtValue();
6841 if (auto Idx = dyn_cast<ConstantSDNode>(Op.getOperand(4)))
6846 Op.getOperand(3), // rsrc
6847 Op.getOperand(4), // vindex
6848 Op.getOperand(5), // voffset
6849 Op.getOperand(6), // soffset
6850 Op.getOperand(7), // offset
6863 SDValue VData = Op.getOperand(2);
6867 auto Offsets = splitBufferOffsets(Op.getOperand(5), DAG);
6871 Op.getOperand(3), // rsrc
6872 Op.getOperand(4), // vindex
6874 Op.getOperand(6), // soffset
6876 Op.getOperand(7), // format
6877 Op.getOperand(8), // cachepolicy, swizzled buffer
6888 SDValue VData = Op.getOperand(2);
6892 auto Offsets = splitBufferOffsets(Op.getOperand(4), DAG);
6896 Op.getOperand(3), // rsrc
6899 Op.getOperand(5), // soffset
6901 Op.getOperand(6), // format
6902 Op.getOperand(7), // cachepolicy, swizzled buffer
6914 SDValue VData = Op.getOperand(2);
6918 unsigned Glc = cast<ConstantSDNode>(Op.getOperand(6))->getZExtValue();
6919 unsigned Slc = cast<ConstantSDNode>(Op.getOperand(7))->getZExtValue();
6921 if (auto Idx = dyn_cast<ConstantSDNode>(Op.getOperand(4)))
6926 Op.getOperand(3), // rsrc
6927 Op.getOperand(4), // vindex
6934 unsigned Offset = setBufferOffsets(Op.getOperand(5), DAG, &Ops[4]);
6958 SDValue VData = Op.getOperand(2);
6971 auto Offsets = splitBufferOffsets(Op.getOperand(4), DAG);
6975 Op.getOperand(3), // rsrc
6978 Op.getOperand(5), // soffset
6980 Op.getOperand(6), // cachepolicy, swizzled buffer
7002 SDValue VData = Op.getOperand(2);
7016 auto Offsets = splitBufferOffsets(Op.getOperand(5), DAG);
7020 Op.getOperand(3), // rsrc
7021 Op.getOperand(4), // vindex
7023 Op.getOperand(6), // soffset
7025 Op.getOperand(7), // cachepolicy, swizzled buffer
7045 unsigned Slc = cast<ConstantSDNode>(Op.getOperand(6))->getZExtValue();
7047 if (auto Idx = dyn_cast<ConstantSDNode>(Op.getOperand(4)))
7051 Op.getOperand(2), // vdata
7052 Op.getOperand(3), // rsrc
7053 Op.getOperand(4), // vindex
7060 unsigned Offset = setBufferOffsets(Op.getOperand(5), DAG, &Ops[4]);
7064 EVT VT = Op.getOperand(2).getValueType();
7078 Op.getOperand(2), // ptr
7079 Op.getOperand(3) // vdata
7081 EVT VT = Op.getOperand(3).getValueType();
7121 C1 = cast<ConstantSDNode>(N0.getOperand(1));
7122 N0 = N0.getOperand(0);
7176 SDValue N0 = CombinedOffset.getOperand(0);
7177 SDValue N1 = CombinedOffset.getOperand(1);
7492 SDValue Cond = Op.getOperand(0);
7497 SDValue LHS = DAG.getNode(ISD::BITCAST, DL, MVT::v2i32, Op.getOperand(1));
7498 SDValue RHS = DAG.getNode(ISD::BITCAST, DL, MVT::v2i32, Op.getOperand(2));
7519 SDValue LHS = Op.getOperand(0);
7520 SDValue RHS = Op.getOperand(1);
7543 return DAG.getNode(AMDGPUISD::RSQ, SL, VT, RHS.getOperand(0));
7614 SDValue Src0 = Op.getOperand(0);
7615 SDValue Src1 = Op.getOperand(1);
7632 SDValue LHS = Op.getOperand(1);
7633 SDValue RHS = Op.getOperand(2);
7681 SDValue LHS = Op.getOperand(0);
7682 SDValue RHS = Op.getOperand(1);
7784 SDValue X = Op.getOperand(0);
7785 SDValue Y = Op.getOperand(1);
7948 SDValue Arg = Op.getOperand(0);
7984 SDValue ChainIn = Op.getOperand(0);
7985 SDValue Addr = Op.getOperand(1);
7986 SDValue Old = Op.getOperand(2);
7987 SDValue New = Op.getOperand(3);
8062 const ConstantSDNode *CAdd = dyn_cast<ConstantSDNode>(N0.getOperand(1));
8081 SDValue ShlX = DAG.getNode(ISD::SHL, SL, VT, N0.getOperand(0), N1);
8191 ConstantSDNode *N1 = dyn_cast<ConstantSDNode>(V.getOperand(1));
8277 isa<ConstantSDNode>(LHS.getOperand(2))) {
8285 return DAG.getNode(AMDGPUISD::PERM, DL, MVT::i32, LHS.getOperand(0),
8286 LHS.getOperand(1), DAG.getConstant(Sel, DL, MVT::i32));
8293 ISD::CondCode LCC = cast<CondCodeSDNode>(LHS.getOperand(2))->get();
8294 ISD::CondCode RCC = cast<CondCodeSDNode>(RHS.getOperand(2))->get();
8296 SDValue X = LHS.getOperand(0);
8297 SDValue Y = RHS.getOperand(0);
8298 if (Y.getOpcode() != ISD::FABS || Y.getOperand(0) != X)
8302 if (X != LHS.getOperand(1))
8306 const ConstantFPSDNode *C1 = dyn_cast<ConstantFPSDNode>(RHS.getOperand(1));
8335 ISD::CondCode LCC = cast<CondCodeSDNode>(LHS.getOperand(2))->get();
8338 const ConstantSDNode *Mask = dyn_cast<ConstantSDNode>(RHS.getOperand(1));
8340 (RHS.getOperand(0) == LHS.getOperand(0) &&
8340 (RHS.getOperand(0) == LHS.getOperand(0) &&
8341 LHS.getOperand(0) == LHS.getOperand(1))) {
8341 LHS.getOperand(0) == LHS.getOperand(1))) {
8348 return DAG.getNode(AMDGPUISD::FP_CLASS, DL, MVT::i1, RHS.getOperand(0),
8358 if (isBoolSGPR(RHS.getOperand(0)))
8359 return DAG.getSelect(SDLoc(N), MVT::i32, RHS.getOperand(0),
8405 LHS.getOperand(0), RHS.getOperand(0),
8405 LHS.getOperand(0), RHS.getOperand(0),
8425 SDValue Src = LHS.getOperand(0);
8426 if (Src != RHS.getOperand(0))
8429 const ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(LHS.getOperand(1));
8430 const ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(RHS.getOperand(1));
8449 isa<ConstantSDNode>(LHS.getOperand(2))) {
8456 return DAG.getNode(AMDGPUISD::PERM, DL, MVT::i32, LHS.getOperand(0),
8457 LHS.getOperand(1), DAG.getConstant(Sel, DL, MVT::i32));
8494 LHS.getOperand(0), RHS.getOperand(0),
8494 LHS.getOperand(0), RHS.getOperand(0),
8513 SDValue ExtSrc = RHS.getOperand(0);
8633 SDValue BCSrc = Src.getOperand(0);
8655 Src.getOperand(0), // Chain
8656 Src.getOperand(1), // rsrc
8657 Src.getOperand(2), // vindex
8658 Src.getOperand(3), // voffset
8659 Src.getOperand(4), // soffset
8660 Src.getOperand(5), // offset
8661 Src.getOperand(6),
8662 Src.getOperand(7)
8666 Src.getOperand(0).getValueType());
8771 return isCanonicalized(DAG, Op.getOperand(0), MaxDepth - 1);
8801 if (!isCanonicalized(DAG, Op.getOperand(I), MaxDepth - 1))
8808 return isCanonicalized(DAG, Op.getOperand(1), MaxDepth - 1) &&
8809 isCanonicalized(DAG, Op.getOperand(2), MaxDepth - 1);
8813 SDValue SrcOp = Op.getOperand(i);
8822 return isCanonicalized(DAG, Op.getOperand(0), MaxDepth - 1);
8825 return isCanonicalized(DAG, Op.getOperand(0), MaxDepth - 1) &&
8826 isCanonicalized(DAG, Op.getOperand(1), MaxDepth - 1);
8834 SDValue Src = Op.getOperand(0);
8837 SDValue TruncSrc = Src.getOperand(0);
8840 TruncSrc.getOperand(0).getValueType() == MVT::v2f16) {
8841 return isCanonicalized(DAG, TruncSrc.getOperand(0), MaxDepth - 1);
8849 = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
8931 SDValue Lo = N0.getOperand(0);
8932 SDValue Hi = N0.getOperand(1);
8937 SDValue Op = N0.getOperand(I);
8975 auto *CRHS = dyn_cast<ConstantFPSDNode>(N0.getOperand(1));
8979 N0.getOperand(0));
9018 ConstantSDNode *K0 = dyn_cast<ConstantSDNode>(Op0.getOperand(1));
9034 Op0.getOperand(0), SDValue(K0, 0), SDValue(K1, 0));
9069 ConstantFPSDNode *K0 = getSplatConstantFP(Op0.getOperand(1));
9088 return DAG.getNode(AMDGPUISD::CLAMP, SL, VT, Op0.getOperand(0));
9097 SDValue Var = Op0.getOperand(0);
9138 Op0.getOperand(0),
9139 Op0.getOperand(1),
9152 Op1.getOperand(0),
9153 Op1.getOperand(1));
9264 Vec.getOperand(0), Idx);
9296 Vec.getOperand(0), Idx);
9298 Vec.getOperand(1), Idx);
9451 SDValue Op2 = Op1.getOperand(1);
9452 Op1 = Op1.getOperand(0);
9495 SDValue MulLHS = LHS.getOperand(0);
9496 SDValue MulRHS = LHS.getOperand(1);
9538 auto Cond = RHS.getOperand(0);
9548 auto C = dyn_cast<ConstantSDNode>(RHS.getOperand(1));
9550 SDValue Args[] = { LHS, RHS.getOperand(0), RHS.getOperand(2) };
9550 SDValue Args[] = { LHS, RHS.getOperand(0), RHS.getOperand(2) };
9571 auto C = dyn_cast<ConstantSDNode>(LHS.getOperand(1));
9574 SDValue Args[] = { LHS.getOperand(0), RHS, LHS.getOperand(2) };
9574 SDValue Args[] = { LHS.getOperand(0), RHS, LHS.getOperand(2) };
9599 SDValue Args[] = { LHS.getOperand(0), LHS.getOperand(1), N->getOperand(2) };
9599 SDValue Args[] = { LHS.getOperand(0), LHS.getOperand(1), N->getOperand(2) };
9622 SDValue A = LHS.getOperand(0);
9623 if (A == LHS.getOperand(1)) {
9634 SDValue A = RHS.getOperand(0);
9635 if (A == RHS.getOperand(1)) {
9666 SDValue A = LHS.getOperand(0);
9667 if (A == LHS.getOperand(1)) {
9681 SDValue A = RHS.getOperand(0);
9682 if (A == RHS.getOperand(1)) {
9721 Op1 = Op1.getOperand(0);
9722 Op2 = Op2.getOperand(0);
9727 SDValue Vec1 = Op1.getOperand(0);
9728 SDValue Idx1 = Op1.getOperand(1);
9729 SDValue Vec2 = Op2.getOperand(0);
9731 SDValue FMAOp1 = FMA.getOperand(0);
9732 SDValue FMAOp2 = FMA.getOperand(1);
9733 SDValue FMAAcc = FMA.getOperand(2);
9739 FMAOp1 = FMAOp1.getOperand(0);
9740 FMAOp2 = FMAOp2.getOperand(0);
9745 SDValue Vec3 = FMAOp1.getOperand(0);
9746 SDValue Vec4 = FMAOp2.getOperand(0);
9747 SDValue Idx2 = FMAOp1.getOperand(1);
9749 if (Idx1 != Op2.getOperand(1) || Idx2 != FMAOp2.getOperand(1) ||
9749 if (Idx1 != Op2.getOperand(1) || Idx2 != FMAOp2.getOperand(1) ||
9790 isBoolSGPR(LHS.getOperand(0))) {
9799 return DAG.getNode(ISD::XOR, SL, MVT::i1, LHS.getOperand(0),
9805 return LHS.getOperand(0);
9811 isa<ConstantSDNode>(LHS.getOperand(1)) &&
9812 isa<ConstantSDNode>(LHS.getOperand(2)) &&
9814 isBoolSGPR(LHS.getOperand(0))) {
9825 return DAG.getNode(ISD::XOR, SL, MVT::i1, LHS.getOperand(0),
9829 return LHS.getOperand(0);
9857 return DAG.getNode(AMDGPUISD::FP_CLASS, SL, MVT::i1, LHS.getOperand(0),
9874 Srl = Srl.getOperand(0);
9883 dyn_cast<ConstantSDNode>(Srl.getOperand(1))) {
9884 Srl = DAG.getZExtOrTrunc(Srl.getOperand(0), SDLoc(Srl.getOperand(0)),
9884 Srl = DAG.getZExtOrTrunc(Srl.getOperand(0), SDLoc(Srl.getOperand(0)),
10239 Op = Op.getOperand(0);
10903 return DAG.isKnownNeverNaN(Op.getOperand(0), SNaN, Depth + 1);
lib/Target/ARC/ARCISelDAGToDAG.cpp 78 Base = Addr.getOperand(0);
105 if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(Addr.getOperand(1))) {
113 Base = Addr.getOperand(0);
134 if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(Addr.getOperand(1))) {
138 Base = Addr.getOperand(0);
156 if ((FIN = dyn_cast<FrameIndexSDNode>(Addr.getOperand(0))) &&
157 (CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1))) &&
lib/Target/ARC/ARCISelLowering.cpp 164 SDValue LHS = Op.getOperand(0);
165 SDValue RHS = Op.getOperand(1);
166 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
167 SDValue TVal = Op.getOperand(2);
168 SDValue FVal = Op.getOperand(3);
179 SDValue Op0 = Op.getOperand(0);
184 unsigned Width = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
198 SDValue Chain = Op.getOperand(0);
199 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get();
200 SDValue LHS = Op.getOperand(2);
201 SDValue RHS = Op.getOperand(3);
202 SDValue Dest = Op.getOperand(4);
717 assert(cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue() == 0 &&
742 const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue();
743 return DAG.getStore(Op.getOperand(0), dl, FR, Op.getOperand(1),
743 return DAG.getStore(Op.getOperand(0), dl, FR, Op.getOperand(1),
lib/Target/ARM/ARMISelDAGToDAG.cpp 395 SDValue Srl = N1.getOperand(0);
417 Srl.getOperand(0),
497 ConstantSDNode *MulConst = dyn_cast<ConstantSDNode>(N.getOperand(1));
540 replaceDAGValue(N.getOperand(1), NewMulConst);
554 BaseReg = N.getOperand(0);
556 ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1));
578 BaseReg = N.getOperand(0);
580 ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1));
583 ShReg = N.getOperand(1);
618 N.getOperand(0).getOpcode() != ISD::TargetGlobalAddress &&
619 N.getOperand(0).getOpcode() != ISD::TargetExternalSymbol &&
620 N.getOperand(0).getOpcode() != ISD::TargetGlobalTLSAddress) {
621 Base = N.getOperand(0);
628 if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
634 Base = N.getOperand(0);
657 if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
669 Base = Offset = N.getOperand(0);
687 if (isScaledConstantInRange(N.getOperand(1), /*Scale=*/1,
695 ARM_AM::getShiftOpcForNode(N.getOperand(1).getOpcode());
698 Base = N.getOperand(0);
699 Offset = N.getOperand(1);
705 dyn_cast<ConstantSDNode>(N.getOperand(1).getOperand(1))) {
705 dyn_cast<ConstantSDNode>(N.getOperand(1).getOperand(1))) {
708 Offset = N.getOperand(1).getOperand(0);
708 Offset = N.getOperand(1).getOperand(0);
721 N.getOperand(0).hasOneUse())) {
722 ShOpcVal = ARM_AM::getShiftOpcForNode(N.getOperand(0).getOpcode());
727 dyn_cast<ConstantSDNode>(N.getOperand(0).getOperand(1))) {
727 dyn_cast<ConstantSDNode>(N.getOperand(0).getOperand(1))) {
729 if (isShifterOpProfitable(N.getOperand(0), ShOpcVal, ShAmt)) {
730 Offset = N.getOperand(0).getOperand(0);
730 Offset = N.getOperand(0).getOperand(0);
731 Base = N.getOperand(1);
749 replaceDAGValue(Offset.getOperand(1), NewMulConst);
779 if (ConstantSDNode *Sh = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
782 Offset = N.getOperand(0);
847 Base = N.getOperand(0);
848 Offset = N.getOperand(1);
869 if (isScaledConstantInRange(N.getOperand(1), /*Scale=*/1,
871 Base = N.getOperand(0);
889 Base = N.getOperand(0);
890 Offset = N.getOperand(1);
927 N.getOperand(0).getOpcode() != ISD::TargetGlobalAddress &&
928 N.getOperand(0).getOpcode() != ISD::TargetExternalSymbol &&
929 N.getOperand(0).getOpcode() != ISD::TargetGlobalTLSAddress) {
930 Base = N.getOperand(0);
941 if (isScaledConstantInRange(N.getOperand(1), Scale, -255, 256, RHSC)) {
942 Base = N.getOperand(0);
1033 Offset = N.getOperand(0);
1034 SDValue N1 = N.getOperand(1);
1056 if (auto C = dyn_cast<ConstantSDNode>(N.getOperand(1)))
1073 Base = N.getOperand(0);
1074 Offset = N.getOperand(1);
1098 N.getOperand(0).getOpcode() != ISD::TargetGlobalAddress &&
1099 N.getOperand(0).getOpcode() != ISD::TargetExternalSymbol &&
1100 N.getOperand(0).getOpcode() != ISD::TargetConstantPool &&
1101 N.getOperand(0).getOpcode() != ISD::TargetGlobalTLSAddress) {
1102 Base = N.getOperand(0);
1113 if (isScaledConstantInRange(N.getOperand(1), Scale, 0, 32, RHSC)) {
1114 Base = N.getOperand(0);
1159 if (N.getOperand(0).getOpcode() == ISD::FrameIndex) {
1162 if (isScaledConstantInRange(N.getOperand(1), /*Scale=*/4, 0, 256, RHSC)) {
1163 Base = N.getOperand(0);
1192 if (isScaledConstantInRange(N.getOperand(1), 1 << Shift, -0x7f, 0x80,
1194 Base = N.getOperand(0);
1232 N.getOperand(0).getOpcode() != ISD::TargetGlobalAddress &&
1233 N.getOperand(0).getOpcode() != ISD::TargetExternalSymbol &&
1234 N.getOperand(0).getOpcode() != ISD::TargetGlobalTLSAddress) {
1235 Base = N.getOperand(0);
1244 if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
1254 Base = N.getOperand(0);
1278 if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
1284 Base = N.getOperand(0);
1320 if (isScaledConstantInRange(N.getOperand(1), 1 << Shift, -0x7f, 0x80,
1322 Base = N.getOperand(0);
1376 if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
1386 Base = N.getOperand(0);
1387 OffReg = N.getOperand(1);
1400 if (ConstantSDNode *Sh = dyn_cast<ConstantSDNode>(OffReg.getOperand(1))) {
1403 OffReg = OffReg.getOperand(0);
1417 replaceDAGValue(OffReg.getOperand(1), NewMulConst);
1438 ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1));
1446 Base = N.getOperand(0);
2671 SDValue Ops[] = { N->getOperand(0).getOperand(0),
2683 SDValue Ops[] = { N->getOperand(0).getOperand(0), ShOpc,
2690 SDValue Ops[] = { N->getOperand(0).getOperand(0),
2715 SDValue Ops[] = { N->getOperand(0).getOperand(0),
2737 SDValue Ops[] = { N->getOperand(0).getOperand(0),
2758 SDValue Ops[] = { N->getOperand(0).getOperand(0),
2790 SDValue ADDSrc0 = XORSrc0.getOperand(0);
2791 SDValue ADDSrc1 = XORSrc0.getOperand(1);
2792 SDValue SRASrc0 = XORSrc1.getOperand(0);
2793 SDValue SRASrc1 = XORSrc1.getOperand(1);
2863 SDValue X = And.getOperand(0);
2864 auto C = dyn_cast<ConstantSDNode>(And.getOperand(1));
2943 isScaledConstantInRange(Ptr.getOperand(1), /*Scale=*/4, 0, 256, RHSC))
2944 Ptr = Ptr.getOperand(0);
2947 cast<RegisterSDNode>(Ptr.getOperand(1))->getReg() == ARM::SP &&
2948 Ptr.getOperand(0) == ST->getChain()) {
3174 SDValue N2 = N0.getOperand(1);
3185 SDValue Ops[] = { N0.getOperand(0), Imm16,
3257 auto *Zero = dyn_cast<ConstantSDNode>(Subc.getOperand(0));
3260 Subc.getOperand(1) != SmulLoHi.getValue(0) ||
3266 SDValue Ops[] = { SmulLoHi.getOperand(0), SmulLoHi.getOperand(1),
3266 SDValue Ops[] = { SmulLoHi.getOperand(0), SmulLoHi.getOperand(1),
3336 if (InFlag.getOperand(0).getOpcode() == ISD::INTRINSIC_W_CHAIN) {
3337 SDValue Int = InFlag.getOperand(0);
3342 SDValue Elements = Int.getOperand(2);
3344 cast<ConstantSDNode>(Int.getOperand(3))->getZExtValue(), dl,
3347 SDValue Args[] = { Elements, Size, Int.getOperand(0) };
lib/Target/ARM/ARMISelLowering.cpp 1765 if (auto Const = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
1773 if (auto Const = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
1781 if (auto Const = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
1792 return isSHL16(Op.getOperand(0));
2514 unsigned VR = cast<RegisterSDNode>(Arg.getOperand(1))->getReg();
2766 SDValue ZE = Arg.getOperand(0);
2768 SDValue BC = ZE.getOperand(0);
2770 Arg = BC.getOperand(0);
3564 DAG.getVTList(MVT::i32, MVT::Other), Op.getOperand(0),
3565 Op.getOperand(1), Val);
3571 return DAG.getNode(ARMISD::EH_SJLJ_LONGJMP, dl, MVT::Other, Op.getOperand(0),
3572 Op.getOperand(1), DAG.getConstant(0, dl, MVT::i32));
3579 Op.getOperand(0));
3586 Op.getOperand(Op.getOperand(0).getValueType() == MVT::Other))
3586 Op.getOperand(Op.getOperand(0).getValueType() == MVT::Other))
3595 SDValue Chain = Op.getOperand(0);
3627 unsigned IntNo = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
3636 const SDValue &Operand = Op.getOperand(1);
3651 const SDValue &Operand = Op.getOperand(1);
3703 Op.getOperand(1));
3709 Op.getOperand(1), Op.getOperand(2));
3709 Op.getOperand(1), Op.getOperand(2));
3716 Op.getOperand(1), Op.getOperand(2));
3716 Op.getOperand(1), Op.getOperand(2));
3725 Op.getOperand(1), Op.getOperand(2));
3725 Op.getOperand(1), Op.getOperand(2));
3734 Op.getOperand(1), Op.getOperand(2));
3734 Op.getOperand(1), Op.getOperand(2));
3739 Op.getOperand(1), Op.getOperand(2));
3739 Op.getOperand(1), Op.getOperand(2));
3743 Op.getOperand(1), Op.getOperand(2));
3743 Op.getOperand(1), Op.getOperand(2));
3746 Op.getOperand(1), Op.getOperand(2), Op.getOperand(3));
3746 Op.getOperand(1), Op.getOperand(2), Op.getOperand(3));
3746 Op.getOperand(1), Op.getOperand(2), Op.getOperand(3));
3750 Op.getOperand(1));
3757 ConstantSDNode *SSIDNode = cast<ConstantSDNode>(Op.getOperand(2));
3768 return DAG.getNode(ARMISD::MEMBARRIER_MCR, dl, MVT::Other, Op.getOperand(0),
3772 ConstantSDNode *OrdN = cast<ConstantSDNode>(Op.getOperand(1));
3786 return DAG.getNode(ISD::INTRINSIC_VOID, dl, MVT::Other, Op.getOperand(0),
3797 return Op.getOperand(0);
3800 unsigned isRead = ~cast<ConstantSDNode>(Op.getOperand(2))->getZExtValue() & 1;
3804 return Op.getOperand(0);
3806 unsigned isData = cast<ConstantSDNode>(Op.getOperand(4))->getZExtValue();
3813 return DAG.getNode(ARMISD::PRELOAD, dl, MVT::Other, Op.getOperand(0),
3814 Op.getOperand(1), DAG.getConstant(isRead, dl, MVT::i32),
3827 const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue();
3828 return DAG.getStore(Op.getOperand(0), dl, FR, Op.getOperand(1),
3828 return DAG.getStore(Op.getOperand(0), dl, FR, Op.getOperand(1),
4161 if (Op.getOperand(1).getOpcode() == ARMISD::Wrapper) {
4162 SDValue WrapperOp = Op.getOperand(1).getOperand(0);
4162 SDValue WrapperOp = Op.getOperand(1).getOperand(0);
4250 LHS->hasOneUse() && isa<ConstantSDNode>(LHS.getOperand(1)) &&
4253 unsigned Mask = cast<ConstantSDNode>(LHS.getOperand(1))->getZExtValue();
4260 LHS = DAG.getNode(ISD::SHL, dl, MVT::i32, LHS.getOperand(0), ShiftAmt);
4275 CC == ISD::SETUGT && isa<ConstantSDNode>(LHS.getOperand(1)) &&
4276 cast<ConstantSDNode>(LHS.getOperand(1))->getZExtValue() < 31) {
4278 cast<ConstantSDNode>(LHS.getOperand(1))->getZExtValue() + 1;
4281 LHS.getOperand(0),
4340 return DAG.getNode(Opc, DL, MVT::Glue, Cmp.getOperand(0),Cmp.getOperand(1));
4340 return DAG.getNode(Opc, DL, MVT::Glue, Cmp.getOperand(0),Cmp.getOperand(1));
4343 Cmp = Cmp.getOperand(0);
4346 Cmp = DAG.getNode(Opc, DL, MVT::Glue, Cmp.getOperand(0),Cmp.getOperand(1));
4346 Cmp = DAG.getNode(Opc, DL, MVT::Glue, Cmp.getOperand(0),Cmp.getOperand(1));
4349 Cmp = DAG.getNode(Opc, DL, MVT::Glue, Cmp.getOperand(0));
4364 SDValue LHS = Op.getOperand(0);
4365 SDValue RHS = Op.getOperand(1);
4481 SDValue LHS = Op.getOperand(0);
4482 SDValue RHS = Op.getOperand(1);
4542 SDValue Cond = Op.getOperand(0);
4543 SDValue SelectTrue = Op.getOperand(1);
4544 SDValue SelectFalse = Op.getOperand(2);
4571 dyn_cast<ConstantSDNode>(Cond.getOperand(0));
4573 dyn_cast<ConstantSDNode>(Cond.getOperand(1));
4591 SDValue ARMcc = Cond.getOperand(2);
4592 SDValue CCR = Cond.getOperand(3);
4593 SDValue Cmp = duplicateCmp(Cond.getOperand(4), DAG);
4738 SDValue LHS1 = Op.getOperand(0);
4739 SDValue RHS1 = Op.getOperand(1);
4740 SDValue TrueVal1 = Op.getOperand(2);
4741 SDValue FalseVal1 = Op.getOperand(3);
4742 ISD::CondCode CC1 = cast<CondCodeSDNode>(Op.getOperand(4))->get();
4748 SDValue LHS2 = Op2.getOperand(0);
4749 SDValue RHS2 = Op2.getOperand(1);
4750 SDValue TrueVal2 = Op2.getOperand(2);
4751 SDValue FalseVal2 = Op2.getOperand(3);
4752 ISD::CondCode CC2 = cast<CondCodeSDNode>(Op2.getOperand(4))->get();
4838 SDValue LHS = Op.getOperand(0);
4839 SDValue RHS = Op.getOperand(1);
4840 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
4841 SDValue TrueVal = Op.getOperand(2);
4842 SDValue FalseVal = Op.getOperand(3);
4916 SDValue LHS = Op.getOperand(0);
4917 SDValue RHS = Op.getOperand(1);
4918 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
4919 SDValue TrueVal = Op.getOperand(2);
4920 SDValue FalseVal = Op.getOperand(3);
5123 SDValue Chain = Op.getOperand(0);
5124 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get();
5125 SDValue LHS = Op.getOperand(2);
5126 SDValue RHS = Op.getOperand(3);
5127 SDValue Dest = Op.getOperand(4);
5173 SDValue Chain = Op.getOperand(0);
5174 SDValue Cond = Op.getOperand(1);
5175 SDValue Dest = Op.getOperand(2);
5210 SDValue Chain = Op.getOperand(0);
5211 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get();
5212 SDValue LHS = Op.getOperand(2);
5213 SDValue RHS = Op.getOperand(3);
5214 SDValue Dest = Op.getOperand(4);
5293 SDValue Chain = Op.getOperand(0);
5294 SDValue Table = Op.getOperand(1);
5295 SDValue Index = Op.getOperand(2);
5310 Addr, Op.getOperand(2), JTI);
5333 if (Op.getOperand(0).getValueType().getVectorElementType() == MVT::f32)
5342 const EVT OpTy = Op.getOperand(0).getValueType();
5355 Op = DAG.getNode(Op.getOpcode(), dl, NewTy, Op.getOperand(0));
5363 if (isUnsupportedFloatingType(Op.getOperand(0).getValueType())) {
5366 LC = RTLIB::getFPTOSINT(Op.getOperand(0).getValueType(),
5369 LC = RTLIB::getFPTOUINT(Op.getOperand(0).getValueType(),
5372 return makeLibCall(DAG, LC, Op.getValueType(), Op.getOperand(0),
5383 if (Op.getOperand(0).getValueType().getVectorElementType() == MVT::i32) {
5389 assert((Op.getOperand(0).getValueType() == MVT::v4i16 ||
5390 Op.getOperand(0).getValueType() == MVT::v8i16) &&
5420 Op = DAG.getNode(CastOpc, dl, DestVecType, Op.getOperand(0));
5431 LC = RTLIB::getSINTTOFP(Op.getOperand(0).getValueType(),
5434 LC = RTLIB::getUINTTOFP(Op.getOperand(0).getValueType(),
5437 return makeLibCall(DAG, LC, Op.getValueType(), Op.getOperand(0),
5446 SDValue Tmp0 = Op.getOperand(0);
5447 SDValue Tmp1 = Op.getOperand(1);
5536 unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
5559 unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
5598 Results.push_back(Read.getOperand(0));
5626 ConstantSDNode *Index = dyn_cast<ConstantSDNode>(Op.getOperand(1));
5642 SDValue ExtractSrc = Op.getOperand(0);
5683 SDValue Ops[] = { Op.getOperand(0), Op.getOperand(1) };
5683 SDValue Ops[] = { Op.getOperand(0), Op.getOperand(1) };
5698 if (Op.getOperand(0).getValueType() == MVT::i32)
5700 MVT::f16, Op.getOperand(0));
5795 SDValue ShOpLo = Op.getOperand(0);
5796 SDValue ShOpHi = Op.getOperand(1);
5797 SDValue ShAmt = Op.getOperand(2);
5839 SDValue ShOpLo = Op.getOperand(0);
5840 SDValue ShOpHi = Op.getOperand(1);
5841 SDValue ShAmt = Op.getOperand(2);
5984 Op = Op.getOperand(0);
6162 SDValue Op0 = Op.getOperand(0);
6163 SDValue Op1 = Op.getOperand(1);
6164 SDValue CC = Op.getOperand(2);
6290 AndOp = AndOp.getOperand(0);
6293 Op0 = DAG.getNode(ISD::BITCAST, dl, CmpVT, AndOp.getOperand(0));
6294 Op1 = DAG.getNode(ISD::BITCAST, dl, CmpVT, AndOp.getOperand(1));
6337 SDValue LHS = Op.getOperand(0);
6338 SDValue RHS = Op.getOperand(1);
6339 SDValue Carry = Op.getOperand(2);
6340 SDValue Cond = Op.getOperand(3);
7055 SDValue FirstOp = Op.getOperand(0);
7069 SDValue V = Op.getOperand(i);
7081 SDValue V = Op.getOperand(i);
7163 SDValue V = Op.getOperand(i);
7230 if (Op.getOperand(I) == Value)
7234 Ops.push_back(Op.getOperand(I));
7248 Op.getOperand(i)));
7303 Ops.push_back(DAG.getNode(ISD::BITCAST, dl, EltVT, Op.getOperand(i)));
7317 SDValue V = Op.getOperand(i);
7362 SDValue V = Op.getOperand(i);
7369 } else if (!isa<ConstantSDNode>(V.getOperand(1))) {
7376 SDValue SourceVec = V.getOperand(0);
7382 unsigned EltNo = cast<ConstantSDNode>(V.getOperand(1))->getZExtValue();
7488 SDValue Entry = Op.getOperand(i);
7492 auto Src = llvm::find(Sources, Entry.getOperand(0));
7493 int EltNo = cast<ConstantSDNode>(Entry.getOperand(1))->getSExtValue();
7498 EVT OrigEltTy = Entry.getOperand(0).getValueType().getVectorElementType();
7676 SDValue V1 = Op.getOperand(0);
7677 SDValue V2 = Op.getOperand(1);
7696 SDValue OpLHS = Op.getOperand(0);
7767 SDValue V1 = Op.getOperand(0);
7800 SDValue V1 = Op.getOperand(0);
7801 SDValue V2 = Op.getOperand(1);
7826 return DAG.getNode(ARMISD::VDUP, dl, VT, V1.getOperand(0));
7832 !isa<ConstantSDNode>(V1.getOperand(0))) {
7835 if (!V1.getOperand(i).isUndef()) {
7840 return DAG.getNode(ARMISD::VDUP, dl, VT, V1.getOperand(0));
7997 EVT VecVT = Op.getOperand(0).getValueType();
8005 unsigned Lane = cast<ConstantSDNode>(Op.getOperand(2))->getZExtValue();
8010 Op.getOperand(1), DAG.getValueType(MVT::i1));
8019 SDValue Lane = Op.getOperand(2);
8023 SDValue Elt = Op.getOperand(1);
8043 SDValue VecIn = Op.getOperand(0);
8060 EVT VecVT = Op.getOperand(0).getValueType();
8068 unsigned Lane = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
8079 SDValue Lane = Op.getOperand(1);
8083 SDValue Vec = Op.getOperand(0);
8099 SDValue V1 = Op.getOperand(0);
8100 SDValue V2 = Op.getOperand(1);
8161 SDValue Op0 = Op.getOperand(0);
8162 SDValue Op1 = Op.getOperand(1);
8176 SDValue V1 = Op.getOperand(0);
8177 SDValue V2 = Op.getOperand(1);
8429 SDNode *N0 = Op.getOperand(0).getNode();
8430 SDNode *N1 = Op.getOperand(1).getNode();
8575 SDValue N0 = Op.getOperand(0);
8576 SDValue N1 = Op.getOperand(1);
8612 SDValue N0 = Op.getOperand(0);
8613 SDValue N1 = Op.getOperand(1);
8686 SDValue Carry = Op.getOperand(2);
8696 Result = DAG.getNode(ARMISD::ADDE, DL, VTs, Op.getOperand(0),
8697 Op.getOperand(1), Carry);
8710 Result = DAG.getNode(ARMISD::SUBE, DL, VTs, Op.getOperand(0),
8711 Op.getOperand(1), Carry);
8731 SDValue Arg = Op.getOperand(0);
8823 Arg.Node = Op.getOperand(AI);
8887 DAG.getEntryNode(), Op.getOperand(1));
9104 SDValue Val = Op.getOperand(0);
9106 SDValue Exponent = DAG.getNode(ISD::SINT_TO_FP, dl, Ty, Op.getOperand(1));
10997 SDValue N00 = N0.getOperand(0);
10998 SDValue N10 = N1.getOperand(0);
11030 N00.getOperand(0), N00.getOperand(1));
11030 N00.getOperand(0), N00.getOperand(1));
11171 if (auto Const = dyn_cast<ConstantSDNode>(SRA.getOperand(1))) {
11177 if (SRA.getOperand(0) != Mul)
11186 if (isS16(Mul.getOperand(0), DAG) && isS16(Mul.getOperand(1), DAG)) {
11186 if (isS16(Mul.getOperand(0), DAG) && isS16(Mul.getOperand(1), DAG)) {
11188 Op0 = Mul.getOperand(0);
11189 Op1 = Mul.getOperand(1);
11190 } else if (isS16(Mul.getOperand(0), DAG) && isSRA16(Mul.getOperand(1))) {
11190 } else if (isS16(Mul.getOperand(0), DAG) && isSRA16(Mul.getOperand(1))) {
11192 Op0 = Mul.getOperand(0);
11193 Op1 = Mul.getOperand(1).getOperand(0);
11193 Op1 = Mul.getOperand(1).getOperand(0);
11194 } else if (isSRA16(Mul.getOperand(0)) && isS16(Mul.getOperand(1), DAG)) {
11194 } else if (isSRA16(Mul.getOperand(0)) && isS16(Mul.getOperand(1), DAG)) {
11196 Op0 = Mul.getOperand(0).getOperand(0);
11196 Op0 = Mul.getOperand(0).getOperand(0);
11197 Op1 = Mul.getOperand(1);
11198 } else if (isSRA16(Mul.getOperand(0)) && isSRA16(Mul.getOperand(1))) {
11198 } else if (isSRA16(Mul.getOperand(0)) && isSRA16(Mul.getOperand(1))) {
11200 Op0 = Mul->getOperand(0).getOperand(0);
11201 Op1 = Mul->getOperand(1).getOperand(0);
11342 Ops.push_back(LoMul->getOperand(0));
11343 Ops.push_back(LoMul->getOperand(1));
11701 auto *C2 = dyn_cast<ConstantSDNode>(SHL.getOperand(1));
11728 SDValue X = SHL.getOperand(0);
11732 SDValue Res = DAG.getNode(ISD::SHL, dl, MVT::i32, BinOp, SHL.getOperand(1));
11734 LLVM_DEBUG(dbgs() << "Simplify shl use:\n"; SHL.getOperand(0).dump();
12078 if ((SRL.getOperand(0).getNode() != SHL.getOperand(0).getNode()) ||
12078 if ((SRL.getOperand(0).getNode() != SHL.getOperand(0).getNode()) ||
12079 SRL.getOperand(0).getOpcode() != ISD::SMUL_LOHI)
12082 SDNode *SMULLOHI = SRL.getOperand(0).getNode();
12083 if (SRL.getOperand(0) != SDValue(SMULLOHI, 0) ||
12084 SHL.getOperand(0) != SDValue(SMULLOHI, 1))
12143 SDValue N00 = N0.getOperand(0);
12148 SDValue MaskOp = N0.getOperand(1);
12177 ConstantSDNode *N11C = dyn_cast<ConstantSDNode>(N1.getOperand(1));
12193 Res = DAG.getNode(ISD::SRL, DL, VT, N1.getOperand(0),
12212 Res = DAG.getNode(ARMISD::BFI, DL, VT, N1.getOperand(0), Res,
12222 N00.getOpcode() == ISD::SHL && isa<ConstantSDNode>(N00.getOperand(1)) &&
12226 SDValue ShAmt = N00.getOperand(1);
12232 Res = DAG.getNode(ARMISD::BFI, DL, VT, N1, N00.getOperand(0),
12487 V = V.getOperand(0);
12507 V = V.getOperand(0);
12519 ConstantSDNode *N11C = dyn_cast<ConstantSDNode>(N1.getOperand(1));
12532 N->getOperand(0), N1.getOperand(0),
12552 DCI.DAG.ReplaceAllUsesWith(CombineBFI, CombineBFI.getOperand(0));
12578 return DCI.CombineTo(N, InDouble.getOperand(0), InDouble.getOperand(1));
12578 return DCI.CombineTo(N, InDouble.getOperand(0), InDouble.getOperand(1));
12621 Op0 = Op0.getOperand(0);
12623 Op1 = Op1.getOperand(0);
12628 N->getValueType(0), Op0.getOperand(0));
12756 V = V.getOperand(0);
12835 SDValue Concat0Op1 = Op0.getOperand(1);
12836 SDValue Concat1Op1 = Op1.getOperand(1);
12848 Op0.getOperand(0), Op1.getOperand(0));
12848 Op0.getOperand(0), Op1.getOperand(0));
13191 Op = Op.getOperand(0);
13198 unsigned Imm = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
13379 DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, NewFromVT, Trunc.getOperand(0),
13440 SDValue IntVec = StVal.getOperand(0);
13445 Vec, StVal.getOperand(1));
13548 MVT IntTy = Op.getOperand(0).getSimpleValueType().getVectorElementType();
13567 SDValue ConvInput = Op.getOperand(0);
13753 DAG.MaskedValueIsZero(N0.getOperand(0),
13902 SDValue Vec = N0.getOperand(0);
13903 SDValue Lane = N0.getOperand(1);
14045 if (!isa<ConstantSDNode>(N.getOperand(1)))
14047 if (!cast<ConstantSDNode>(N.getOperand(1))->isOne())
14050 return SearchLoopIntrinsic(N.getOperand(0), CC, Imm, Negate);
14053 auto *Const = dyn_cast<ConstantSDNode>(N.getOperand(1));
14062 CC = cast<CondCodeSDNode>(N.getOperand(2))->get();
14066 unsigned IntOp = cast<ConstantSDNode>(N.getOperand(1))->getZExtValue();
14143 SDValue Elements = Int.getOperand(2);
14171 DAG.ReplaceAllUsesOfValueWith(Int.getValue(1), Int.getOperand(0));
14175 cast<ConstantSDNode>(Int.getOperand(3))->getZExtValue(), dl, MVT::i32);
14176 SDValue Args[] = { Int.getOperand(0), Elements, Size, };
14208 SDValue LHS = Cmp.getOperand(0);
14209 SDValue RHS = Cmp.getOperand(1);
14248 SDValue LHS = Cmp.getOperand(0);
14249 SDValue RHS = Cmp.getOperand(1);
14384 FalseVal.getOperand(0) == LHS && FalseVal.getOperand(1) == RHS) ||
14384 FalseVal.getOperand(0) == LHS && FalseVal.getOperand(1) == RHS) ||
14815 if (auto *Ld = dyn_cast<MaskedLoadSDNode>(ExtVal.getOperand(0))) {
15393 SDValue LHS = Op.getOperand(0);
15394 SDValue RHS = Op.getOperand(1);
15405 Known = DAG.computeKnownBits(Op.getOperand(0), Depth+1);
15409 KnownBits KnownRHS = DAG.computeKnownBits(Op.getOperand(1), Depth+1);
15431 Known = DAG.computeKnownBits(Op.getOperand(0), Depth + 1);
15435 ConstantSDNode *CI = cast<ConstantSDNode>(Op.getOperand(2));
15443 const SDValue &SrcSV = Op.getOperand(0);
15447 ConstantSDNode *Pos = cast<ConstantSDNode>(Op.getOperand(1).getNode());
15493 ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1));
15512 return TLO.CombineTo(Op, Op.getOperand(0));
15522 SDValue NewOp = TLO.DAG.getNode(ISD::AND, DL, VT, Op.getOperand(0), NewC);
16066 SDValue Chain = Op.getOperand(0);
16067 SDValue Size = Op.getOperand(1);
16071 unsigned Align = cast<ConstantSDNode>(Op.getOperand(2))->getZExtValue();
16101 SDValue SrcVal = Op.getOperand(0);
16148 SDValue SrcVal = Op.getOperand(0);
lib/Target/AVR/AVRISelDAGToDAG.cpp 84 if (const ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
96 if (N.getOperand(0).getOpcode() == ISD::FrameIndex) {
97 int FI = cast<FrameIndexSDNode>(N.getOperand(0))->getIndex();
111 Base = N.getOperand(0);
335 const RegisterSDNode *RN = dyn_cast<RegisterSDNode>(BasePtr.getOperand(0));
341 int CST = (int)cast<ConstantSDNode>(BasePtr.getOperand(1))->getZExtValue();
346 SDValue Ops[] = {BasePtr.getOperand(0), Offset, ST->getValue(), Chain};
lib/Target/AVR/AVRISelLowering.cpp 620 SDValue Chain = Op.getOperand(0);
621 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get();
622 SDValue LHS = Op.getOperand(2);
623 SDValue RHS = Op.getOperand(3);
624 SDValue Dest = Op.getOperand(4);
635 SDValue LHS = Op.getOperand(0);
636 SDValue RHS = Op.getOperand(1);
637 SDValue TrueV = Op.getOperand(2);
638 SDValue FalseV = Op.getOperand(3);
639 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
652 SDValue LHS = Op.getOperand(0);
653 SDValue RHS = Op.getOperand(1);
654 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get();
671 const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue();
679 return DAG.getStore(Op.getOperand(0), dl, FI, Op.getOperand(1),
679 return DAG.getStore(Op.getOperand(0), dl, FI, Op.getOperand(1),
lib/Target/BPF/BPFISelDAGToDAG.cpp 114 ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1));
119 dyn_cast<FrameIndexSDNode>(Addr.getOperand(0)))
122 Base = Addr.getOperand(0);
143 ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1));
147 if (FrameIndexSDNode *FIN = dyn_cast<FrameIndexSDNode>(Addr.getOperand(0)))
lib/Target/BPF/BPFISelLowering.cpp 499 SDValue Chain = Op.getOperand(0);
500 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get();
501 SDValue LHS = Op.getOperand(2);
502 SDValue RHS = Op.getOperand(3);
503 SDValue Dest = Op.getOperand(4);
514 SDValue LHS = Op.getOperand(0);
515 SDValue RHS = Op.getOperand(1);
516 SDValue TrueV = Op.getOperand(2);
517 SDValue FalseV = Op.getOperand(3);
518 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
lib/Target/Hexagon/HexagonISelDAGToDAG.cpp 582 SDValue Mul_0 = Shl_0.getOperand(0); // Val
583 SDValue Mul_1 = Shl_0.getOperand(1); // Const
599 SDValue Sub_0 = Shl_0.getOperand(0); // Const 0
600 SDValue Sub_1 = Shl_0.getOperand(1); // Val
604 SDValue Shl2_0 = Sub_1.getOperand(0); // Val
605 SDValue Shl2_1 = Sub_1.getOperand(1); // Const
992 return IsZero(Op.getOperand(1)) || IsZero(Op.getOperand(2));
992 return IsZero(Op.getOperand(1)) || IsZero(Op.getOperand(2));
1002 SDValue SC = SOp.getOperand(0);
1003 SDValue SX = SOp.getOperand(1);
1004 SDValue SY = SOp.getOperand(2);
1038 SDValue T0 = Off.getOperand(1);
1043 SDValue T1 = T0.getOperand(0);
1044 SDValue T2 = T0.getOperand(1);
1048 SDValue C = T1.getOperand(1);
1069 SDValue NewAdd = DAG.getNode(ISD::ADD, DL, VT, T1.getOperand(0), D);
1100 SDValue T0 = Addr.getOperand(1);
1108 SDValue S = T0.getOperand(0);
1111 ConstantSDNode *SN = dyn_cast<ConstantSDNode>(S.getOperand(1).getNode());
1119 ConstantSDNode *MN = dyn_cast<ConstantSDNode>(T0.getOperand(1).getNode());
1140 SDValue Y = S.getOperand(0);
1345 R = N.getOperand(0);
1376 SDValue N0 = N.getOperand(0);
1377 SDValue N1 = N.getOperand(1);
1384 SDValue Addr = N0.getOperand(0);
1405 R = N.getOperand(0);
1409 R = N.getOperand(0);
1445 ? N.getOperand(0).getValueType()
1446 : cast<VTSDNode>(N.getOperand(1))->getVT();
1449 R = N.getOperand(0);
1468 auto *S = dyn_cast<ConstantSDNode>(N.getOperand(1));
1502 const SDValue &Op0 = Val.getOperand(0);
1513 if (Val.getOperand(0).getValueType().isInteger()) {
1514 VTSDNode *T = cast<VTSDNode>(Val.getOperand(1));
1516 Src = Val.getOperand(0);
1524 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Val.getOperand(0))) {
1526 Src = Val.getOperand(1);
1530 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Val.getOperand(1))) {
1532 Src = Val.getOperand(0);
1542 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Val.getOperand(0))) {
1544 Src = Val.getOperand(1);
1548 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Val.getOperand(1))) {
1550 Src = Val.getOperand(0);
1733 !isa<ConstantSDNode>(Val.getOperand(1)) ||
1760 !isa<ConstantSDNode>(Val.getOperand(1)) ||
1790 ConstantSDNode *C = dyn_cast<ConstantSDNode>(Val.getOperand(i));
1800 if (!isa<ConstantSDNode>(Val.getOperand(1).getNode()))
1811 SDValue Ops[] = { V.getOperand(0), V.getOperand(1) };
1811 SDValue Ops[] = { V.getOperand(0), V.getOperand(1) };
1826 SDValue Ops[] = { V.getOperand(0), V.getOperand(1) };
1826 SDValue Ops[] = { V.getOperand(0), V.getOperand(1) };
2077 cast<GlobalAddressSDNode>(GA.Value.getOperand(0));
2202 ConstantSDNode *V1C = dyn_cast<ConstantSDNode>(NewRoot.getOperand(1));
2205 SDValue V0 = NewRoot.getOperand(0);
2252 Worklist.push_back(BasePtr.getOperand(0).getNode());
2253 Worklist.push_back(BasePtr.getOperand(1).getNode());
lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp 951 if (Addr.getOperand(0).getOpcode() == ISD::TargetConstantPool)
lib/Target/Hexagon/HexagonISelLowering.cpp 586 if (Op.getOperand(NumOps-1).getValueType() == MVT::Glue)
590 unsigned Flags = cast<ConstantSDNode>(Op.getOperand(i))->getZExtValue();
606 unsigned Reg = cast<RegisterSDNode>(Op.getOperand(i))->getReg();
625 SDValue Chain = Op.getOperand(0);
626 SDValue Addr = Op.getOperand(1);
640 SDValue Chain = Op.getOperand(0);
648 SDValue Chain = Op.getOperand(0);
649 unsigned IntNo = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
652 SDValue Addr = Op.getOperand(2);
663 SDValue Chain = Op.getOperand(0);
664 SDValue Size = Op.getOperand(1);
665 SDValue Align = Op.getOperand(2);
805 const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue();
806 return DAG.getStore(Op.getOperand(0), SDLoc(Op), Addr, Op.getOperand(1),
806 return DAG.getStore(Op.getOperand(0), SDLoc(Op), Addr, Op.getOperand(1),
812 SDValue LHS = Op.getOperand(0);
813 SDValue RHS = Op.getOperand(1);
814 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get();
839 SDValue Op = N.getOperand(0);
842 EVT OrigTy = cast<VTSDNode>(Op.getOperand(1))->getVT();
871 SDValue PredOp = Op.getOperand(0);
872 SDValue Op1 = Op.getOperand(1), Op2 = Op.getOperand(2);
872 SDValue Op1 = Op.getOperand(1), Op2 = Op.getOperand(2);
977 unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
999 unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
1011 return DAG.getNode(HexagonISD::BARRIER, dl, MVT::Other, Op.getOperand(0));
1900 SDValue Op1 = Addr.getOperand(1);
1902 return { Addr.getOperand(0), CN->getSExtValue() };
1922 SDValue Op0 = Op.getOperand(0);
1923 SDValue Op1 = Op.getOperand(1);
2039 if (auto *BVN = dyn_cast<BuildVectorSDNode>(Op.getOperand(1).getNode())) {
2055 return DAG.getNode(NewOpc, SDLoc(Op), ty(Op), Op.getOperand(0), S);
2069 if (isa<ConstantSDNode>(Op.getOperand(1).getNode()))
2077 SDValue InpV = Op.getOperand(0);
2474 Ops.push_back(Op.getOperand(i));
2528 return DAG.getNode(HexagonISD::COMBINE, dl, VecTy, Op.getOperand(1),
2529 Op.getOperand(0));
2535 MVT OpTy = ty(Op.getOperand(0));
2589 SDValue Vec = Op.getOperand(0);
2591 return extractVector(Vec, Op.getOperand(1), SDLoc(Op), ElemTy, ty(Op), DAG);
2597 return extractVector(Op.getOperand(0), Op.getOperand(1), SDLoc(Op),
2597 return extractVector(Op.getOperand(0), Op.getOperand(1), SDLoc(Op),
2604 return insertVector(Op.getOperand(0), Op.getOperand(1), Op.getOperand(2),
2604 return insertVector(Op.getOperand(0), Op.getOperand(1), Op.getOperand(2),
2604 return insertVector(Op.getOperand(0), Op.getOperand(1), Op.getOperand(2),
2611 SDValue ValV = Op.getOperand(1);
2612 return insertVector(Op.getOperand(0), ValV, Op.getOperand(2),
2612 return insertVector(Op.getOperand(0), ValV, Op.getOperand(2),
2733 {Load1, Load0, BaseNoOff.getOperand(0)});
2742 SDValue X = Op.getOperand(0), Y = Op.getOperand(1);
2742 SDValue X = Op.getOperand(0), Y = Op.getOperand(1);
2781 SDValue X = Op.getOperand(0), Y = Op.getOperand(1), C = Op.getOperand(2);
2781 SDValue X = Op.getOperand(0), Y = Op.getOperand(1), C = Op.getOperand(2);
2781 SDValue X = Op.getOperand(0), Y = Op.getOperand(1), C = Op.getOperand(2);
2797 SDValue Chain = Op.getOperand(0);
2798 SDValue Offset = Op.getOperand(1);
2799 SDValue Handler = Op.getOperand(2);
2935 SDValue P = Op.getOperand(0);
2948 SDValue Cond = Op.getOperand(0);
2950 SDValue C0 = Cond.getOperand(0), C1 = Cond.getOperand(1);
2950 SDValue C0 = Cond.getOperand(0), C1 = Cond.getOperand(1);
2953 Op.getOperand(2), Op.getOperand(1));
2953 Op.getOperand(2), Op.getOperand(1));
lib/Target/Hexagon/HexagonISelLoweringHVX.cpp 263 return VectorPair(Vec.getOperand(0), Vec.getOperand(1));
263 return VectorPair(Vec.getOperand(0), Vec.getOperand(1));
422 SDValue T = V.getOperand(0);
426 ConstantSDNode *C = dyn_cast<ConstantSDNode>(V.getOperand(1));
1027 Ops.push_back(Op.getOperand(i));
1072 V.getOperand(0), V.getOperand(1)),
1072 V.getOperand(0), V.getOperand(1)),
1092 SDValue Op0 = Op.getOperand(0);
1098 return DAG.getNode(HexagonISD::QCAT, dl, VecTy, Op0, Op.getOperand(1));
1122 unsigned InpLen = ty(Op.getOperand(0)).getVectorNumElements();
1137 SDValue VecV = Op.getOperand(0);
1140 SDValue IdxV = Op.getOperand(1);
1151 SDValue VecV = Op.getOperand(0);
1152 SDValue ValV = Op.getOperand(1);
1153 SDValue IdxV = Op.getOperand(2);
1164 SDValue SrcV = Op.getOperand(0);
1167 SDValue IdxV = Op.getOperand(1);
1184 SDValue VecV = Op.getOperand(0);
1185 SDValue ValV = Op.getOperand(1);
1186 SDValue IdxV = Op.getOperand(2);
1204 SDValue InpV = Op.getOperand(0);
1214 SDValue InpV = Op.getOperand(0);
1224 SDValue InpV = Op.getOperand(0);
1237 SDValue InpV = Op.getOperand(0);
1275 SDValue Vs = Op.getOperand(0);
1276 SDValue Vt = Op.getOperand(1);
1329 SDValue Vs = Op.getOperand(0);
1330 SDValue Vt = Op.getOperand(1);
1431 Op.getOperand(0));
1594 SDValue Cond = Op.getOperand(0);
1596 SDValue C0 = Cond.getOperand(0), C1 = Cond.getOperand(1);
1596 SDValue C0 = Cond.getOperand(0), C1 = Cond.getOperand(1);
1599 Op.getOperand(2), Op.getOperand(1));
1599 Op.getOperand(2), Op.getOperand(1));
lib/Target/Lanai/LanaiISelDAGToDAG.cpp 114 Addr.getOperand(1).getOpcode() == LanaiISD::SMALL) {
115 Offset = Addr.getOperand(1).getOperand(0);
115 Offset = Addr.getOperand(1).getOperand(0);
172 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1)))
177 dyn_cast<FrameIndexSDNode>(Addr.getOperand(0))) {
182 Base = Addr.getOperand(0);
192 Addr.getOperand(1).getOpcode() == LanaiISD::SMALL)
227 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1)))
232 if (Addr.getOperand(0).getOpcode() == LanaiISD::HI ||
233 Addr.getOperand(0).getOpcode() == LanaiISD::LO ||
234 Addr.getOperand(0).getOpcode() == LanaiISD::SMALL ||
235 Addr.getOperand(1).getOpcode() == LanaiISD::HI ||
236 Addr.getOperand(1).getOpcode() == LanaiISD::LO ||
237 Addr.getOperand(1).getOpcode() == LanaiISD::SMALL)
241 R1 = Addr.getOperand(0);
242 R2 = Addr.getOperand(1);
lib/Target/Lanai/LanaiISelLowering.cpp 867 SDValue Chain = Op.getOperand(0);
868 SDValue Cond = Op.getOperand(1);
869 SDValue LHS = Op.getOperand(2);
870 SDValue RHS = Op.getOperand(3);
871 SDValue Dest = Op.getOperand(4);
970 SDValue LHS = Op.getOperand(0);
971 SDValue RHS = Op.getOperand(1);
972 SDValue Cond = Op.getOperand(2);
985 SDValue LHS = Op.getOperand(0);
986 SDValue RHS = Op.getOperand(1);
987 SDValue TrueV = Op.getOperand(2);
988 SDValue FalseV = Op.getOperand(3);
989 SDValue Cond = Op.getOperand(4);
1012 const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue();
1013 return DAG.getStore(Op.getOperand(0), DL, FI, Op.getOperand(1),
1013 return DAG.getStore(Op.getOperand(0), DL, FI, Op.getOperand(1),
1019 SDValue Chain = Op.getOperand(0);
1020 SDValue Size = Op.getOperand(1);
1060 unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
1083 unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
1241 SDValue ShOpLo = Op.getOperand(0);
1242 SDValue ShOpHi = Op.getOperand(1);
1243 SDValue ShAmt = Op.getOperand(2);
1289 SDValue ShOpLo = Op.getOperand(0);
1290 SDValue ShOpHi = Op.getOperand(1);
1291 SDValue ShAmt = Op.getOperand(2);
lib/Target/MSP430/MSP430ISelDAGToDAG.cpp 144 SDValue N0 = N.getOperand(0);
224 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
228 if (!MatchAddress(N.getOperand(0), AM) &&
232 CurDAG->MaskedValueIsZero(N.getOperand(0), CN->getAPIntValue())) {
lib/Target/MSP430/MSP430ISelLowering.cpp 1114 SDValue Chain = Op.getOperand(0);
1115 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get();
1116 SDValue LHS = Op.getOperand(2);
1117 SDValue RHS = Op.getOperand(3);
1118 SDValue Dest = Op.getOperand(4);
1129 SDValue LHS = Op.getOperand(0);
1130 SDValue RHS = Op.getOperand(1);
1143 LHS.getOperand(0).getOpcode() == ISD::AND))) {
1147 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get();
1206 SDValue LHS = Op.getOperand(0);
1207 SDValue RHS = Op.getOperand(1);
1208 SDValue TrueV = Op.getOperand(2);
1209 SDValue FalseV = Op.getOperand(3);
1210 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
1224 SDValue Val = Op.getOperand(0);
1261 unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
1287 unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
1305 const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue();
1308 return DAG.getStore(Op.getOperand(0), SDLoc(Op), FrameIndex, Op.getOperand(1),
1308 return DAG.getStore(Op.getOperand(0), SDLoc(Op), FrameIndex, Op.getOperand(1),
lib/Target/Mips/Mips16ISelDAGToDAG.cpp 113 Base = Addr.getOperand(0);
114 Offset = Addr.getOperand(1);
124 ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1));
129 dyn_cast<FrameIndexSDNode>(Addr.getOperand(0))) {
136 Base = Addr.getOperand(0);
151 if (Addr.getOperand(1).getOpcode() == MipsISD::Lo ||
152 Addr.getOperand(1).getOpcode() == MipsISD::GPRel) {
153 SDValue Opnd0 = Addr.getOperand(1).getOperand(0);
153 SDValue Opnd0 = Addr.getOperand(1).getOperand(0);
156 Base = Addr.getOperand(0);
lib/Target/Mips/MipsISelLowering.cpp 649 SDValue LHS = Op.getOperand(0);
654 SDValue RHS = Op.getOperand(1);
659 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get();
668 ConstantSDNode *CC = cast<ConstantSDNode>(Cond.getOperand(2));
685 !SetCC.getOperand(0).getValueType().isInteger())
709 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC.getOperand(2))->get();
712 SetCC = DAG.getSetCC(DL, SetCC.getValueType(), SetCC.getOperand(0),
713 SetCC.getOperand(1), ISD::getSetCCInverse(CC, true));
745 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC.getOperand(2))->get();
746 SetCC = DAG.getSetCC(DL, SetCC.getValueType(), SetCC.getOperand(0),
747 SetCC.getOperand(1), ISD::getSetCCInverse(CC, true));
810 if (!(CN = dyn_cast<ConstantSDNode>(FirstOperand.getOperand(1))))
821 NewOperand = FirstOperand.getOperand(0);
830 if (!(CN = dyn_cast<ConstantSDNode>(FirstOperand.getOperand(1))))
839 NewOperand = FirstOperand.getOperand(0);
882 if (!(CN = dyn_cast<ConstantSDNode>(And0.getOperand(1))) ||
888 And1.getOperand(0).getOpcode() == ISD::SHL) {
890 if (!(CN = dyn_cast<ConstantSDNode>(And1.getOperand(1))) ||
898 SDValue Shl = And1.getOperand(0);
900 if (!(CN = dyn_cast<ConstantSDNode>(Shl.getOperand(1))))
912 return DAG.getNode(MipsISD::Ins, DL, ValTy, Shl.getOperand(0),
915 And0.getOperand(0));
1088 SDValue Lo = Add.getOperand(1);
1091 (Lo.getOperand(0).getOpcode() != ISD::TargetJumpTable))
1098 Add.getOperand(0));
1135 if (!(CN = dyn_cast<ConstantSDNode>(FirstOperand.getOperand(1))) ||
1144 NewOperand = FirstOperand.getOperand(0);
1904 SDValue Chain = Op.getOperand(0);
1905 SDValue Dest = Op.getOperand(2);
1909 SDValue CondRes = createFPCmp(DAG, Op.getOperand(1));
1915 SDValue CCNode = CondRes.getOperand(2);
1929 SDValue Cond = createFPCmp(DAG, Op.getOperand(0));
1935 return createCMovFP(DAG, Cond, Op.getOperand(1), Op.getOperand(2),
1935 return createCMovFP(DAG, Cond, Op.getOperand(1), Op.getOperand(2),
2140 const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue();
2141 return DAG.getStore(Op.getOperand(0), DL, FI, Op.getOperand(1),
2141 return DAG.getStore(Op.getOperand(0), DL, FI, Op.getOperand(1),
2205 EVT TyX = Op.getOperand(0).getValueType();
2206 EVT TyY = Op.getOperand(1).getValueType();
2215 DAG.getNode(ISD::BITCAST, DL, MVT::i32, Op.getOperand(0)) :
2216 DAG.getNode(MipsISD::ExtractElementF64, DL, MVT::i32, Op.getOperand(0),
2219 DAG.getNode(ISD::BITCAST, DL, MVT::i32, Op.getOperand(1)) :
2220 DAG.getNode(MipsISD::ExtractElementF64, DL, MVT::i32, Op.getOperand(1),
2242 return DAG.getNode(ISD::BITCAST, DL, Op.getOperand(0).getValueType(), Res);
2245 Op.getOperand(0),
2252 unsigned WidthX = Op.getOperand(0).getValueSizeInBits();
2253 unsigned WidthY = Op.getOperand(1).getValueSizeInBits();
2259 SDValue X = DAG.getNode(ISD::BITCAST, DL, TyX, Op.getOperand(0));
2260 SDValue Y = DAG.getNode(ISD::BITCAST, DL, TyY, Op.getOperand(1));
2276 return DAG.getNode(ISD::BITCAST, DL, Op.getOperand(0).getValueType(), I);
2297 return DAG.getNode(ISD::BITCAST, DL, Op.getOperand(0).getValueType(), Or);
2316 ? DAG.getNode(ISD::BITCAST, DL, MVT::i32, Op.getOperand(0))
2318 Op.getOperand(0), Const1);
2340 DAG.getNode(MipsISD::ExtractElementF64, DL, MVT::i32, Op.getOperand(0),
2351 SDValue X = DAG.getNode(ISD::BITCAST, DL, MVT::i64, Op.getOperand(0));
2376 if (cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue() != 0) {
2397 if (cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue() != 0) {
2424 SDValue Chain = Op.getOperand(0);
2425 SDValue Offset = Op.getOperand(1);
2426 SDValue Handler = Op.getOperand(2);
2448 return DAG.getNode(MipsISD::Sync, DL, MVT::Other, Op.getOperand(0),
2457 SDValue Lo = Op.getOperand(0), Hi = Op.getOperand(1);
2457 SDValue Lo = Op.getOperand(0), Hi = Op.getOperand(1);
2458 SDValue Shamt = Op.getOperand(2);
2486 SDValue Lo = Op.getOperand(0), Hi = Op.getOperand(1);
2486 SDValue Lo = Op.getOperand(0), Hi = Op.getOperand(1);
2487 SDValue Shamt = Op.getOperand(2);
2672 Val.getOperand(0));
2709 Op.getOperand(0));
2992 const SDValue TargetAddr = Node->getOperand(0).getOperand(1);
lib/Target/Mips/MipsSEISelDAGToDAG.cpp 283 ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1));
289 dyn_cast<FrameIndexSDNode>(Addr.getOperand(0)))
292 Base = Addr.getOperand(0);
318 Base = Addr.getOperand(0);
319 Offset = Addr.getOperand(1);
343 if (Addr.getOperand(1).getOpcode() == MipsISD::Lo ||
344 Addr.getOperand(1).getOpcode() == MipsISD::GPRel) {
345 SDValue Opnd0 = Addr.getOperand(1).getOperand(0);
345 SDValue Opnd0 = Addr.getOperand(1).getOperand(0);
348 Base = Addr.getOperand(0);
lib/Target/Mips/MipsSEISelLowering.cpp 990 SetCC.getOperand(0), SetCC.getOperand(1),
990 SetCC.getOperand(0), SetCC.getOperand(1),
991 N->getOperand(1), N->getOperand(2), SetCC.getOperand(2));
1235 MVT Src = Op.getOperand(0).getValueType().getSimpleVT();
1241 Op.getOperand(0), DAG.getIntPtrConstant(0, DL));
1243 Op.getOperand(0), DAG.getIntPtrConstant(1, DL));
1250 DAG.getNode(MipsISD::ExtractElementF64, DL, MVT::i32, Op.getOperand(0),
1253 DAG.getNode(MipsISD::ExtractElementF64, DL, MVT::i32, Op.getOperand(0),
1268 EVT Ty = Op.getOperand(0).getValueType();
1271 Op.getOperand(0), Op.getOperand(1));
1271 Op.getOperand(0), Op.getOperand(1));
lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp 732 SDValue GlobalVal = Wrapper.getOperand(0);
3590 Address = N.getOperand(0);
3598 return SelectDirectAddr(CastN->getOperand(0).getOperand(0), Address);
3607 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1))) {
3608 SDValue base = Addr.getOperand(0);
3644 if (SelectDirectAddr(Addr.getOperand(0), Addr)) {
3647 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1))) {
3649 dyn_cast<FrameIndexSDNode>(Addr.getOperand(0)))
3653 Base = Addr.getOperand(0);
lib/Target/NVPTX/NVPTXISelLowering.cpp 1969 SDValue ShOpLo = Op.getOperand(0);
1970 SDValue ShOpHi = Op.getOperand(1);
1971 SDValue ShAmt = Op.getOperand(2);
2030 SDValue ShOpLo = Op.getOperand(0);
2031 SDValue ShOpHi = Op.getOperand(1);
2032 SDValue ShAmt = Op.getOperand(2);
2099 SDValue A = Op.getOperand(0);
2140 SDValue A = Op.getOperand(0);
4366 N0.getOperand(0), N0.getOperand(1), N1);
4366 N0.getOperand(0), N0.getOperand(1), N1);
4408 const SDNode *left = N0.getOperand(0).getNode();
4409 const SDNode *right = N0.getOperand(1).getNode();
4439 N0.getOperand(0), N0.getOperand(1), N1);
4439 N0.getOperand(0), N0.getOperand(1), N1);
4586 EVT OrigVT = Op.getOperand(0).getValueType();
4592 EVT OrigVT = Op.getOperand(0).getValueType();
lib/Target/PowerPC/PPCISelDAGToDAG.cpp 663 SDValue Ops[] = {ST->getValue(), Base.getOperand(0), Base.getOperand(1),
663 SDValue Ops[] = {ST->getValue(), Base.getOperand(0), Base.getOperand(1),
705 SDValue Ops[] = {Base.getOperand(0), Base.getOperand(1), Chain};
705 SDValue Ops[] = {Base.getOperand(0), Base.getOperand(1), Chain};
735 if (Op0.getOperand(0).getOpcode() == ISD::SHL ||
736 Op0.getOperand(0).getOpcode() == ISD::SRL) {
737 if (Op1.getOperand(0).getOpcode() != ISD::SHL &&
738 Op1.getOperand(0).getOpcode() != ISD::SRL) {
745 if (Op1Opc == ISD::AND && Op1.getOperand(0).getOpcode() != ISD::SHL &&
746 Op1.getOperand(0).getOpcode() != ISD::SRL) {
756 isInt32Immediate(Op1.getOperand(1), Value)) {
757 Op1 = Op1.getOperand(0);
764 KnownBits MKnown = CurDAG->computeKnownBits(Op1.getOperand(1));
767 unsigned SHOpc = Op1.getOperand(0).getOpcode();
769 isInt32Immediate(Op1.getOperand(0).getOperand(1), Value)) {
769 isInt32Immediate(Op1.getOperand(0).getOperand(1), Value)) {
772 Op1 = Op1.getOperand(0).getOperand(0);
772 Op1 = Op1.getOperand(0).getOperand(0);
1228 if (isa<ConstantSDNode>(V.getOperand(1))) {
1231 const auto &LHSBits = *getValueBits(V.getOperand(0), NumBits).second;
1240 if (isa<ConstantSDNode>(V.getOperand(1))) {
1243 const auto &LHSBits = *getValueBits(V.getOperand(0), NumBits).second;
1255 if (isa<ConstantSDNode>(V.getOperand(1))) {
1258 const auto &LHSBits = *getValueBits(V.getOperand(0), NumBits).second;
1270 if (isa<ConstantSDNode>(V.getOperand(1))) {
1278 std::tie(Interesting, LHSBits) = getValueBits(V.getOperand(0), NumBits);
1296 const auto &LHSBits = *getValueBits(V.getOperand(0), NumBits).second;
1297 const auto &RHSBits = *getValueBits(V.getOperand(1), NumBits).second;
1346 V.getOperand(0).getValueType() != MVT::i32)
1351 std::tie(Interesting, LHSBits) = getValueBits(V.getOperand(0),
1363 EVT FromType = V.getOperand(0).getValueType();
1370 std::tie(Interesting, InBits) = getValueBits(V.getOperand(0),
1394 std::tie(Interesting, LHSBits) = getValueBits(V.getOperand(0),
1397 EVT FromType = cast<VTSDNode>(V.getOperand(1))->getVT();
2583 SDValue LHS = LoweredLogical.getOperand(0);
2584 SDValue RHS = LoweredLogical.getOperand(1);
2591 LoweredLogical.getOperand(0).getMachineOpcode() == PPC::INSERT_SUBREG)
2592 OpToConvToRecForm = LoweredLogical.getOperand(0).getOperand(1);
2592 OpToConvToRecForm = LoweredLogical.getOperand(0).getOperand(1);
2595 OpToConvToRecForm = LoweredLogical.getOperand(0);
2616 Ops.push_back(OpToConvToRecForm.getOperand(i));
2671 SDValue InputOp = Operand.getOperand(0);
2681 LHS = getLogicOperand(LogicOp.getOperand(0));
2682 RHS = getLogicOperand(LogicOp.getOperand(1));
2727 (Input.getOperand(0).getOpcode() == ISD::AssertSext ||
2728 Input.getOperand(0).getOpcode() == ISD::SIGN_EXTEND))
2762 (Input.getOperand(0).getOpcode() == ISD::AssertZext ||
2763 Input.getOperand(0).getOpcode() == ISD::ZERO_EXTEND);
3587 SDValue LHS = Compare.getOperand(0);
3588 SDValue RHS = Compare.getOperand(1);
3593 cast<CondCodeSDNode>(Compare.getOperand(CCOpNum))->get();
4179 AddrOp.getOpcode() == ISD::ADD ? AddrOp.getOperand(0) :
4195 return isIntS16Immediate(AddrOp.getOperand(1), Imm) && !(Imm % Val);
4238 SDValue SetOrSelCC = InnerIsSel ? FalseRes : FalseRes.getOperand(0);
4254 SDValue InnerLHS = SetOrSelCC.getOperand(0);
4255 SDValue InnerRHS = SetOrSelCC.getOperand(1);
4257 cast<CondCodeSDNode>(SetOrSelCC.getOperand(InnerIsSel ? 4 : 2))->get();
4262 dyn_cast<ConstantSDNode>(SetOrSelCC.getOperand(2));
4264 dyn_cast<ConstantSDNode>(SetOrSelCC.getOperand(3));
4576 SDValue Val = N->getOperand(0).getOperand(0);
4601 auto Op0 = Val.getOperand(0);
4603 isInt32Immediate(Op0.getOperand(1).getNode(), Imm) && Imm <= MB) {
4611 ResultType, IDVal, Op0.getOperand(0),
4623 isInt32Immediate(Val.getOperand(1).getNode(), Imm) && Imm <= MB) {
4625 Val = Val.getOperand(0);
4656 isInt32Immediate(N->getOperand(0).getOperand(1), Imm2)) {
4671 SDValue Ops[] = { N->getOperand(0).getOperand(0),
4672 N->getOperand(0).getOperand(1),
4759 SDValue Ops[] = { N->getOperand(0).getOperand(0),
4773 SDValue Ops[] = { N->getOperand(0).getOperand(0),
4951 isa<LoadSDNode>(Op1.getOperand(0))) {
4952 LoadSDNode *LD = cast<LoadSDNode>(Op1.getOperand(0));
5270 ISD::CondCode CC = cast<CondCodeSDNode>(O.getOperand(4))->get();
5272 if (!isa<ConstantSDNode>(O.getOperand(2)) ||
5273 !isa<ConstantSDNode>(O.getOperand(3)))
5289 if (!isa<ConstantSDNode>(O.getOperand(1)) ||
5291 SDValue Op0 = O.getOperand(0), Op1 = O.getOperand(1);
5291 SDValue Op0 = O.getOperand(0), Op1 = O.getOperand(1);
5293 Op0 = Op0.getOperand(0);
5295 Op1 = Op1.getOperand(0);
5298 Op0.getOperand(1) == Op1.getOperand(1) && CC == ISD::SETEQ &&
5298 Op0.getOperand(1) == Op1.getOperand(1) && CC == ISD::SETEQ &&
5299 isa<ConstantSDNode>(Op0.getOperand(1))) {
5307 LHS = Op0.getOperand(0);
5308 RHS = Op1.getOperand(0);
5321 isa<ConstantSDNode>(O.getOperand(1))) {
5334 LHS = Op0.getOperand(0);
5335 RHS = Op0.getOperand(1);
5345 SDValue Op = O.getOperand(0);
5347 if (!isa<ConstantSDNode>(Op.getOperand(1)))
5352 SDValue XOR = Op.getOperand(0);
5354 XOR = XOR.getOperand(0);
5358 LHS = XOR.getOperand(0);
5359 RHS = XOR.getOperand(1);
5362 if (!isa<ConstantSDNode>(Op.getOperand(1)))
5370 SDValue XOR = Op.getOperand(0);
5372 XOR = XOR.getOperand(0);
5376 LHS = XOR.getOperand(0);
5377 RHS = XOR.getOperand(1);
5669 Op.getOperand(0) == Op.getOperand(1))
5669 Op.getOperand(0) == Op.getOperand(1))
5696 Op.getOperand(0) == Op.getOperand(1))
5696 Op.getOperand(0) == Op.getOperand(1))
5725 getOperand(0));
5731 getOperand(0));
5763 getOperand(0),
5769 getOperand(0),
5797 getOperand(0));
5803 getOperand(0));
5836 getOperand(0),
5843 getOperand(0));
5870 getOperand(0),
5876 getOperand(0),
5910 getOperand(0),
5917 getOperand(0));
5946 getOperand(0),
5953 getOperand(0));
5982 getOperand(0),
5989 getOperand(0));
6019 getOperand(0),
6031 getOperand(0),
6118 if (!PeepholePPC64ZExtGather(Op32.getOperand(0), ToPromote1))
6133 if (!PeepholePPC64ZExtGather(Op32.getOperand(B+0), ToPromote1))
6135 if (!PeepholePPC64ZExtGather(Op32.getOperand(B+1), ToPromote1))
6149 if (!PeepholePPC64ZExtGather(Op32.getOperand(0), ToPromote1))
6164 PeepholePPC64ZExtGather(Op32.getOperand(0), ToPromote1);
6166 PeepholePPC64ZExtGather(Op32.getOperand(1), ToPromote2);
6188 PeepholePPC64ZExtGather(Op32.getOperand(0), ToPromote1);
6244 SDValue IDef = ISR.getOperand(0);
6320 SDValue ReplOpOps[] = { ISR.getOperand(0), V, ISR.getOperand(2) };
6320 SDValue ReplOpOps[] = { ISR.getOperand(0), V, ISR.getOperand(2) };
6462 (!isa<ConstantSDNode>(Base.getOperand(1)) ||
6477 SDValue ImmOpnd = Base.getOperand(1);
6490 SDValue HBase = Base.getOperand(0);
6508 SDValue HImmOpnd = HBase.getOperand(1);
6571 Base.getOperand(0), N->getOperand(3));
6573 (void)CurDAG->UpdateNodeOperands(N, ImmOpnd, Base.getOperand(0),
6577 (void)CurDAG->UpdateNodeOperands(HBase.getNode(), HBase.getOperand(0),
lib/Target/PowerPC/PPCISelLowering.cpp 1449 if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(Op.getOperand(1)))
2266 Base = N.getOperand(0);
2267 Index = N.getOperand(1);
2290 if (isIntS16Immediate(N.getOperand(1), imm) &&
2293 if (N.getOperand(1).getOpcode() == PPCISD::Lo)
2296 Base = N.getOperand(0);
2297 Index = N.getOperand(1);
2300 if (isIntS16Immediate(N.getOperand(1), imm) &&
2307 KnownBits LHSKnown = DAG.computeKnownBits(N.getOperand(0));
2310 KnownBits RHSKnown = DAG.computeKnownBits(N.getOperand(1));
2314 Base = N.getOperand(0);
2315 Index = N.getOperand(1);
2380 if (isIntS16Immediate(N.getOperand(1), imm) &&
2383 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(N.getOperand(0))) {
2387 Base = N.getOperand(0);
2390 } else if (N.getOperand(1).getOpcode() == PPCISD::Lo) {
2392 assert(!cast<ConstantSDNode>(N.getOperand(1).getOperand(1))->getZExtValue()
2392 assert(!cast<ConstantSDNode>(N.getOperand(1).getOperand(1))->getZExtValue()
2394 Disp = N.getOperand(1).getOperand(0); // The global address.
2394 Disp = N.getOperand(1).getOperand(0); // The global address.
2399 Base = N.getOperand(0);
2404 if (isIntS16Immediate(N.getOperand(1), imm) &&
2409 KnownBits LHSKnown = DAG.computeKnownBits(N.getOperand(0));
2415 dyn_cast<FrameIndexSDNode>(N.getOperand(0))) {
2419 Base = N.getOperand(0);
2483 (!isIntS16Immediate(N.getOperand(1), imm) ||
2484 !N.getOperand(1).hasOneUse() || !N.getOperand(0).hasOneUse())) {
2484 !N.getOperand(1).hasOneUse() || !N.getOperand(0).hasOneUse())) {
2485 Base = N.getOperand(0);
2486 Index = N.getOperand(1);
2976 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get();
2982 if (Op.getOperand(0).getValueType() == MVT::v2i64) {
2988 DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, Op.getOperand(0)),
2989 DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, Op.getOperand(1)),
3006 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
3019 EVT LHSVT = Op.getOperand(0).getValueType();
3022 SDValue Sub = DAG.getNode(ISD::XOR, dl, LHSVT, Op.getOperand(0),
3023 Op.getOperand(1));
3133 return DAG.getMemcpy(Op.getOperand(0), Op,
3134 Op.getOperand(1), Op.getOperand(2),
3134 Op.getOperand(1), Op.getOperand(2),
3141 return Op.getOperand(0);
3146 SDValue Chain = Op.getOperand(0);
3147 SDValue Trmp = Op.getOperand(1); // trampoline
3148 SDValue FPtr = Op.getOperand(2); // nested function
3149 SDValue Nest = Op.getOperand(3); // 'nest' parameter value
3191 const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue();
3192 return DAG.getStore(Op.getOperand(0), dl, FR, Op.getOperand(1),
3192 return DAG.getStore(Op.getOperand(0), dl, FR, Op.getOperand(1),
3236 const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue();
3240 DAG.getTruncStore(Op.getOperand(0), dl, ArgGPR, Op.getOperand(1),
3240 DAG.getTruncStore(Op.getOperand(0), dl, ArgGPR, Op.getOperand(1),
3243 SDValue nextPtr = DAG.getNode(ISD::ADD, dl, PtrVT, Op.getOperand(1),
6979 SDValue Chain = Op.getOperand(0);
7001 SDValue Chain = Op.getOperand(0);
7002 SDValue SaveSP = Op.getOperand(1);
7063 SDValue Chain = Op.getOperand(0);
7064 SDValue Size = Op.getOperand(1);
7096 Op.getOperand(0), Op.getOperand(1));
7096 Op.getOperand(0), Op.getOperand(1));
7103 Op.getOperand(0), Op.getOperand(1));
7103 Op.getOperand(0), Op.getOperand(1));
7132 if (Op.getOperand(1).getValueType().isVector())
7135 assert(Op.getOperand(1).getValueType() == MVT::i1 &&
7160 Op.getOperand(0));
7188 SDValue N1 = Op.getOperand(0);
7222 if (!Op.getOperand(0).getValueType().isFloatingPoint() ||
7223 !Op.getOperand(2).getValueType().isFloatingPoint())
7235 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
7238 EVT CmpVT = Op.getOperand(0).getValueType();
7239 SDValue LHS = Op.getOperand(0), RHS = Op.getOperand(1);
7239 SDValue LHS = Op.getOperand(0), RHS = Op.getOperand(1);
7240 SDValue TV = Op.getOperand(2), FV = Op.getOperand(3);
7240 SDValue TV = Op.getOperand(2), FV = Op.getOperand(3);
7348 assert(Op.getOperand(0).getValueType().isFloatingPoint());
7349 SDValue Src = Op.getOperand(0);
7411 assert(Op.getOperand(0).getValueType().isFloatingPoint());
7412 SDValue Src = Op.getOperand(0);
7449 if (Op.getOperand(0).getValueType() == MVT::ppcf128) {
7453 MVT::f64, Op.getOperand(0),
7456 MVT::f64, Op.getOperand(0),
7473 Op.getOperand(0), Tmp);
7478 Op.getOperand(0));
7479 return DAG.getSelectCC(dl, Op.getOperand(0), Tmp, True, False,
7514 Op.getOperand(0).getValueType())) {
7572 SDNode *Origin = Op.getOperand(0).getNode();
7610 SDValue Src = Op.getOperand(0);
7662 SDValue Wide = widenVec(DAG, Op.getOperand(0), dl);
7690 DAG.getValueType(Op.getOperand(0).getValueType()));
7701 EVT InVT = Op.getOperand(0).getValueType();
7711 if (Subtarget.hasQPX() && Op.getOperand(0).getValueType() == MVT::v4i1) {
7715 SDValue Value = Op.getOperand(0);
7736 if (Op.getOperand(0).getValueType() == MVT::i1)
7737 return DAG.getNode(ISD::SELECT, dl, Op.getValueType(), Op.getOperand(0),
7761 if (Op.getOperand(0).getValueType() == MVT::i64) {
7762 SDValue SINT = Op.getOperand(0);
7841 SINT.getOperand(0).getValueType() == MVT::i32) {
7849 DAG.getStore(DAG.getEntryNode(), dl, SINT.getOperand(0), FIdx,
7881 assert(Op.getOperand(0).getValueType() == MVT::i32 &&
7895 if (!(ReusingLoad = canReuseLoadAddress(Op.getOperand(0), MVT::i32, RLI,
7901 DAG.getStore(DAG.getEntryNode(), dl, Op.getOperand(0), FIdx,
7933 Op.getOperand(0));
8022 VT == Op.getOperand(1).getValueType() &&
8027 SDValue Lo = Op.getOperand(0);
8028 SDValue Hi = Op.getOperand(1);
8029 SDValue Amt = Op.getOperand(2);
8051 VT == Op.getOperand(1).getValueType() &&
8056 SDValue Lo = Op.getOperand(0);
8057 SDValue Hi = Op.getOperand(1);
8058 SDValue Amt = Op.getOperand(2);
8080 VT == Op.getOperand(1).getValueType() &&
8084 SDValue Lo = Op.getOperand(0);
8085 SDValue Hi = Op.getOperand(1);
8086 SDValue Amt = Op.getOperand(2);
8212 V->getOperand(i).getOperand(0).getOpcode() == ISD::LOAD) ||
8214 V->getOperand(i).getOperand(0).getOpcode() == ISD::LOAD) ||
8216 V->getOperand(i).getOperand(0).getOpcode() == ISD::LOAD))
8236 (Op0.getOperand(0).getValueType() != MVT::i64) ||
8237 (Op0.getOperand(1).getValueType() != MVT::i64))
8240 return DAG.getNode(PPCISD::BUILD_FP128, dl, MVT::f128, Op0.getOperand(0),
8241 Op0.getOperand(1));
8247 InputLoad = &InputLoad->getOperand(0);
8249 InputLoad = &InputLoad->getOperand(0);
8379 const SDValue *InputLoad = getNormalLoadInput(Op.getOperand(0));
8883 SDValue V1 = Op.getOperand(0);
8884 SDValue V2 = Op.getOperand(1);
9199 cast<ConstantSDNode>(Intrin.getOperand(0))->getZExtValue();
9445 cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
9465 SDValue Tmp = DAG.getNode(PPCISD::VCMP, dl, Op.getOperand(2).getValueType(),
9466 Op.getOperand(1), Op.getOperand(2),
9466 Op.getOperand(1), Op.getOperand(2),
9473 Op.getOperand(2), // LHS
9474 Op.getOperand(3), // RHS
9477 EVT VTs[] = { Op.getOperand(2).getValueType(), MVT::Glue };
9489 switch (cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue()) {
9523 int ArgStart = isa<ConstantSDNode>(Op.getOperand(0)) ? 0 : 1;
9525 switch (cast<ConstantSDNode>(Op.getOperand(ArgStart))->getZExtValue()) {
9531 Op.getOperand(ArgStart + 1)),
9532 Op.getOperand(0)),
9543 for (auto UI : Op.getOperand(1)->uses()) {
9546 if (UI->getOperand(0) == Op.getOperand(0) &&
9547 UI->getOperand(1) == Op.getOperand(1))
9557 Op = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v2i64, Op.getOperand(0),
9558 Op.getOperand(0));
9582 SDValue CmpOp = Op.getOperand(2);
9616 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Op.getOperand(0), FIdx,
9627 ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(2));
9634 SDValue V1 = Op.getOperand(0);
9635 SDValue V2 = Op.getOperand(1);
9928 SDValue LHS = Op.getOperand(0), RHS = Op.getOperand(1);
9928 SDValue LHS = Op.getOperand(0), RHS = Op.getOperand(1);
9953 SDValue LHS = Op.getOperand(0), RHS = Op.getOperand(1);
9953 SDValue LHS = Op.getOperand(0), RHS = Op.getOperand(1);
9960 SDValue LHS = Op.getOperand(0), RHS = Op.getOperand(1);
9960 SDValue LHS = Op.getOperand(0), RHS = Op.getOperand(1);
10016 SDValue X = Op.getOperand(0);
10042 Op.getOperand(0).getValueType() != MVT::v2f32)
10046 SDValue Op0 = Op.getOperand(0);
10056 if (Op0.getOperand(0).getValueType() != MVT::v4f32)
10060 int Idx = cast<ConstantSDNode>(Op0.getOperand(1))->getZExtValue();
10073 Op0.getOperand(0), DAG.getConstant(DWord, dl, MVT::i32));
10081 SDValue LdOp = Op0.getOperand(i);
11712 Base = Loc.getOperand(0);
11713 Offset += cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue();
11717 getBaseWithConstantOffset(Loc.getOperand(0), Base, Offset, DAG);
12108 N->getOperand(i).getOperand(0).getValueType() == MVT::i1) ||
12136 if (((BinOp.getOperand(i).getOpcode() == ISD::SIGN_EXTEND ||
12137 BinOp.getOperand(i).getOpcode() == ISD::ZERO_EXTEND ||
12138 BinOp.getOperand(i).getOpcode() == ISD::ANY_EXTEND) &&
12139 BinOp.getOperand(i).getOperand(0).getValueType() == MVT::i1) ||
12139 BinOp.getOperand(i).getOperand(0).getValueType() == MVT::i1) ||
12140 isa<ConstantSDNode>(BinOp.getOperand(i))) {
12141 Inputs.push_back(BinOp.getOperand(i));
12142 } else if (BinOp.getOperand(i).getOpcode() == ISD::AND ||
12143 BinOp.getOperand(i).getOpcode() == ISD::OR ||
12144 BinOp.getOperand(i).getOpcode() == ISD::XOR ||
12145 BinOp.getOperand(i).getOpcode() == ISD::SELECT ||
12146 BinOp.getOperand(i).getOpcode() == ISD::SELECT_CC ||
12147 BinOp.getOperand(i).getOpcode() == ISD::TRUNCATE ||
12148 BinOp.getOperand(i).getOpcode() == ISD::SIGN_EXTEND ||
12149 BinOp.getOperand(i).getOpcode() == ISD::ZERO_EXTEND ||
12150 BinOp.getOperand(i).getOpcode() == ISD::ANY_EXTEND) {
12151 BinOps.push_back(BinOp.getOperand(i));
12221 DAG.ReplaceAllUsesOfValueWith(Inputs[i], Inputs[i].getOperand(0));
12241 if (!isa<ConstantSDNode>(PromOp.getOperand(0)) &&
12242 PromOp.getOperand(0).getValueType() != MVT::i1) {
12248 SDValue RepValue = PromOp.getOperand(0);
12263 if ((!isa<ConstantSDNode>(PromOp.getOperand(C)) &&
12264 PromOp.getOperand(C).getValueType() != MVT::i1) ||
12265 (!isa<ConstantSDNode>(PromOp.getOperand(C+1)) &&
12266 PromOp.getOperand(C+1).getValueType() != MVT::i1)) {
12352 if (BinOp.getOperand(i).getOpcode() == ISD::TRUNCATE ||
12353 isa<ConstantSDNode>(BinOp.getOperand(i))) {
12354 Inputs.push_back(BinOp.getOperand(i));
12355 } else if (BinOp.getOperand(i).getOpcode() == ISD::AND ||
12356 BinOp.getOperand(i).getOpcode() == ISD::OR ||
12357 BinOp.getOperand(i).getOpcode() == ISD::XOR ||
12358 BinOp.getOperand(i).getOpcode() == ISD::SELECT ||
12359 BinOp.getOperand(i).getOpcode() == ISD::SELECT_CC) {
12360 BinOps.push_back(BinOp.getOperand(i));
12439 Inputs[i].getOperand(0).getValueSizeInBits();
12443 !DAG.MaskedValueIsZero(Inputs[i].getOperand(0),
12447 DAG.ComputeNumSignBits(Inputs[i].getOperand(0)) <
12464 SDValue InSrc = Inputs[i].getOperand(0);
12497 if ((!isa<ConstantSDNode>(PromOp.getOperand(C)) &&
12498 PromOp.getOperand(C).getValueType() != N->getValueType(0)) ||
12499 (!isa<ConstantSDNode>(PromOp.getOperand(C+1)) &&
12500 PromOp.getOperand(C+1).getValueType() != N->getValueType(0))) {
12514 PromOp.getOperand(0).getValueType() != N->getValueType(0)) ||
12516 PromOp.getOperand(1).getValueType() != N->getValueType(0))) {
12590 if (LHS.getOpcode() == ISD::SUB && isNullConstant(LHS.getOperand(0)) &&
12596 if (RHS.getOpcode() == ISD::SUB && isNullConstant(RHS.getOperand(0)) &&
12602 SDValue Add = DAG.getNode(ISD::ADD, DL, OpVT, LHS, RHS.getOperand(1));
12640 unsigned FirstConversion = FirstInput.getOperand(0).getOpcode();
12648 EVT SrcVT = FirstInput.getOperand(0).getValueType();
12655 unsigned NextConversion = NextOp.getOperand(0).getOpcode();
12662 if (Is32Bit && !isFPExtLoad(NextOp.getOperand(0).getOperand(0)))
12662 if (Is32Bit && !isFPExtLoad(NextOp.getOperand(0).getOperand(0)))
12676 SDValue In = N->getOperand(i).getOperand(0);
12684 MVT::f32, In.getOperand(0),
12689 Ops.push_back(In.isUndef() ? DAG.getUNDEF(SrcVT) : In.getOperand(0));
12729 FirstInput.getOperand(0).getOpcode() == ISD::LOAD) {
12730 LoadSDNode *LD = dyn_cast<LoadSDNode>(FirstInput.getOperand(0));
12743 SDValue NextInput = IsRoundOfExtLoad ? N->getOperand(i).getOperand(0) :
12749 IsRoundOfExtLoad ? N->getOperand(i-1).getOperand(0) : N->getOperand(i-1);
12771 IsRoundOfExtLoad ? FirstInput.getOperand(0) : FirstInput;
12773 IsRoundOfExtLoad ? N->getOperand(N->getNumOperands()-1).getOperand(0) :
12868 SDValue Extract = Op.getOperand(0);
12870 Extract = Extract.getOperand(0);
12874 ConstantSDNode *ExtOp = dyn_cast<ConstantSDNode>(Extract.getOperand(1));
12879 if (Input && Input != Extract.getOperand(0))
12883 Input = Extract.getOperand(0);
12982 SDValue Ext1 = FirstInput.getOperand(0);
12983 SDValue Ext2 = N->getOperand(1).getOperand(0);
12988 ConstantSDNode *Ext1Op = dyn_cast<ConstantSDNode>(Ext1.getOperand(1));
12989 ConstantSDNode *Ext2Op = dyn_cast<ConstantSDNode>(Ext2.getOperand(1));
12992 if (Ext1.getOperand(0).getValueType() != MVT::v4i32 ||
12993 Ext1.getOperand(0) != Ext2.getOperand(0))
12993 Ext1.getOperand(0) != Ext2.getOperand(0))
13006 SDValue SrcVec = Ext1.getOperand(0);
13030 if (Op.getOperand(0).getValueType().getSimpleVT() <= MVT(MVT::i1) ||
13031 Op.getOperand(0).getValueType().getSimpleVT() > MVT(MVT::i64))
13034 SDValue FirstOperand(Op.getOperand(0));
13067 if (Op.getOperand(0).getValueType() == MVT::i32)
13086 if ((Op.getOperand(0).getOpcode() == ISD::FP_TO_UINT &&
13088 (Op.getOperand(0).getOpcode() == ISD::FP_TO_SINT)) {
13089 SDValue Src = Op.getOperand(0).getOperand(0);
13089 SDValue Src = Op.getOperand(0).getOperand(0);
13099 Op.getOperand(0).getOpcode() == ISD::FP_TO_SINT ? PPCISD::FCTIDZ :
13262 SDValue Val = N->getOperand(1).getOperand(0);
13446 SDValue BSwapOp = N->getOperand(1).getOperand(0);
13834 ISD::isBuildVectorAllZeros(V1.getOperand(0).getNode()) &&
13835 V1.getOperand(1) == V2) {
13840 ISD::isBuildVectorAllZeros(V2.getOperand(0).getNode()) &&
13841 V2.getOperand(1) == V1) {
13846 V1.getOperand(0) == V2.getOperand(1) &&
13846 V1.getOperand(0) == V2.getOperand(1) &&
13847 V1.getOperand(1) == V2.getOperand(0)) {
13847 V1.getOperand(1) == V2.getOperand(0)) {
13974 cast<ConstantSDNode>(Cond.getOperand(1))->getZExtValue() ==
13979 DAG.ReplaceAllUsesOfValueWith(Cond.getValue(1), Cond.getOperand(0));
13999 LHS.getOperand(0).getOpcode() == ISD::INTRINSIC_W_CHAIN &&
14000 cast<ConstantSDNode>(LHS.getOperand(0).getOperand(1))->getZExtValue() ==
14000 cast<ConstantSDNode>(LHS.getOperand(0).getOperand(1))->getZExtValue() ==
14002 isa<ConstantSDNode>(LHS.getOperand(1)) &&
14003 !isNullConstant(LHS.getOperand(1)))
14004 LHS = LHS.getOperand(0);
14007 cast<ConstantSDNode>(LHS.getOperand(1))->getZExtValue() ==
14019 DAG.ReplaceAllUsesOfValueWith(LHS.getValue(1), LHS.getOperand(0));
14050 LHS.getOperand(2), // LHS of compare
14051 LHS.getOperand(3), // RHS of compare
14054 EVT VTs[] = { LHS.getOperand(2).getValueType(), MVT::Glue };
14059 switch (cast<ConstantSDNode>(LHS.getOperand(1))->getZExtValue()) {
14137 if (cast<VTSDNode>(Op.getOperand(2))->getVT() == MVT::i16)
14142 switch (cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue()) {
14515 unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
14543 unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
15140 N0.getOperand(0).getValueType() != MVT::i32 ||
15146 SDValue ExtsSrc = N0.getOperand(0);
15148 ExtsSrc.getOperand(0).getOpcode() == ISD::AssertSext)
15193 SDValue Cmp = Op.getOperand(0);
15195 Cmp.getOperand(0).getValueType() != MVT::i64)
15198 if (auto *Constant = dyn_cast<ConstantSDNode>(Cmp.getOperand(1))) {
15219 SDValue Cmp = RHS.getOperand(0);
15220 SDValue Z = Cmp.getOperand(0);
15221 auto *Constant = dyn_cast<ConstantSDNode>(Cmp.getOperand(1));
15226 switch(cast<CondCodeSDNode>(Cmp.getOperand(2))->get()) {
15299 ConstantSDNode *ConstNode = dyn_cast<ConstantSDNode>(Op0.getOperand(1));
15307 Op0 = Op0.getOperand(0);
15313 Op0.getOperand(0).getValueType() == MVT::f128) {
15314 SDValue Bitcast = DCI.DAG.getBitcast(MVT::v2i64, Op0.getOperand(0));
15539 ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
15554 SDValue CmpOpnd1 = Cond.getOperand(0);
15555 SDValue CmpOpnd2 = Cond.getOperand(1);
15560 if (TrueOpnd.getOperand(0) == CmpOpnd1 &&
15561 TrueOpnd.getOperand(1) == CmpOpnd2 &&
15562 FalseOpnd.getOperand(0) == CmpOpnd2 &&
15563 FalseOpnd.getOperand(1) == CmpOpnd1) {
lib/Target/RISCV/RISCVISelDAGToDAG.cpp 153 CurDAG->SelectNodeTo(Node, RISCV::SRLIW, XLenVT, Op0.getOperand(0),
255 SDValue ImmOperand = Base.getOperand(1);
276 CurDAG->UpdateNodeOperands(N, Base.getOperand(0), ImmOperand,
279 CurDAG->UpdateNodeOperands(N, N->getOperand(0), Base.getOperand(0),
lib/Target/RISCV/RISCVISelLowering.cpp 399 SDValue Op0 = Op.getOperand(0);
614 SDValue CondV = Op.getOperand(0);
615 SDValue TrueV = Op.getOperand(1);
616 SDValue FalseV = Op.getOperand(2);
627 CondV.getOperand(0).getSimpleValueType() == XLenVT) {
628 SDValue LHS = CondV.getOperand(0);
629 SDValue RHS = CondV.getOperand(1);
630 auto CC = cast<CondCodeSDNode>(CondV.getOperand(2));
663 const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue();
664 return DAG.getStore(Op.getOperand(0), DL, FI, Op.getOperand(1),
664 return DAG.getStore(Op.getOperand(0), DL, FI, Op.getOperand(1),
680 unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
705 unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
724 SDValue Lo = Op.getOperand(0);
725 SDValue Hi = Op.getOperand(1);
726 SDValue Shamt = Op.getOperand(2);
763 SDValue Lo = Op.getOperand(0);
764 SDValue Hi = Op.getOperand(1);
765 SDValue Shamt = Op.getOperand(2);
935 return DCI.CombineTo(N, Op0.getOperand(0), Op0.getOperand(1));
935 return DCI.CombineTo(N, Op0.getOperand(0), Op0.getOperand(1));
958 Op0.getOperand(0));
993 DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, Op0.getOperand(0));
1005 Op0.getOperand(0));
lib/Target/Sparc/SparcISelDAGToDAG.cpp 89 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1))) {
92 dyn_cast<FrameIndexSDNode>(Addr.getOperand(0))) {
97 Base = Addr.getOperand(0);
104 if (Addr.getOperand(0).getOpcode() == SPISD::Lo) {
105 Base = Addr.getOperand(1);
106 Offset = Addr.getOperand(0).getOperand(0);
106 Offset = Addr.getOperand(0).getOperand(0);
109 if (Addr.getOperand(1).getOpcode() == SPISD::Lo) {
110 Base = Addr.getOperand(0);
111 Offset = Addr.getOperand(1).getOperand(0);
111 Offset = Addr.getOperand(1).getOperand(0);
128 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1)))
131 if (Addr.getOperand(0).getOpcode() == SPISD::Lo ||
132 Addr.getOperand(1).getOpcode() == SPISD::Lo)
134 R1 = Addr.getOperand(0);
135 R2 = Addr.getOperand(1);
lib/Target/Sparc/SparcISelLowering.cpp 1309 if (RegisterSDNode *SrcReg = dyn_cast<RegisterSDNode>(Chain.getOperand(1)))
1869 Known = DAG.computeKnownBits(Op.getOperand(1), Depth + 1);
1870 Known2 = DAG.computeKnownBits(Op.getOperand(0), Depth + 1);
1887 LHS.getOperand(3).getOpcode() == SPISD::CMPICC) ||
1889 LHS.getOperand(3).getOpcode() == SPISD::CMPFCC)) &&
1890 isOneConstant(LHS.getOperand(0)) &&
1891 isNullConstant(LHS.getOperand(1))) {
1892 SDValue CMPCC = LHS.getOperand(3);
1893 SPCC = cast<ConstantSDNode>(LHS.getOperand(2))->getZExtValue();
1894 LHS = CMPCC.getOperand(0);
1895 RHS = CMPCC.getOperand(1);
2178 Chain = LowerF128_LibCallArg(Chain, Args, Op.getOperand(i), SDLoc(Op), DAG);
2300 if (Op.getOperand(0).getValueType() == MVT::f64)
2304 if (Op.getOperand(0).getValueType() == MVT::f32)
2316 if (Op.getOperand(0).getValueType() != MVT::f128)
2338 if (Op.getOperand(0).getValueType() == MVT::f128
2352 Op = DAG.getNode(SPISD::FTOI, dl, MVT::f32, Op.getOperand(0));
2354 Op = DAG.getNode(SPISD::FTOX, dl, MVT::f64, Op.getOperand(0));
2363 EVT OpVT = Op.getOperand(0).getValueType();
2382 SDValue Tmp = DAG.getNode(ISD::BITCAST, dl, floatVT, Op.getOperand(0));
2395 if (Op.getOperand(0).getValueType() != MVT::f128 ||
2412 EVT OpVT = Op.getOperand(0).getValueType();
2430 SDValue Chain = Op.getOperand(0);
2431 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get();
2432 SDValue LHS = Op.getOperand(2);
2433 SDValue RHS = Op.getOperand(3);
2434 SDValue Dest = Op.getOperand(4);
2467 SDValue LHS = Op.getOperand(0);
2468 SDValue RHS = Op.getOperand(1);
2469 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
2470 SDValue TrueVal = Op.getOperand(2);
2471 SDValue FalseVal = Op.getOperand(3);
2515 const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue();
2516 return DAG.getStore(Op.getOperand(0), DL, Offset, Op.getOperand(1),
2516 return DAG.getStore(Op.getOperand(0), DL, Offset, Op.getOperand(1),
2545 SDValue Chain = Op.getOperand(0); // Legalize the chain.
2546 SDValue Size = Op.getOperand(1); // Legalize the size.
2547 unsigned Align = cast<ConstantSDNode>(Op.getOperand(2))->getZExtValue();
2845 return LowerF64Op(Op.getOperand(0), dl, DAG, Op.getOpcode());
2854 SDValue SrcReg128 = Op.getOperand(0);
2887 SDValue Src1 = Op.getOperand(0);
2893 SDValue Src2 = Op.getOperand(1);
2913 Op.getOperand(2));
2942 SDValue LHS = Op.getOperand(0);
2949 SDValue RHS = Op.getOperand(1);
2991 unsigned IntNo = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
lib/Target/SystemZ/SystemZISelDAGToDAG.cpp 185 Target = Addr.getOperand(0);
456 N = N.getOperand(0);
460 SDValue Op0 = N.getOperand(0);
461 SDValue Op1 = N.getOperand(1);
482 SDValue Full = N.getOperand(0);
483 SDValue Base = N.getOperand(1);
484 SDValue Anchor = Base.getOperand(0);
707 Index = Index.getOperand(0);
709 Index.getOperand(1) == Elem) {
710 Index = Index.getOperand(0);
726 auto *MaskNode = dyn_cast<ConstantSDNode>(Op.getOperand(1).getNode());
739 KnownBits Known = CurDAG->computeKnownBits(Op.getOperand(0));
744 Op = Op.getOperand(0);
780 RxSBG.Input = N.getOperand(0);
787 auto *MaskNode = dyn_cast<ConstantSDNode>(N.getOperand(1).getNode());
791 SDValue Input = N.getOperand(0);
810 auto *MaskNode = dyn_cast<ConstantSDNode>(N.getOperand(1).getNode());
814 SDValue Input = N.getOperand(0);
833 auto *CountNode = dyn_cast<ConstantSDNode>(N.getOperand(1).getNode());
838 RxSBG.Input = N.getOperand(0);
844 RxSBG.Input = N.getOperand(0);
850 unsigned InnerBitSize = N.getOperand(0).getValueSizeInBits();
854 RxSBG.Input = N.getOperand(0);
863 unsigned InnerBitSize = N.getOperand(0).getValueSizeInBits();
873 RxSBG.Input = N.getOperand(0);
878 auto *CountNode = dyn_cast<ConstantSDNode>(N.getOperand(1).getNode());
899 RxSBG.Input = N.getOperand(0);
905 auto *CountNode = dyn_cast<ConstantSDNode>(N.getOperand(1).getNode());
927 RxSBG.Input = N.getOperand(0);
1213 SDValue ElemV = Value.getOperand(1);
1218 SDValue Vec = Value.getOperand(0);
1287 SDValue Op = Chain.getOperand(i);
1291 ChainOps.push_back(Load.getOperand(0));
1374 SDValue Operand = StoredVal.getOperand(1);
1454 auto *LoadA = cast<LoadSDNode>(StoreA->getValue().getOperand(1 - I));
1455 auto *LoadB = cast<LoadSDNode>(StoreA->getValue().getOperand(I));
lib/Target/SystemZ/SystemZISelLowering.cpp 1712 unsigned Id = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
1738 unsigned Id = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
1901 Ops.push_back(Op.getOperand(0));
1903 Ops.push_back(Op.getOperand(I));
1922 Ops.push_back(Op.getOperand(I));
2123 C.Op0.getOperand(1).getOpcode() == ISD::Constant &&
2124 cast<ConstantSDNode>(C.Op0.getOperand(1))->getZExtValue() == 0xffffffff)
2189 auto *C1 = dyn_cast<ConstantSDNode>(C.Op0.getOperand(1));
2191 SDValue ShlOp0 = C.Op0.getOperand(0);
2211 C.Op0.getOperand(0).getOpcode() == ISD::LOAD &&
2214 auto *L = cast<LoadSDNode>(C.Op0.getOperand(0));
2219 C.Op0 = C.Op0.getOperand(0);
2229 auto *Shift = dyn_cast<ConstantSDNode>(N.getOperand(1));
2352 NewC.Op0 = C.Op0.getOperand(0);
2353 NewC.Op1 = C.Op0.getOperand(1);
2396 NewC.Op0 = NewC.Op0.getOperand(0);
2407 NewC.Op0 = NewC.Op0.getOperand(0);
2434 auto *Mask = dyn_cast<ConstantSDNode>(C.Op0.getOperand(1));
2437 KnownBits Known = DAG.computeKnownBits(C.Op0.getOperand(0));
2441 C.Op0 = C.Op0.getOperand(0);
2738 SDValue CmpOp0 = Op.getOperand(0);
2739 SDValue CmpOp1 = Op.getOperand(1);
2740 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get();
2752 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get();
2753 SDValue CmpOp0 = Op.getOperand(2);
2754 SDValue CmpOp1 = Op.getOperand(3);
2755 SDValue Dest = Op.getOperand(4);
2761 SystemZISD::BR_CCMASK, DL, Op.getValueType(), Op.getOperand(0),
2770 Neg.getOperand(0).getOpcode() == ISD::Constant &&
2771 cast<ConstantSDNode>(Neg.getOperand(0))->getZExtValue() == 0 &&
2772 Neg.getOperand(1) == Pos &&
2775 Pos.getOperand(0) == CmpOp)));
2790 SDValue CmpOp0 = Op.getOperand(0);
2791 SDValue CmpOp1 = Op.getOperand(1);
2792 SDValue TrueOp = Op.getOperand(2);
2793 SDValue FalseOp = Op.getOperand(3);
2794 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
3060 unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
3091 unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
3107 SDValue In = Op.getOperand(0);
3161 SDValue Chain = Op.getOperand(0);
3162 SDValue Addr = Op.getOperand(1);
3163 const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue();
3192 SDValue Chain = Op.getOperand(0);
3193 SDValue DstPtr = Op.getOperand(1);
3194 SDValue SrcPtr = Op.getOperand(2);
3195 const Value *DstSV = cast<SrcValueSDNode>(Op.getOperand(3))->getValue();
3196 const Value *SrcSV = cast<SrcValueSDNode>(Op.getOperand(4))->getValue();
3212 SDValue Chain = Op.getOperand(0);
3213 SDValue Size = Op.getOperand(1);
3214 SDValue Align = Op.getOperand(2);
3286 lowerMUL_LOHI32(DAG, DL, ISD::SIGN_EXTEND, Op.getOperand(0),
3287 Op.getOperand(1), Ops[1], Ops[0]);
3293 Op.getOperand(0), Op.getOperand(1), Ops[1], Ops[0]);
3293 Op.getOperand(0), Op.getOperand(1), Ops[1], Ops[0]);
3309 SDValue LL = Op.getOperand(0);
3310 SDValue RL = Op.getOperand(1);
3334 lowerMUL_LOHI32(DAG, DL, ISD::ZERO_EXTEND, Op.getOperand(0),
3335 Op.getOperand(1), Ops[1], Ops[0]);
3341 Op.getOperand(0), Op.getOperand(1), Ops[1], Ops[0]);
3341 Op.getOperand(0), Op.getOperand(1), Ops[1], Ops[0]);
3347 SDValue Op0 = Op.getOperand(0);
3348 SDValue Op1 = Op.getOperand(1);
3376 Op.getOperand(0), Op.getOperand(1), Ops[1], Ops[0]);
3376 Op.getOperand(0), Op.getOperand(1), Ops[1], Ops[0]);
3384 SDValue Ops[] = {Op.getOperand(0), Op.getOperand(1)};
3384 SDValue Ops[] = {Op.getOperand(0), Op.getOperand(1)};
3418 HighOp.getOperand(1).getOpcode() == ISD::Constant) {
3419 SDValue HighOp0 = HighOp.getOperand(0);
3420 uint64_t Mask = cast<ConstantSDNode>(HighOp.getOperand(1))->getZExtValue();
3482 Carry = Carry.getOperand(2);
3488 Carry = Carry.getOperand(2);
3505 SDValue Carry = Op.getOperand(2);
3550 Op = Op.getOperand(0);
3624 cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue());
3626 cast<ConstantSDNode>(Op.getOperand(2))->getZExtValue());
3633 Op.getOperand(0)),
3638 return DAG.getNode(SystemZISD::MEMBARRIER, DL, MVT::Other, Op.getOperand(0));
3864 return DAG.getCopyFromReg(Op.getOperand(0), SDLoc(Op),
3874 SDValue Chain = Op.getOperand(0);
3875 SDValue NewSP = Op.getOperand(1);
3894 bool IsData = cast<ConstantSDNode>(Op.getOperand(4))->getZExtValue();
3897 return Op.getOperand(0);
3900 bool IsWrite = cast<ConstantSDNode>(Op.getOperand(2))->getZExtValue();
3903 SDValue Ops[] = {Op.getOperand(0), DAG.getTargetConstant(Code, DL, MVT::i32),
3904 Op.getOperand(1)};
3946 unsigned Id = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
3953 Op.getOperand(1), Op.getOperand(2), Op.getOperand(3));
3953 Op.getOperand(1), Op.getOperand(2), Op.getOperand(3));
3953 Op.getOperand(1), Op.getOperand(2), Op.getOperand(3));
3957 Op.getOperand(1), Op.getOperand(2), Op.getOperand(3));
3957 Op.getOperand(1), Op.getOperand(2), Op.getOperand(3));
3957 Op.getOperand(1), Op.getOperand(2), Op.getOperand(3));
3963 Op.getOperand(1));
3969 Op.getOperand(1));
3975 Op.getOperand(1));
3981 Op.getOperand(1));
3990 Op.getOperand(1), Op.getOperand(2));
3990 Op.getOperand(1), Op.getOperand(2));
4166 isa<ConstantSDNode>(ShuffleOp.getOperand(1))) {
4339 Op = Op.getOperand(0);
4353 Op = Op.getOperand(unsigned(NewByte) / SystemZ::VectorBytes);
4460 if (!Op.getOperand(I).isUndef())
4535 Op = Op.getOperand(0);
4537 Op.getOperand(1).getOpcode() == ISD::Constant) {
4538 unsigned Elem = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
4539 if (!GS.add(Op.getOperand(0), Elem))
4742 return buildScalarToVector(DAG, DL, VT, Op.getOperand(0));
4748 Ops[I] = Op.getOperand(I);
4760 SDValue Op0 = Op.getOperand(0);
4767 return DAG.getNode(SystemZISD::REPLICATE, DL, VT, Op0.getOperand(Index));
4769 return DAG.getNode(SystemZISD::SPLAT, DL, VT, Op.getOperand(0),
4778 else if (!GS.add(Op.getOperand(unsigned(Elt) / NumElements),
4791 Op.getOperand(0), DAG.getConstant(0, DL, MVT::i32));
4798 SDValue Op0 = Op.getOperand(0);
4799 SDValue Op1 = Op.getOperand(1);
4800 SDValue Op2 = Op.getOperand(2);
4830 SDValue Op0 = Op.getOperand(0);
4831 SDValue Op1 = Op.getOperand(1);
4854 SDValue PackedOp = Op.getOperand(0);
4871 SDValue Op0 = Op.getOperand(0);
4872 SDValue Op1 = Op.getOperand(1);
4915 VSNOp0.getOperand(Index));
5280 Op = Op.getOperand(0);
5302 Op = Op.getOperand(unsigned(First) / Bytes.size());
5318 Op = Op.getOperand(End / OpBytesPerElement - 1);
5335 canTreatAsByteVector(Op.getOperand(0).getValueType())) {
5338 EVT OpVT = Op.getOperand(0).getValueType();
5353 Op = Op.getOperand(0);
5379 SDValue Vec = Op.getOperand(0);
5382 if (auto *IndexN = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
5414 auto *TrueOp = dyn_cast<ConstantSDNode>(N0.getOperand(0));
5415 auto *FalseOp = dyn_cast<ConstantSDNode>(N0.getOperand(1));
5420 N0.getOperand(2), N0.getOperand(3), N0.getOperand(4) };
5420 N0.getOperand(2), N0.getOperand(3), N0.getOperand(4) };
5420 N0.getOperand(2), N0.getOperand(3), N0.getOperand(4) };
5444 N0 = N0.getOperand(0);
5447 SDValue Ops[] = { N0.getOperand(0), N0.getOperand(1),
5447 SDValue Ops[] = { N0.getOperand(0), N0.getOperand(1),
5449 N0.getOperand(2) };
5464 auto *SraAmt = dyn_cast<ConstantSDNode>(N0.getOperand(1));
5465 SDValue Inner = N0.getOperand(0);
5467 if (auto *ShlAmt = dyn_cast<ConstantSDNode>(Inner.getOperand(1))) {
5471 EVT ShiftVT = N0.getOperand(1).getValueType();
5473 Inner.getOperand(0));
5492 Op0 = Op0.getOperand(0);
5611 SDValue BSwapOp = Op1.getOperand(0);
5633 N->getOperand(0), Op1.getOperand(0), N->getOperand(2)
5695 Op.getOperand(0).getValueType().isVector() &&
5697 Op.getOperand(0).getValueType().getVectorNumElements())
5698 Op = Op.getOperand(0);
5705 Op.getOperand(0), N->getOperand(1));
5752 Op0.getOperand(0).getValueType() == MVT::v2f64 &&
5753 Op0.getOperand(1).getOpcode() == ISD::Constant &&
5754 cast<ConstantSDNode>(Op0.getOperand(1))->getZExtValue() == 0) {
5755 SDValue Vec = Op0.getOperand(0);
5765 OtherRound.getOperand(0) == SDValue(U, 0) &&
5803 Op0.getOperand(0).getValueType() == MVT::v4f32 &&
5804 Op0.getOperand(1).getOpcode() == ISD::Constant &&
5805 cast<ConstantSDNode>(Op0.getOperand(1))->getZExtValue() == 0) {
5806 SDValue Vec = Op0.getOperand(0);
5816 OtherExtend.getOperand(0) == SDValue(U, 0) &&
5881 Op.getOperand(0).getValueType().isVector() &&
5883 Op.getOperand(0).getValueType().getVectorNumElements())
5884 Op = Op.getOperand(0);
5888 SDValue Vec = Op.getOperand(0);
5889 SDValue Elt = Op.getOperand(1);
5890 SDValue Idx = Op.getOperand(2);
5920 SDValue Op0 = Op.getOperand(0);
5921 SDValue Op1 = Op.getOperand(1);
6192 unsigned Id = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
6236 unsigned Mask = cast<ConstantSDNode>(Op.getOperand(3))->getZExtValue();
6245 unsigned FirstIdx = cast<ConstantSDNode>(Op.getOperand(3))->getZExtValue();
6289 DAG.computeKnownBits(Op.getOperand(OpNo), Src0DemE, Depth + 1);
6291 DAG.computeKnownBits(Op.getOperand(OpNo + 1), Src1DemE, Depth + 1);
6322 unsigned Id = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
6355 SDValue SrcOp = Op.getOperand(1);
6374 SDValue SrcOp = Op.getOperand(0);
6395 unsigned LHS = DAG.ComputeNumSignBits(Op.getOperand(OpNo), Src0DemE, Depth + 1);
6398 unsigned RHS = DAG.ComputeNumSignBits(Op.getOperand(OpNo + 1), Src1DemE, Depth + 1);
6401 unsigned SrcBitWidth = Op.getOperand(OpNo).getScalarValueSizeInBits();
6422 unsigned Id = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
6446 SDValue PackedOp = Op.getOperand(1);
lib/Target/WebAssembly/WebAssemblyISelLowering.cpp 1023 SDValue Src = Op.getOperand(2);
1030 SDValue Chain = Op.getOperand(0);
1032 unsigned Reg = cast<RegisterSDNode>(Op.getOperand(1))->getReg();
1041 Op.getNumOperands() == 4 ? Op.getOperand(3)
1067 unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
1159 SDValue Chain = Op.getOperand(0);
1160 const auto *JT = cast<JumpTableSDNode>(Op.getOperand(1));
1161 SDValue Index = Op.getOperand(2);
1189 const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue();
1193 return DAG.getStore(Op.getOperand(0), DL, ArgN, Op.getOperand(1),
1193 return DAG.getStore(Op.getOperand(0), DL, ArgN, Op.getOperand(1),
1204 IntNo = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
1207 IntNo = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
1231 int Tag = cast<ConstantSDNode>(Op.getOperand(2).getNode())->getZExtValue();
1242 Op.getOperand(0), // inchain
1244 Op.getOperand(3) // thrown value
1261 if (Op.getOperand(0).getOpcode() == ISD::EXTRACT_VECTOR_ELT) {
1262 const SDValue &Extract = Op.getOperand(0);
1263 MVT VecT = Extract.getOperand(0).getSimpleValueType();
1264 MVT ExtractedLaneT = static_cast<VTSDNode *>(Op.getOperand(1).getNode())
1272 const SDValue &Index = Extract.getOperand(1);
1282 DAG.getBitcast(ExtractedVecT, Extract.getOperand(0)), NewIndex);
1284 NewExtract, Op.getOperand(1));
1294 const EVT LaneT = Op.getOperand(0).getValueType();
1453 MVT VecType = Op.getOperand(0).getSimpleValueType();
1460 Ops[OpIdx++] = Op.getOperand(0);
1461 Ops[OpIdx++] = Op.getOperand(1);
1479 SDNode *IdxNode = Op.getOperand(Op.getNumOperands() - 1).getNode();
1494 SDValue ShiftVal = Op.getOperand(1);
1506 Op.getOperand(0), // original vector operand,
1522 if (!(ShiftVec = dyn_cast<BuildVectorSDNode>(Op.getOperand(1).getNode())) ||
1547 return DAG.getNode(Opcode, DL, Op.getValueType(), Op.getOperand(0),
lib/Target/X86/X86ISelDAGToDAG.cpp 654 SDValue Val = Op1.getOperand(0);
665 isOneConstant(U->getOperand(0).getOperand(0)))
669 isOneConstant(U->getOperand(1).getOperand(0)))
676 auto *C = dyn_cast<ConstantSDNode>(U0.getOperand(0));
682 auto *C = dyn_cast<ConstantSDNode>(U1.getOperand(0));
720 SDValue Chain = OrigChain.getOperand(0);
722 Ops.push_back(Load.getOperand(0));
727 if (Chain.getOperand(i).getNode() == Load.getNode())
728 Ops.push_back(Load.getOperand(0));
730 Ops.push_back(Chain.getOperand(i));
738 CurDAG->UpdateNodeOperands(Load.getNode(), Call.getOperand(0),
739 Load.getOperand(1), Load.getOperand(2));
739 Load.getOperand(1), Load.getOperand(2));
770 Chain = Chain.getOperand(0);
780 if (Chain.getOperand(0).getNode() == Callee.getNode())
782 if (Chain.getOperand(0).getOpcode() == ISD::TokenFactor &&
783 Callee.getValue(1).isOperandOf(Chain.getOperand(0).getNode()) &&
1136 SDValue N00 = N0.getOperand(0);
1187 And.getOperand(0),
1188 And.getOperand(1));
1204 SDValue Ops[] = { And.getOperand(1),
1205 And.getOperand(2),
1206 And.getOperand(3),
1207 And.getOperand(4),
1208 And.getOperand(5),
1209 And.getOperand(0),
1210 And.getOperand(6) /* Chain */ };
1246 And.getOperand(0),
1247 And.getOperand(1));
1287 SDValue In = Move.getOperand(0);
1412 SDValue Val = N.getOperand(0);
1436 SDValue N0 = N.getOperand(0);
1516 if (!matchAddressRecursively(N.getOperand(0), AM, Depth+1) &&
1517 !matchAddressRecursively(Handle.getValue().getOperand(1), AM, Depth+1))
1522 if (!matchAddressRecursively(Handle.getValue().getOperand(1), AM, Depth+1) &&
1523 !matchAddressRecursively(Handle.getValue().getOperand(0), AM, Depth+1))
1534 AM.Base_Reg = N.getOperand(0);
1535 AM.IndexReg = N.getOperand(1);
1571 !isa<ConstantSDNode>(Shift.getOperand(1)) ||
1612 SDValue Shift = N.getOperand(0);
1624 Shift.getOperand(0).getSimpleValueType() == MVT::i32 &&
1627 Shift = Shift.getOperand(0);
1631 !isa<ConstantSDNode>(Shift.getOperand(1)))
1634 SDValue X = Shift.getOperand(0);
1657 SDValue NewShift = DAG.getNode(ISD::SHL, DL, VT, NewAnd, Shift.getOperand(1));
1707 !isa<ConstantSDNode>(Shift.getOperand(1)))
1741 X.getOperand(0).getSimpleValueType().getSizeInBits();
1744 X = X.getOperand(0);
1795 !isa<ConstantSDNode>(Shift.getOperand(1)) ||
1876 if (const auto *ESNode = dyn_cast<MCSymbolSDNode>(N.getOperand(0))) {
1915 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
1923 SDValue ShVal = N.getOperand(0);
1929 AM.IndexReg = ShVal.getOperand(0);
1930 ConstantSDNode *AddVal = cast<ConstantSDNode>(ShVal.getOperand(1));
1951 SDValue And = N.getOperand(0);
1953 SDValue X = And.getOperand(0);
1958 if (!isa<ConstantSDNode>(N.getOperand(1)) ||
1959 !isa<ConstantSDNode>(And.getOperand(1)))
1981 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N.getOperand(1)))
1986 SDValue MulVal = N.getOperand(0);
1993 isa<ConstantSDNode>(MulVal.getOperand(1))) {
1994 Reg = MulVal.getOperand(0);
1996 cast<ConstantSDNode>(MulVal.getOperand(1));
1999 Reg = N.getOperand(0);
2001 Reg = N.getOperand(0);
2024 if (matchAddressRecursively(N.getOperand(0), AM, Depth+1)) {
2037 SDValue RHS = N.getOperand(1);
2046 RHS.getOperand(0).getValueType() == MVT::i32))
2087 if (CurDAG->haveNoCommonBitsSet(N.getOperand(0), N.getOperand(1)) &&
2087 if (CurDAG->haveNoCommonBitsSet(N.getOperand(0), N.getOperand(1)) &&
2104 if (!isa<ConstantSDNode>(N.getOperand(1)))
2107 if (N.getOperand(0).getOpcode() == ISD::SRL) {
2108 SDValue Shift = N.getOperand(0);
2109 SDValue X = Shift.getOperand(0);
2138 if (N.getOperand(0).getOpcode() != ISD::SHL || !N.getOperand(0).hasOneUse())
2138 if (N.getOperand(0).getOpcode() != ISD::SHL || !N.getOperand(0).hasOneUse())
2142 SDValue Shl = N.getOperand(0);
2143 auto *ShAmtC = dyn_cast<ConstantSDNode>(Shl.getOperand(1));
2151 if (!CurDAG->MaskedValueIsZero(Shl.getOperand(0), HighZeros))
2157 SDValue Zext = CurDAG->getNode(ISD::ZERO_EXTEND, DL, VT, Shl.getOperand(0));
2158 SDValue NewShl = CurDAG->getNode(ISD::SHL, DL, VT, Zext, Shl.getOperand(1));
2346 PatternNodeWithChain = N.getOperand(0);
2375 N = N.getOperand(0);
2505 if (isMathWithFlags(N.getOperand(0)) && isMathWithFlags(N.getOperand(1)))
2505 if (isMathWithFlags(N.getOperand(0)) && isMathWithFlags(N.getOperand(1)))
2556 N = N.getOperand(0);
2565 unsigned Opc = N.getOperand(0)->getOpcode();
2567 Op = N.getOperand(0);
2574 auto *GA = cast<GlobalAddressSDNode>(N.getOperand(0));
2596 N.getOperand(1), Base, Scale, Index, Disp, Segment);
2610 N.getOperand(1), Base, Scale, Index, Disp, Segment);
2886 ChainOps.push_back(Load.getOperand(0));
2889 SDValue Op = Chain.getOperand(i);
2893 ChainOps.push_back(Load.getOperand(0));
2958 IsNegate = isNullConstant(StoredVal.getOperand(0));
3023 bool IsOne = isOneConstant(StoredVal.getOperand(1));
3024 bool IsNegOne = isAllOnesConstant(StoredVal.getOperand(1));
3151 StoredVal.getOperand(2), SDValue());
3217 V.getOperand(0).getSimpleValueType() == MVT::i64 &&
3219 V = V.getOperand(0);
3275 ShiftAmt = ShiftAmt.getOperand(0);
3283 auto V0 = dyn_cast<ConstantSDNode>(ShiftAmt.getOperand(0));
3286 NBits = ShiftAmt.getOperand(1);
3300 if (!isAllOnesConstant(Mask.getOperand(0)))
3302 SDValue M1 = Mask.getOperand(1);
3412 SDValue ShiftAmt = X.getOperand(1);
3413 X = X.getOperand(0);
3548 Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Control, Input.getOperand(0)};
3584 N1.getOperand(0) };
3617 N2.getOperand(0), InFlag };
3743 Shift.getOperand(0).getSimpleValueType() == MVT::i32 &&
3746 Shift = Shift.getOperand(0);
3756 ConstantSDNode *ShlCst = dyn_cast<ConstantSDNode>(Shift.getOperand(1));
3817 SDValue X = Shift.getOperand(0);
3829 Shift.getOperand(1));
4117 ISD::CondCode CC = cast<CondCodeSDNode>(Setcc.getOperand(2))->get();
4121 SDValue SetccOp0 = Setcc.getOperand(0);
4122 SDValue SetccOp1 = Setcc.getOperand(1);
4145 N0Temp = N0.getOperand(0);
4149 Src0 = N0Temp.getOperand(0);
4150 Src1 = N0Temp.getOperand(1);
4181 Src = Src.getOperand(0);
4268 Load.getOperand(0) };
4272 Load.getOperand(0) };
4328 SDValue A = N1.getOperand(0);
4329 SDValue C = N1.getOperand(1);
4334 if (N0.getOperand(0) == A)
4335 B = N0.getOperand(1);
4336 else if (N0.getOperand(1) == A)
4337 B = N0.getOperand(0);
4604 SDValue Ops[] = { N1, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, N0.getOperand(0) };
4677 SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, N1.getOperand(0),
4751 SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, N1.getOperand(0),
4853 SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, N0.getOperand(0) };
4911 SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, N1.getOperand(0),
5000 N0 = N0.getOperand(0);
5008 ConstantSDNode *C = dyn_cast<ConstantSDNode>(N0.getOperand(1));
5022 N0.getOperand(0), Imm), 0);
5033 N0.getOperand(0), Imm), 0);
5091 SDValue Reg = N0.getOperand(0);
5098 Reg.getOperand(0) };
lib/Target/X86/X86ISelLowering.cpp 4217 Arg = Arg.getOperand(0);
4221 const SDValue &TruncInput = Arg.getOperand(0);
4223 cast<VTSDNode>(TruncInput.getOperand(1))->getVT() ==
4225 Arg = TruncInput.getOperand(0);
4234 unsigned VR = cast<RegisterSDNode>(Arg.getOperand(1))->getReg();
4868 if (const auto *GA = dyn_cast<GlobalAddressSDNode>(BasePtr.getOperand(0)))
5126 return N->getOperand(1) == N->getOperand(0).getOperand(1);
5590 Src.getOperand(1).getValueType() == SubVT &&
5591 isNullConstant(Src.getOperand(2))) {
5592 Ops.push_back(Src.getOperand(1));
5654 SDValue Vec = Op.getOperand(0);
5655 SDValue SubVec = Op.getOperand(1);
5656 SDValue Idx = Op.getOperand(2);
5869 ISD::isBuildVectorAllOnes(V.getOperand(1).getNode()))
5870 return V.getOperand(0);
5872 (isNullConstant(V.getOperand(1)) || V.getOperand(0).hasOneUse())) {
5872 (isNullConstant(V.getOperand(1)) || V.getOperand(0).hasOneUse())) {
5873 if (SDValue Not = IsNOT(V.getOperand(0), DAG)) {
5874 Not = DAG.getBitcast(V.getOperand(0).getValueType(), Not);
5876 Not, V.getOperand(1));
6072 const SDValue &Src = Op.getOperand(i);
6089 const SDValue &Src = Op.getOperand(i);
6124 if (auto *Broadcast = getTargetConstantFromNode(Op.getOperand(0))) {
6173 if (getTargetConstantBitsFromNode(Op.getOperand(0), EltSizeInBits,
6185 Op.getOperand(0).getOpcode() == ISD::SCALAR_TO_VECTOR &&
6186 isa<ConstantSDNode>(Op.getOperand(0).getOperand(0))) {
6186 isa<ConstantSDNode>(Op.getOperand(0).getOperand(0))) {
6192 auto *CN = cast<ConstantSDNode>(Op.getOperand(0).getOperand(0));
6192 auto *CN = cast<ConstantSDNode>(Op.getOperand(0).getOperand(0));
6200 isa<ConstantSDNode>(Op.getOperand(2))) {
6207 if (getTargetConstantBitsFromNode(Op.getOperand(1), EltSizeInBits,
6210 getTargetConstantBitsFromNode(Op.getOperand(0), EltSizeInBits,
6223 isa<ConstantSDNode>(Op.getOperand(1))) {
6228 if (getTargetConstantBitsFromNode(Op.getOperand(0), EltSizeInBits,
6231 EVT SrcVT = Op.getOperand(0).getValueType();
6258 !getTargetConstantBitsFromNode(Op.getOperand(0), EltSizeInBits,
6263 !getTargetConstantBitsFromNode(Op.getOperand(1), EltSizeInBits,
6555 N0.getOperand(0).getValueType() == VT &&
6557 Ops.push_back(N0.getOperand(0));
6791 else if (Idx == 0 && X86::isZeroNode(V.getOperand(0)))
6875 Ops.push_back(N.getOperand(0));
6876 Ops.push_back(N.getOperand(1));
6886 SDValue N0 = N.getOperand(0);
6887 SDValue N1 = N.getOperand(1);
6909 DAG.computeKnownBits(N.getOperand(0), DemandedElts, Depth + 1);
6911 DAG.computeKnownBits(N.getOperand(1), DemandedElts, Depth + 1);
6936 Ops.push_back(N.getOperand(0));
6937 Ops.push_back(N.getOperand(1));
6944 SDValue N0 = peekThroughOneUseBitcasts(N.getOperand(0));
6945 SDValue N1 = peekThroughOneUseBitcasts(N.getOperand(1));
6976 SDValue Src = N.getOperand(0);
6977 SDValue Sub = N.getOperand(1);
6980 if (!isa<ConstantSDNode>(N.getOperand(2)) ||
6986 Sub.getOperand(0).getValueType() == VT &&
6987 isa<ConstantSDNode>(Sub.getOperand(1))) {
6994 Ops.push_back(Sub.getOperand(0));
7042 SDValue N0 = N.getOperand(0);
7046 N0.getOperand(0).getValueType() == VT) ||
7048 N0.getOperand(0).getValueType() == MVT::v8i16) ||
7050 N0.getOperand(0).getValueType() == MVT::v16i8)) {
7054 if (!SrcExtract || !isa<ConstantSDNode>(SrcExtract.getOperand(1)))
7057 SDValue SrcVec = SrcExtract.getOperand(0);
7074 SDValue InVec = N.getOperand(0);
7075 SDValue InScl = N.getOperand(1);
7076 SDValue InIndex = N.getOperand(2);
7097 SDValue ExVec = InScl.getOperand(0);
7098 SDValue ExIndex = InScl.getOperand(1);
7112 SDValue N0 = N.getOperand(0);
7113 SDValue N1 = N.getOperand(1);
7163 Ops.push_back(N.getOperand(0));
7180 SDValue Src = N.getOperand(0);
7203 SDValue Src = N.getOperand(0);
7391 V = V.getOperand(0);
7400 return (Index == 0) ? V.getOperand(0)
7404 return V.getOperand(Index);
7438 V = DAG.getAnyExtOrTrunc(Op.getOperand(i), dl, MVT::i32);
7444 V = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, V, Op.getOperand(i),
7478 Elt = DAG.getZExtOrTrunc(Op.getOperand(i), dl, MVT::i32);
7480 Elt = DAG.getAnyExtOrTrunc(Op.getOperand(i), dl, MVT::i32);
7484 SDValue NextElt = Op.getOperand(i + 1);
7537 Op.getOperand(0) == Op.getOperand(2) &&
7537 Op.getOperand(0) == Op.getOperand(2) &&
7538 Op.getOperand(1) == Op.getOperand(3) &&
7538 Op.getOperand(1) == Op.getOperand(3) &&
7539 Op.getOperand(0) != Op.getOperand(1)) {
7539 Op.getOperand(0) != Op.getOperand(1)) {
7545 SDValue Ops[4] = { Op.getOperand(0), Op.getOperand(1),
7545 SDValue Ops[4] = { Op.getOperand(0), Op.getOperand(1),
7555 SDValue Elt = Op.getOperand(i);
7569 SDValue Elt = Op.getOperand(i);
7571 !isa<ConstantSDNode>(Elt.getOperand(1)))
7574 MVT VT = Elt.getOperand(0).getSimpleValueType();
7584 SDValue V1 = FirstNonZero.getOperand(0);
7601 if (Elt.getOperand(0) != V1 || EltMaskIdx != EltIdx)
7620 SDValue V2 = Elt.getOperand(0);
7689 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
7690 FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
7692 Ptr = Ptr.getOperand(0);
7757 return findEltLoadSrc(Elt.getOperand(0), Ld, ByteOffset);
7759 if (isa<ConstantSDNode>(Elt.getOperand(1))) {
7761 if ((Idx % 8) == 0 && findEltLoadSrc(Elt.getOperand(0), Ld, ByteOffset)) {
7768 if (isa<ConstantSDNode>(Elt.getOperand(1))) {
7769 SDValue Src = Elt.getOperand(0);
8186 Ld.getOperand(0).getOpcode() == ISD::BITCAST)) {
8188 BOperand = ZeroExtended.getOperand(0);
8190 BOperand = Ld.getOperand(0).getOperand(0);
8190 BOperand = Ld.getOperand(0).getOperand(0);
8426 unsigned Opc = Op.getOperand(i).getOpcode();
8440 SDValue ExtractedFromVec = Op.getOperand(i).getOperand(0);
8440 SDValue ExtractedFromVec = Op.getOperand(i).getOperand(0);
8441 SDValue ExtIdx = Op.getOperand(i).getOperand(1);
8441 SDValue ExtIdx = Op.getOperand(i).getOperand(1);
8475 NV = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, VT, NV, Op.getOperand(Idx),
8487 SDValue In = Op.getOperand(idx);
8514 SDValue In = Op.getOperand(idx);
8525 else if (In != Op.getOperand(SplatIdx))
8535 SDValue Cond = Op.getOperand(SplatIdx);
8568 Op.getOperand(InsertIdx),
8629 SDValue Op0 = Op.getOperand(0);
8630 SDValue Op1 = Op.getOperand(1);
8636 Op0.getOperand(0) == Op1.getOperand(0) &&
8636 Op0.getOperand(0) == Op1.getOperand(0) &&
8637 isa<ConstantSDNode>(Op0.getOperand(1)) &&
8638 isa<ConstantSDNode>(Op1.getOperand(1)));
8642 unsigned I0 = cast<ConstantSDNode>(Op0.getOperand(1))->getZExtValue();
8643 unsigned I1 = cast<ConstantSDNode>(Op1.getOperand(1))->getZExtValue();
8647 V0 = Op0.getOperand(0);
8653 V1 = Op0.getOperand(0);
8663 CanFold = I1 == I0 + 1 && Op0.getOperand(0) == Expected;
8667 CanFold = I0 == I1 + 1 && Op1.getOperand(0) == Expected;
8782 SDValue Op0 = Op.getOperand(0);
8783 SDValue Op1 = Op.getOperand(1);
8790 !isa<ConstantSDNode>(Op0.getOperand(1)) ||
8791 !isa<ConstantSDNode>(Op1.getOperand(1)) ||
8792 Op0.getOperand(1) != Op1.getOperand(1))
8792 Op0.getOperand(1) != Op1.getOperand(1))
8795 unsigned I0 = cast<ConstantSDNode>(Op0.getOperand(1))->getZExtValue();
8807 InVec0 = Op0.getOperand(0);
8812 InVec1 = Op1.getOperand(0);
8819 if (InVec0 != Op0.getOperand(0)) {
8826 if (InVec0 != Op0.getOperand(0))
8830 if (InVec1 != Op1.getOperand(0))
8896 Opnd1 = Opnd0.getOperand(1);
8897 Opnd0 = Opnd0.getOperand(0);
8979 SDValue Op0 = Op.getOperand(0);
8980 SDValue Op1 = Op.getOperand(1);
8983 Op0.getOperand(0) != Op1.getOperand(0) ||
8983 Op0.getOperand(0) != Op1.getOperand(0) ||
8984 !isa<ConstantSDNode>(Op0.getOperand(1)) ||
8985 !isa<ConstantSDNode>(Op1.getOperand(1)) || !Op.hasOneUse())
8992 V0 = Op0.getOperand(0);
8995 V1 = Op0.getOperand(0);
8999 if (SourceVec != Op0.getOperand(0))
9224 SDValue LHS = Elt.getOperand(0);
9225 SDValue RHS = Elt.getOperand(1);
9545 SDValue Op = V.getOperand(Idx);
9553 SrcVec = Op.getOperand(0);
9554 else if (SrcVec != Op.getOperand(0))
9560 ExtractedIndex = ExtractedIndex.getOperand(0);
9568 IndicesVec = ExtractedIndex.getOperand(0);
9569 else if (IndicesVec != ExtractedIndex.getOperand(0))
9572 auto *PermIdx = dyn_cast<ConstantSDNode>(ExtractedIndex.getOperand(1));
9616 SDValue Elt = Op.getOperand(i);
9655 SDValue Elt = Op.getOperand(i);
9700 SDValue Item = Op.getOperand(Idx);
9733 X86::isZeroNode(Op.getOperand(0)) &&
9734 !X86::isZeroNode(Op.getOperand(1))) {
9738 VT, Op.getOperand(1)),
9764 SDValue Item = Op.getOperand(Idx);
9791 SDValue Ops[4] = { Op.getOperand(0), Op.getOperand(1),
9791 SDValue Ops[4] = { Op.getOperand(0), Op.getOperand(1),
9796 if (Ops[i % 2] != Op.getOperand(i))
9834 Op.getOperand(Idx));
9864 Ops[i] = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Op.getOperand(i));
9905 if (!Op.getOperand(0).isUndef())
9906 Result = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Op.getOperand(0));
9911 if (Op.getOperand(i).isUndef()) continue;
9913 Op.getOperand(i), DAG.getIntPtrConstant(i, dl));
9923 if (!Op.getOperand(i).isUndef())
9924 Ops[i] = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Op.getOperand(i));
9964 SDValue SubVec = Op.getOperand(i);
9991 MVT SubVT = Op.getOperand(0).getSimpleValueType();
9998 Op.getOperand(i),
10022 SDValue SubVec = Op.getOperand(i);
10043 SDValue SubVec = Op.getOperand(Idx);
10060 SDValue SubVec = Op.getOperand(Idx);
10082 DAG.getUNDEF(ResVT), Op.getOperand(0),
10084 return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResVT, Vec, Op.getOperand(1),
10336 SDValue CondElt = Cond.getOperand(i);
10468 SDValue Op = V.getOperand(M / Scale);
10493 SDValue Op = V.getOperand((M * Scale) + j);
10798 if (V1.getOperand(0).getOpcode() != ISD::TRUNCATE)
10801 SDValue Src = V1.getOperand(0).getOperand(0);
10801 SDValue Src = V1.getOperand(0).getOperand(0);
12241 SDValue S = V.getOperand(Idx);
12395 SDValue Scalar = V0.getOperand(V0BroadcastIdx);
12446 N0.getOperand(0) != N1.getOperand(0))
12446 N0.getOperand(0) != N1.getOperand(0))
12449 SDValue WideVec = N0.getOperand(0);
12451 if (!WideVT.is256BitVector() || !isa<ConstantSDNode>(N0.getOperand(1)) ||
12452 !isa<ConstantSDNode>(N1.getOperand(1)))
12530 V = V.getOperand(0);
12534 int OpBitWidth = V.getOperand(0).getValueSizeInBits();
12536 V = V.getOperand(OpIdx);
12541 SDValue VOuter = V.getOperand(0), VInner = V.getOperand(1);
12541 SDValue VOuter = V.getOperand(0), VInner = V.getOperand(1);
12542 auto ConstantIdx = dyn_cast<ConstantSDNode>(V.getOperand(2));
12584 V = V.getOperand(BroadcastIdx);
17046 SDValue V1 = Op.getOperand(0);
17047 SDValue V2 = Op.getOperand(1);
17181 SDValue Cond = Op.getOperand(0);
17182 SDValue LHS = Op.getOperand(1);
17183 SDValue RHS = Op.getOperand(2);
17196 SDValue Cond = Op.getOperand(0);
17197 SDValue LHS = Op.getOperand(1);
17198 SDValue RHS = Op.getOperand(2);
17285 if (!Op.getOperand(0).getSimpleValueType().is128BitVector())
17290 Op.getOperand(0), Op.getOperand(1));
17290 Op.getOperand(0), Op.getOperand(1));
17304 isNullConstant(Op.getOperand(1))) &&
17309 DAG.getBitcast(MVT::v4i32, Op.getOperand(0)),
17310 Op.getOperand(1));
17316 if (isa<ConstantSDNode>(Op.getOperand(1)))
17327 SDValue Vec = Op.getOperand(0);
17330 SDValue Idx = Op.getOperand(1);
17375 SDValue Vec = Op.getOperand(0);
17377 SDValue Idx = Op.getOperand(1);
17450 Op.getOperand(0), Op.getOperand(1));
17450 Op.getOperand(0), Op.getOperand(1));
17521 SDValue Vec = Op.getOperand(0);
17522 SDValue Elt = Op.getOperand(1);
17523 SDValue Idx = Op.getOperand(2);
17542 Op.getOperand(2));
17555 SDValue N0 = Op.getOperand(0);
17556 SDValue N1 = Op.getOperand(1);
17557 SDValue N2 = Op.getOperand(2);
17687 if (X86::isZeroNode(Op.getOperand(0)))
17698 Op = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT128, Op.getOperand(0));
17710 SDValue AnyExt = DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i32, Op.getOperand(0));
17731 SDValue Vec = Op.getOperand(0);
17732 SDValue Idx = Op.getOperand(1);
18235 SDValue ShOpLo = Op.getOperand(0);
18236 SDValue ShOpHi = Op.getOperand(1);
18237 SDValue ShAmt = Op.getOperand(2);
18283 SDValue Op0 = Op.getOperand(0);
18284 SDValue Op1 = Op.getOperand(1);
18285 SDValue Amt = Op.getOperand(2);
18332 SDValue Src = Op.getOperand(0);
18383 SDValue Extract = Cast.getOperand(0);
18386 !isa<ConstantSDNode>(Extract.getOperand(1)))
18390 SDValue VecOp = Extract.getOperand(0);
18401 if (!isNullConstant(Extract.getOperand(1))) {
18420 SDValue Src = Op.getOperand(0);
18453 SDValue ValueToStore = Op.getOperand(0);
18495 StackSlot = StackSlot.getOperand(1);
18577 Op.getOperand(0));
18615 Op.getOperand(0));
18649 SDValue N0 = Op.getOperand(0);
18775 SDValue N0 = Op.getOperand(0);
18793 SDValue N0 = Op.getOperand(0);
18835 SDValue Store1 = DAG.getStore(DAG.getEntryNode(), dl, Op.getOperand(0),
18844 SDValue ValueToStore = Op.getOperand(0);
18872 Op.getOperand(0), DAG.getConstant(0, dl, MVT::i64), ISD::SETLT);
18909 EVT TheVT = Op.getOperand(0).getValueType();
18942 SDValue Value = Op.getOperand(0);
19031 SDValue In = Op.getOperand(0);
19169 SDValue In = Op.getOperand(0);
19294 SDValue In = Op.getOperand(0);
19368 SDValue In = Op.getOperand(0);
19517 SDValue Src = Op.getOperand(0);
19610 SDValue In = Op.getOperand(0);
19627 SDValue In = Op.getOperand(0);
19647 assert(Op.getOperand(0).getValueType() != MVT::f128 &&
19657 SDValue LHS = Op.getOperand(0);
19658 SDValue RHS = Op.getOperand(1);
19672 LHS.getOperand(0) != RHS.getOperand(0) ||
19672 LHS.getOperand(0) != RHS.getOperand(0) ||
19673 !isa<ConstantSDNode>(LHS.getOperand(1)) ||
19674 !isa<ConstantSDNode>(RHS.getOperand(1)) ||
19698 SDValue X = LHS.getOperand(0);
19782 SDValue Op0 = Op.getOperand(0);
19787 SDValue Operand = IsFNABS ? Op0.getOperand(0) : Op0;
19801 SDValue Mag = Op.getOperand(0);
19802 SDValue Sign = Op.getOperand(1);
19868 SDValue N0 = Op.getOperand(0);
19904 Opnds.push_back(Op.getOperand(0));
19905 Opnds.push_back(Op.getOperand(1));
19911 Opnds.push_back(I->getOperand(0));
19912 Opnds.push_back(I->getOperand(1));
19923 SDValue Idx = I->getOperand(1);
19927 SDValue Src = I->getOperand(0);
20162 SDValue In = Op0.getOperand(0);
20168 SDValue In = Op1.getOperand(0);
20194 !Cmp.getOperand(0).getValueType().isFloatingPoint() ||
20195 !Cmp.getOperand(1).getValueType().isFloatingPoint())
20367 SDValue Op0 = And.getOperand(0);
20368 SDValue Op1 = And.getOperand(1);
20370 Op0 = Op0.getOperand(0);
20372 Op1 = Op1.getOperand(0);
20378 if (isOneConstant(Op0.getOperand(0))) {
20389 BitNo = Op0.getOperand(1);
20397 Src = AndLHS.getOperand(0);
20398 BitNo = AndLHS.getOperand(1);
20497 SDValue CC = Op.getOperand(2);
20500 SDValue LHS = Op.getOperand(0);
20505 SDValue RHS = Op.getOperand(1);
20519 SDValue Op0 = Op.getOperand(0);
20520 SDValue Op1 = Op.getOperand(1);
20521 SDValue CC = Op.getOperand(2);
20628 SDValue Op0 = Op.getOperand(0);
20629 SDValue Op1 = Op.getOperand(1);
20630 SDValue CC = Op.getOperand(2);
20633 bool isFP = Op.getOperand(1).getSimpleValueType().isFloatingPoint();
20747 if (getTargetConstantBitsFromNode(BC0.getOperand(1),
20752 Op1 = DAG.getBitcast(VT, BC0.getOperand(1));
20760 Op0.getOperand(1) == Op1 && Op0.hasOneUse()) {
20766 SDValue Result = Op0.getOperand(0);
20955 Op0 = Op0.getOperand(0);
20980 SDValue LHS = Op0.getOperand(0);
20981 SDValue RHS = Op0.getOperand(1);
20990 LHS = Op0.getOperand(0);
20991 RHS = Op0.getOperand(1);
21035 X86CC = Op0.getOperand(0);
21042 return Op0.getOperand(1);
21064 SDValue Op0 = Op.getOperand(0);
21065 SDValue Op1 = Op.getOperand(1);
21067 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get();
21091 SDValue LHS = Op.getOperand(0);
21092 SDValue RHS = Op.getOperand(1);
21093 SDValue Carry = Op.getOperand(2);
21094 SDValue Cond = Op.getOperand(3);
21119 SDValue LHS = Op.getOperand(0);
21120 SDValue RHS = Op.getOperand(1);
21195 SDValue VOp0 = V.getOperand(0);
21203 SDValue Cond = Op.getOperand(0);
21204 SDValue Op1 = Op.getOperand(1);
21205 SDValue Op2 = Op.getOperand(2);
21216 VT == Cond.getOperand(0).getSimpleValueType() && Cond->hasOneUse()) {
21217 SDValue CondOp0 = Cond.getOperand(0), CondOp1 = Cond.getOperand(1);
21217 SDValue CondOp0 = Cond.getOperand(0), CondOp1 = Cond.getOperand(1);
21219 cast<CondCodeSDNode>(Cond.getOperand(2))->get(), CondOp0, CondOp1);
21290 else if (Op1.getOpcode() == ISD::BITCAST && Op1.getOperand(0))
21291 Op1Scalar = Op1.getOperand(0);
21295 else if (Op2.getOpcode() == ISD::BITCAST && Op2.getOperand(0))
21296 Op2Scalar = Op2.getOperand(0);
21314 Op1 = Op.getOperand(1);
21315 Op2 = Op.getOperand(2);
21326 Cond.getOperand(1).getOpcode() == X86ISD::CMP &&
21327 isNullConstant(Cond.getOperand(1).getOperand(1))) {
21327 isNullConstant(Cond.getOperand(1).getOperand(1))) {
21328 SDValue Cmp = Cond.getOperand(1);
21334 SDValue CmpOp0 = Cmp.getOperand(0);
21364 Cmp.getOperand(0).getOpcode() == ISD::AND &&
21365 isOneConstant(Cmp.getOperand(0).getOperand(1))) {
21365 isOneConstant(Cmp.getOperand(0).getOperand(1))) {
21366 SDValue CmpOp0 = Cmp.getOperand(0);
21373 (Op2.getOperand(0) == Op1 || Op2.getOperand(1) == Op1)) {
21373 (Op2.getOperand(0) == Op1 || Op2.getOperand(1) == Op1)) {
21375 Op2.getOperand(0) == Op1 ? Op2.getOperand(1) : Op2.getOperand(0);
21375 Op2.getOperand(0) == Op1 ? Op2.getOperand(1) : Op2.getOperand(0);
21375 Op2.getOperand(0) == Op1 ? Op2.getOperand(1) : Op2.getOperand(0);
21391 DAG.getNode(ISD::ANY_EXTEND, DL, VT, CmpOp0.getOperand(0)),
21405 Cond.getOperand(0).getOpcode() == X86ISD::SETCC_CARRY &&
21406 isOneConstant(Cond.getOperand(1)))
21407 Cond = Cond.getOperand(0);
21414 CC = Cond.getOperand(0);
21416 SDValue Cmp = Cond.getOperand(1);
21441 Cond = Cond.getOperand(0);
21486 SDValue T1 = Op1.getOperand(0), T2 = Op2.getOperand(0);
21486 SDValue T1 = Op1.getOperand(0), T2 = Op2.getOperand(0);
21948 return (Op.getOperand(0).getOpcode() == X86ISD::SETCC &&
21949 Op.getOperand(0).hasOneUse() &&
21950 Op.getOperand(1).getOpcode() == X86ISD::SETCC &&
21951 Op.getOperand(1).hasOneUse());
21959 if (isOneConstant(Op.getOperand(1)))
21960 return Op.getOperand(0).getOpcode() == X86ISD::SETCC &&
21961 Op.getOperand(0).hasOneUse();
21967 SDValue Chain = Op.getOperand(0);
21968 SDValue Cond = Op.getOperand(1);
21969 SDValue Dest = Op.getOperand(2);
21976 if (cast<CondCodeSDNode>(Cond.getOperand(2))->get() == ISD::SETEQ &&
21977 isNullConstant(Cond.getOperand(1)) &&
21978 Cond.getOperand(0).getResNo() == 1 &&
21979 (Cond.getOperand(0).getOpcode() == ISD::SADDO ||
21980 Cond.getOperand(0).getOpcode() == ISD::UADDO ||
21981 Cond.getOperand(0).getOpcode() == ISD::SSUBO ||
21982 Cond.getOperand(0).getOpcode() == ISD::USUBO ||
21983 Cond.getOperand(0).getOpcode() == ISD::SMULO ||
21984 Cond.getOperand(0).getOpcode() == ISD::UMULO)) {
21986 Cond = Cond.getOperand(0);
22003 Cond.getOperand(0).getOpcode() == X86ISD::SETCC_CARRY &&
22004 isOneConstant(Cond.getOperand(1)))
22005 Cond = Cond.getOperand(0);
22012 CC = Cond.getOperand(0);
22014 SDValue Cmp = Cond.getOperand(1);
22027 Cond = Cond.getOperand(1);
22049 SDValue Cmp = Cond.getOperand(0).getOperand(1);
22049 SDValue Cmp = Cond.getOperand(0).getOperand(1);
22054 if (Cmp == Cond.getOperand(1).getOperand(1) &&
22054 if (Cmp == Cond.getOperand(1).getOperand(1) &&
22056 CC = Cond.getOperand(0).getOperand(0);
22056 CC = Cond.getOperand(0).getOperand(0);
22059 CC = Cond.getOperand(1).getOperand(0);
22059 CC = Cond.getOperand(1).getOperand(0);
22069 if (Cmp == Cond.getOperand(1).getOperand(1) &&
22069 if (Cmp == Cond.getOperand(1).getOperand(1) &&
22073 (X86::CondCode)Cond.getOperand(0).getConstantOperandVal(0);
22091 (X86::CondCode)Cond.getOperand(1).getConstantOperandVal(0);
22104 (X86::CondCode)Cond.getOperand(0).getConstantOperandVal(0);
22107 Cond = Cond.getOperand(0).getOperand(1);
22107 Cond = Cond.getOperand(0).getOperand(1);
22110 cast<CondCodeSDNode>(Cond.getOperand(2))->get() == ISD::SETOEQ) {
22130 Cond.getOperand(0), Cond.getOperand(1));
22130 Cond.getOperand(0), Cond.getOperand(1));
22141 cast<CondCodeSDNode>(Cond.getOperand(2))->get() == ISD::SETUNE) {
22146 Cond.getOperand(0), Cond.getOperand(1));
22146 Cond.getOperand(0), Cond.getOperand(1));
22160 Cond = Cond.getOperand(0);
22202 SDValue Chain = Op.getOperand(0);
22203 SDValue Size = Op.getOperand(1);
22280 const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue();
22288 return DAG.getStore(Op.getOperand(0), DL, FR, Op.getOperand(1),
22288 return DAG.getStore(Op.getOperand(0), DL, FR, Op.getOperand(1),
22298 SDValue FIN = Op.getOperand(1);
22301 Op.getOperand(0), DL,
22309 Op.getOperand(0), DL,
22318 DAG.getStore(Op.getOperand(0), DL, OVFIN, FIN, MachinePointerInfo(SV, 8));
22326 Op.getOperand(0), DL, RSFIN, FIN,
22342 SDValue Chain = Op.getOperand(0);
22343 SDValue SrcPtr = Op.getOperand(1);
22344 const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue();
22401 SDValue Chain = Op.getOperand(0);
22402 SDValue DstPtr = Op.getOperand(1);
22403 SDValue SrcPtr = Op.getOperand(2);
22404 const Value *DstSV = cast<SrcValueSDNode>(Op.getOperand(3))->getValue();
22405 const Value *SrcSV = cast<SrcValueSDNode>(Op.getOperand(4))->getValue();
22545 ShAmt.getOperand(0).getOpcode() == ISD::EXTRACT_VECTOR_ELT &&
22546 (ShAmt.getOperand(0).getSimpleValueType() == MVT::i16 ||
22547 ShAmt.getOperand(0).getSimpleValueType() == MVT::i8)) {
22548 ShAmt = ShAmt.getOperand(0);
22788 SDValue Rnd = Op.getOperand(2);
22792 Op.getOperand(1),
22797 return DAG.getNode(IntrData->Opc0, dl, Op.getValueType(), Op.getOperand(1));
22800 SDValue Sae = Op.getOperand(2);
22810 return DAG.getNode(Opc, dl, Op.getValueType(), Op.getOperand(1));
22813 SDValue Src2 = Op.getOperand(2);
22820 SDValue Rnd = Op.getOperand(3);
22824 Op.getOperand(1), Src2,
22831 Op.getOperand(1), Src2);
22834 SDValue Sae = Op.getOperand(3);
22844 return DAG.getNode(Opc, dl, Op.getValueType(), Op.getOperand(1),
22845 Op.getOperand(2));
22849 SDValue Src1 = Op.getOperand(1);
22850 SDValue Src2 = Op.getOperand(2);
22851 SDValue Src3 = Op.getOperand(3);
22858 SDValue Rnd = Op.getOperand(4);
22872 return DAG.getNode(IntrData->Opc0, dl, Op.getValueType(), Op.getOperand(1),
22873 Op.getOperand(2), Op.getOperand(3), Op.getOperand(4));
22873 Op.getOperand(2), Op.getOperand(3), Op.getOperand(4));
22873 Op.getOperand(2), Op.getOperand(3), Op.getOperand(4));
22875 SDValue Src = Op.getOperand(1);
22876 SDValue PassThru = Op.getOperand(2);
22877 SDValue Mask = Op.getOperand(3);
22883 SDValue Rnd = Op.getOperand(4);
22897 SDValue Src = Op.getOperand(1);
22898 SDValue PassThru = Op.getOperand(2);
22899 SDValue Mask = Op.getOperand(3);
22900 SDValue Rnd = Op.getOperand(4);
22914 SDValue Src1 = Op.getOperand(1);
22915 SDValue Src2 = Op.getOperand(2);
22916 SDValue passThru = Op.getOperand(3);
22917 SDValue Mask = Op.getOperand(4);
22925 SDValue Rnd = Op.getOperand(5);
22942 SDValue RoundingMode = Op.getOperand(5);
22945 SDValue Sae = Op.getOperand(6);
22956 SDValue Src1 = Op.getOperand(1);
22957 SDValue Src2 = Op.getOperand(2);
22958 SDValue passThru = Op.getOperand(3);
22959 SDValue Mask = Op.getOperand(4);
22960 SDValue Rnd = Op.getOperand(5);
22975 SDValue Src1 = Op.getOperand(1);
22976 SDValue Src2 = Op.getOperand(2);
22977 SDValue passThru = Op.getOperand(3);
22978 SDValue Mask = Op.getOperand(4);
22979 SDValue Sae = Op.getOperand(5);
22992 SDValue Src1 = Op.getOperand(1);
22993 SDValue Src2 = Op.getOperand(2);
22994 SDValue PassThru = Op.getOperand(3);
22995 SDValue Mask = Op.getOperand(4);
22998 SDValue Rnd = Op.getOperand(5);
23011 SDValue Src1 = Op.getOperand(1);
23012 SDValue Src2 = Op.getOperand(2);
23013 SDValue PassThru = Op.getOperand(3);
23014 SDValue Mask = Op.getOperand(4);
23018 SDValue Sae = Op.getOperand(5);
23029 SDValue Src1 = Op.getOperand(1);
23030 SDValue Src2 = Op.getOperand(2);
23031 SDValue Src3 = Op.getOperand(3);
23032 SDValue PassThru = Op.getOperand(4);
23033 SDValue Mask = Op.getOperand(5);
23034 SDValue Sae = Op.getOperand(6);
23047 SDValue Src1 = Op.getOperand(1);
23048 SDValue Src2 = Op.getOperand(2);
23049 SDValue Src3 = Op.getOperand(3);
23050 SDValue PassThru = Op.getOperand(4);
23051 SDValue Mask = Op.getOperand(5);
23055 SDValue Sae = Op.getOperand(6);
23065 SDValue Src1 = Op.getOperand(1);
23066 SDValue Src2 = Op.getOperand(2);
23067 SDValue Src3 = Op.getOperand(3);
23076 SDValue Src1 = Op.getOperand(1);
23077 SDValue Src2 = Op.getOperand(2);
23086 Op.getOperand(2), Op.getOperand(3), Op.getOperand(1));
23086 Op.getOperand(2), Op.getOperand(3), Op.getOperand(1));
23086 Op.getOperand(2), Op.getOperand(3), Op.getOperand(1));
23088 SDValue Src1 = Op.getOperand(1);
23089 SDValue Imm = Op.getOperand(2);
23090 SDValue Mask = Op.getOperand(3);
23104 SDValue CC = Op.getOperand(3);
23109 SDValue Sae = Op.getOperand(4);
23111 return DAG.getNode(IntrData->Opc1, dl, MaskVT, Op.getOperand(1),
23112 Op.getOperand(2), CC, Sae);
23117 return DAG.getNode(IntrData->Opc0, dl, MaskVT, Op.getOperand(1),
23118 Op.getOperand(2), CC);
23121 SDValue Src1 = Op.getOperand(1);
23122 SDValue Src2 = Op.getOperand(2);
23123 SDValue CC = Op.getOperand(3);
23124 SDValue Mask = Op.getOperand(4);
23128 SDValue Sae = Op.getOperand(5);
23149 SDValue LHS = Op.getOperand(1);
23150 SDValue RHS = Op.getOperand(2);
23186 SDValue LHS = Op.getOperand(1);
23187 SDValue RHS = Op.getOperand(2);
23189 SDValue Sae = Op.getOperand(4);
23210 Op.getOperand(1), Op.getOperand(2), Subtarget,
23210 Op.getOperand(1), Op.getOperand(2), Subtarget,
23213 SDValue Mask = Op.getOperand(3);
23214 SDValue DataToCompress = Op.getOperand(1);
23215 SDValue PassThru = Op.getOperand(2);
23217 return Op.getOperand(1);
23228 SDValue Src1 = Op.getOperand(1);
23229 SDValue Src2 = Op.getOperand(2);
23230 SDValue Src3 = Op.getOperand(3);
23231 SDValue Imm = Op.getOperand(4);
23232 SDValue Mask = Op.getOperand(5);
23239 SDValue Sae = Op.getOperand(6);
23257 auto Round = cast<ConstantSDNode>(Op.getOperand(2));
23261 Op.getOperand(1), RoundingMode);
23267 auto Round = cast<ConstantSDNode>(Op.getOperand(3));
23271 Op.getOperand(1), Op.getOperand(2), RoundingMode);
23271 Op.getOperand(1), Op.getOperand(2), RoundingMode);
23281 Op.getOperand(1), Control);
23286 SDVTList VTs = DAG.getVTList(Op.getOperand(2).getValueType(), MVT::i32);
23291 if (isNullConstant(Op.getOperand(1))) {
23292 Res = DAG.getNode(IntrData->Opc1, dl, VTs, Op.getOperand(2),
23293 Op.getOperand(3));
23295 SDValue GenCF = DAG.getNode(X86ISD::ADD, dl, CFVTs, Op.getOperand(1),
23297 Res = DAG.getNode(IntrData->Opc0, dl, VTs, Op.getOperand(2),
23298 Op.getOperand(3), GenCF.getValue(1));
23308 SDValue Src = Op.getOperand(1);
23309 SDValue PassThru = Op.getOperand(2);
23310 SDValue Mask = Op.getOperand(3);
23322 SDValue Src = Op.getOperand(1);
23323 SDValue Rnd = Op.getOperand(2);
23324 SDValue PassThru = Op.getOperand(3);
23325 SDValue Mask = Op.getOperand(4);
23338 SDValue Src = Op.getOperand(1);
23339 SDValue PassThru = Op.getOperand(2);
23340 SDValue Mask = Op.getOperand(3);
23443 SDValue LHS = Op.getOperand(1);
23444 SDValue RHS = Op.getOperand(2);
23552 SDValue Op1 = Op.getOperand(1);
23564 SDValue FnOp = Op.getOperand(1);
23565 SDValue IncomingFPOp = Op.getOperand(2);
23622 SDValue ShAmt = Op.getOperand(2);
23627 Op.getOperand(0), Op.getOperand(1), ShAmt);
23627 Op.getOperand(0), Op.getOperand(1), ShAmt);
23665 Op.getOperand(1), ShAmt);
23883 SDValue Chain = Op.getOperand(0);
23884 SDValue RegNode = Op.getOperand(2);
23901 SDValue Chain = Op.getOperand(0);
23902 SDValue EHGuard = Op.getOperand(2);
23958 return DAG.getNode(X86ISD::RDPKRU, dl, VTs, Op.getOperand(0),
23966 Op.getOperand(0), Op.getOperand(2),
23966 Op.getOperand(0), Op.getOperand(2),
24015 SDValue Chain = Op.getOperand(0);
24027 SDValue Operation = DAG.getNode(Opcode, dl, VTs, Chain, Op.getOperand(2),
24028 Op.getOperand(3));
24044 SDValue Result = DAG.getNode(IntrData->Opc0, dl, VTs, Op.getOperand(0));
24059 SDValue Chain = Op.getOperand(0);
24060 SDValue Src = Op.getOperand(2);
24061 SDValue Base = Op.getOperand(3);
24062 SDValue Index = Op.getOperand(4);
24063 SDValue Mask = Op.getOperand(5);
24064 SDValue Scale = Op.getOperand(6);
24070 SDValue Chain = Op.getOperand(0);
24071 SDValue Src = Op.getOperand(2);
24072 SDValue Base = Op.getOperand(3);
24073 SDValue Index = Op.getOperand(4);
24074 SDValue Mask = Op.getOperand(5);
24075 SDValue Scale = Op.getOperand(6);
24081 SDValue Chain = Op.getOperand(0);
24082 SDValue Base = Op.getOperand(2);
24083 SDValue Mask = Op.getOperand(3);
24084 SDValue Index = Op.getOperand(4);
24085 SDValue Src = Op.getOperand(5);
24086 SDValue Scale = Op.getOperand(6);
24095 SDValue Chain = Op.getOperand(0);
24096 SDValue Mask = Op.getOperand(2);
24097 SDValue Index = Op.getOperand(3);
24098 SDValue Base = Op.getOperand(4);
24099 SDValue Scale = Op.getOperand(5);
24126 SDValue InTrans = DAG.getNode(IntrData->Opc0, dl, VTs, Op.getOperand(0));
24136 SDValue Mask = Op.getOperand(4);
24137 SDValue DataToTruncate = Op.getOperand(3);
24138 SDValue Addr = Op.getOperand(2);
24139 SDValue Chain = Op.getOperand(0);
24309 SDValue Chain = Op.getOperand(0);
24310 SDValue Offset = Op.getOperand(1);
24311 SDValue Handler = Op.getOperand(2);
24349 Op.getOperand(0), Op.getOperand(1));
24349 Op.getOperand(0), Op.getOperand(1));
24356 Op.getOperand(0), Op.getOperand(1));
24356 Op.getOperand(0), Op.getOperand(1));
24363 Op.getOperand(0));
24367 return Op.getOperand(0);
24372 SDValue Root = Op.getOperand(0);
24373 SDValue Trmp = Op.getOperand(1); // trampoline
24374 SDValue FPtr = Op.getOperand(2); // nested function
24375 SDValue Nest = Op.getOperand(3); // 'nest' parameter value
24378 const Value *TrmpAddr = cast<SrcValueSDNode>(Op.getOperand(4))->getValue();
24435 cast<Function>(cast<SrcValueSDNode>(Op.getOperand(5))->getValue());
24592 SDValue Src = Op.getOperand(0);
24650 Op = DAG.getNode(ISD::ZERO_EXTEND, dl, NewVT, Op.getOperand(0));
24683 SDValue Op0 = DAG.getBitcast(CurrVT, Op.getOperand(0));
24774 Op = Op.getOperand(0);
24806 SDValue N0 = Op.getOperand(0);
24835 SDValue LHS = Op.getOperand(0);
24840 SDValue RHS = Op.getOperand(1);
24864 SDValue LHS = Op.getOperand(0);
24869 SDValue RHS = Op.getOperand(1);
24889 Op.getOperand(0), Op.getOperand(1));
24889 Op.getOperand(0), Op.getOperand(1));
24900 SDValue X = Op.getOperand(0), Y = Op.getOperand(1);
24900 SDValue X = Op.getOperand(0), Y = Op.getOperand(1);
24952 SDValue N0 = Op.getOperand(0);
24963 SDValue Src = Op.getOperand(0);
24988 SDValue N0 = Op.getOperand(0);
24989 SDValue N1 = Op.getOperand(1);
25024 return DAG.getNode(ISD::AND, dl, VT, Op.getOperand(0), Op.getOperand(1));
25024 return DAG.getNode(ISD::AND, dl, VT, Op.getOperand(0), Op.getOperand(1));
25030 SDValue A = Op.getOperand(0);
25031 SDValue B = Op.getOperand(1);
25064 LoOps.push_back(DAG.getAnyExtOrTrunc(B.getOperand(i + j), dl,
25066 HiOps.push_back(DAG.getAnyExtOrTrunc(B.getOperand(i + j + 8), dl,
25169 SDValue A = Op.getOperand(0);
25170 SDValue B = Op.getOperand(1);
25336 SDValue LoOp = B.getOperand(i + j);
25337 SDValue HiOp = B.getOperand(i + j + 8);
25490 SDValue R = Op.getOperand(0);
25491 SDValue Amt = Op.getOperand(1);
25614 SDValue R = Op.getOperand(0);
25615 SDValue Amt = Op.getOperand(1);
25679 Amt.getOperand(0).getOpcode() == ISD::BUILD_VECTOR) {
25680 Amt = Amt.getOperand(0);
25684 Vals[i] = Amt.getOperand(i);
25687 if (Vals[j] != Amt.getOperand(i + j))
25692 return DAG.getNode(X86OpcV, dl, VT, R, Op.getOperand(1));
25765 SDValue R = Op.getOperand(0);
25766 SDValue Amt = Op.getOperand(1);
26026 LoAmt.push_back(Amt.getOperand(i + j));
26027 HiAmt.push_back(Amt.getOperand(i + j + 8));
26248 SDValue R = Op.getOperand(0);
26249 SDValue Amt = Op.getOperand(1);
26679 return DAG.getNode(X86ISD::MFENCE, dl, MVT::Other, Op.getOperand(0));
26681 SDValue Chain = Op.getOperand(0);
26686 return DAG.getNode(X86ISD::MEMBARRIER, dl, MVT::Other, Op.getOperand(0));
26705 SDValue cpIn = DAG.getCopyToReg(Op.getOperand(0), DL, Reg,
26706 Op.getOperand(2), SDValue());
26708 Op.getOperand(1),
26709 Op.getOperand(3),
26758 SDValue Src = Op.getOperand(0);
26782 std::tie(Lo, Hi) = DAG.SplitVector(Op.getOperand(0), dl);
26955 SDValue Op0 = Op.getOperand(0);
27002 SDValue In = Op.getOperand(0);
27054 SDValue In = Op.getOperand(0);
27262 SDValue Carry = Op.getOperand(2);
27269 SDValue Sum = DAG.getNode(Opc, DL, VTs, Op.getOperand(0),
27270 Op.getOperand(1), Carry.getValue(1));
27287 SDValue Arg = Op.getOperand(0);
27356 SDValue N1 = InOp.getOperand(1);
27359 InOp = InOp.getOperand(0);
27368 Ops.push_back(InOp.getOperand(i));
27370 EVT EltVT = InOp.getOperand(0).getValueType();
27620 Ops.push_back(Op.getOperand(0));
27641 Ops.push_back(Op.getOperand(0));
29090 if (isa<MaskedLoadSDNode>(ExtVal.getOperand(0)))
29093 EVT SrcVT = ExtVal.getOperand(0).getValueType();
31440 ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1));
31477 SDValue NewOp = TLO.DAG.getNode(ISD::AND, DL, VT, Op.getOperand(0), NewC);
31503 unsigned NumLoBits = Op.getOperand(0).getValueType().getVectorNumElements();
31509 SDValue Src = Op.getOperand(0);
31521 if (auto *ShiftImm = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
31527 Known = DAG.computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
31556 Known2 = DAG.computeKnownBits(Op.getOperand(0), DemandedLHS, Depth + 1);
31561 Known2 = DAG.computeKnownBits(Op.getOperand(1), DemandedRHS, Depth + 1);
31573 Known = DAG.computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
31574 Known2 = DAG.computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
31583 Known = DAG.computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
31584 Known2 = DAG.computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
31594 Op.getOperand(0).getValueType().getScalarType() == MVT::i8 &&
31602 Known = DAG.computeKnownBits(Op.getOperand(1), Depth + 1);
31606 KnownBits Known2 = DAG.computeKnownBits(Op.getOperand(0), Depth + 1);
31680 SDValue Src = Op.getOperand(0);
31695 unsigned SrcBits = Op.getOperand(0).getScalarValueSizeInBits();
31698 Tmp0 = DAG.ComputeNumSignBits(Op.getOperand(0), DemandedLHS, Depth + 1);
31700 Tmp1 = DAG.ComputeNumSignBits(Op.getOperand(1), DemandedRHS, Depth + 1);
31708 SDValue Src = Op.getOperand(0);
31719 SDValue Src = Op.getOperand(0);
31738 DAG.ComputeNumSignBits(Op.getOperand(0), DemandedElts, Depth + 1);
31741 DAG.ComputeNumSignBits(Op.getOperand(1), DemandedElts, Depth + 1);
31746 unsigned Tmp0 = DAG.ComputeNumSignBits(Op.getOperand(0), Depth+1);
31748 unsigned Tmp1 = DAG.ComputeNumSignBits(Op.getOperand(1), Depth+1);
32344 Src.getOperand(0).isUndef() &&
32345 Src.getOperand(1).getValueSizeInBits() == BaseMaskEltSizeInBits &&
32346 MayFoldLoad(Src.getOperand(1)) && isNullConstant(Src.getOperand(2))) {
32346 MayFoldLoad(Src.getOperand(1)) && isNullConstant(Src.getOperand(2))) {
32349 Src.getOperand(1)));
32443 MayFoldLoad(V1.getOperand(0))) {
32446 Res = V1.getOperand(0);
32833 isa<ConstantSDNode>(Src.getOperand(1))) {
32835 Src = Src.getOperand(0);
33309 SDValue V = N.getOperand(0);
33310 for (; V.hasOneUse(); V = V.getOperand(0)) {
33355 if (V.getOperand(0) != V.getOperand(1) ||
33355 if (V.getOperand(0) != V.getOperand(1) ||
33356 !V->isOnlyUserOf(V.getOperand(0).getNode()))
33359 V = V.getOperand(0);
33374 V = V.getOperand(0);
33393 V = DAG.getNode(V.getOpcode(), DL, V.getValueType(), V.getOperand(0),
33400 if (V.getValueType() != W.getOperand(0).getValueType())
33401 V = DAG.getBitcast(W.getOperand(0).getValueType(), V);
33415 V = DAG.getNode(W.getOpcode(), DL, W.getValueType(), V, W.getOperand(1));
33440 auto BC0 = peekThroughBitcasts(N.getOperand(0));
33441 auto BC1 = peekThroughBitcasts(N.getOperand(1));
33452 Lo = BC1.getOperand(0);
33453 Hi = BC0.getOperand(1);
33455 Lo = BC0.getOperand(Opcode == X86ISD::UNPCKH ? 1 : 0);
33456 Hi = BC1.getOperand(Opcode == X86ISD::UNPCKH ? 1 : 0);
33465 SDValue Src = N.getOperand(0);
33502 return DAG.getNode(X86ISD::VBROADCAST, DL, VT, Src.getOperand(0));
33539 SDValue N0 = N.getOperand(0);
33540 SDValue N1 = N.getOperand(1);
33545 N0.getOperand(0).getValueType() == N1.getOperand(0).getValueType()) {
33545 N0.getOperand(0).getValueType() == N1.getOperand(0).getValueType()) {
33546 MVT SrcVT = N0.getOperand(0).getSimpleValueType();
33554 VT, DAG.getNode(X86ISD::BLENDI, DL, SrcVT, N0.getOperand(0),
33555 N1.getOperand(0),
33564 SDValue N0 = N.getOperand(0);
33565 SDValue N1 = N.getOperand(1);
33568 N0.getOperand(0).getScalarValueSizeInBits() == EltSizeInBits) {
33569 SDValue Src = N0.getOperand(0);
33584 SDValue N0 = N.getOperand(0);
33585 SDValue N1 = N.getOperand(1);
33593 SDValue N10 = N1.getOperand(0);
33594 SDValue N11 = N1.getOperand(1);
33613 SDValue Op0 = N.getOperand(0);
33614 SDValue Op1 = N.getOperand(1);
33615 SDValue Op2 = N.getOperand(2);
33723 return N.getOperand(0);
33726 SDValue V = N.getOperand(0);
33757 SDValue D = peekThroughOneUseBitcasts(V.getOperand(0));
33775 V = DAG.getBitcast(VT, D.getOperand(0));
33917 FMAdd.getOperand(0) != FMSub.getOperand(0) || !FMAdd.hasOneUse() ||
33917 FMAdd.getOperand(0) != FMSub.getOperand(0) || !FMAdd.hasOneUse() ||
33918 FMAdd.getOperand(1) != FMSub.getOperand(1) || !FMSub.hasOneUse() ||
33918 FMAdd.getOperand(1) != FMSub.getOperand(1) || !FMSub.hasOneUse() ||
33919 FMAdd.getOperand(2) != FMSub.getOperand(2))
33919 FMAdd.getOperand(2) != FMSub.getOperand(2))
33932 return DAG.getNode(Opcode, DL, VT, FMAdd.getOperand(0), FMAdd.getOperand(1),
33932 return DAG.getNode(Opcode, DL, VT, FMAdd.getOperand(0), FMAdd.getOperand(1),
33933 FMAdd.getOperand(2));
33997 N1.getNumOperands() != 2 || !N0.getOperand(1).isUndef() ||
33998 !N1.getOperand(1).isUndef())
34011 SDValue Concat = DAG.getNode(ISD::CONCAT_VECTORS, DL, VT, N0.getOperand(0),
34012 N1.getOperand(0));
34030 SrcOp.getOperand(0).getValueType() == VT &&
34031 isNullConstant(SrcOp.getOperand(1)))
34044 if (!HOp.getOperand(0).isUndef() && !HOp.getOperand(1).isUndef() &&
34044 if (!HOp.getOperand(0).isUndef() && !HOp.getOperand(1).isUndef() &&
34045 HOp.getOperand(0) != HOp.getOperand(1))
34045 HOp.getOperand(0) != HOp.getOperand(1))
34054 if (HorizOp.getOperand(0).isUndef()) {
34055 assert(!HorizOp.getOperand(1).isUndef() && "Not expecting foldable h-op");
34056 X = HorizOp.getOperand(1);
34057 } else if (HorizOp.getOperand(1).isUndef()) {
34058 assert(!HorizOp.getOperand(0).isUndef() && "Not expecting foldable h-op");
34059 X = HorizOp.getOperand(0);
34196 (N->getOperand(0).getOperand(0).getValueType() == MVT::v4f32 ||
34197 N->getOperand(0).getOperand(0).getValueType() == MVT::v4i32)) {
34198 SDValue In = N->getOperand(0).getOperand(0);
34209 if (In.getOperand(0).getValueType() == MVT::v2f64 ||
34210 In.getOperand(0).getValueType() == MVT::v2i64)
34223 N->getOperand(0).getOperand(0).isUndef() &&
34224 isNullConstant(N->getOperand(0).getOperand(2))) {
34225 SDValue In = N->getOperand(0).getOperand(1);
34229 Movl, N->getOperand(0).getOperand(2));
34267 SDValue LHS = Op.getOperand(0);
34268 SDValue RHS = Op.getOperand(1);
34283 SDValue Amt = Op.getOperand(1);
34307 SDValue Src = Op.getOperand(0);
34316 SDValue Src = Op.getOperand(0);
34317 auto *Amt = cast<ConstantSDNode>(Op.getOperand(1));
34340 Op, TLO.DAG.getNode(NewOpc, dl, VT, Src.getOperand(0), NewSA));
34355 SDValue Src = Op.getOperand(0);
34356 auto *Amt = cast<ConstantSDNode>(Op.getOperand(1));
34379 Op, TLO.DAG.getNode(NewOpc, dl, VT, Src.getOperand(0), NewSA));
34395 SDValue Src = Op.getOperand(0);
34406 SDValue N0 = Op.getOperand(0);
34407 SDValue N1 = Op.getOperand(1);
34446 if (SimplifyDemandedVectorElts(Op.getOperand(0), DemandedLHS, LHSUndef,
34450 if (SimplifyDemandedVectorElts(Op.getOperand(1), DemandedRHS, RHSUndef,
34458 SDValue Src = Op.getOperand(0);
34471 if (SimplifyDemandedVectorElts(Op.getOperand(0), DemandedElts, SelUndef,
34477 if (SimplifyDemandedVectorElts(Op.getOperand(1), DemandedElts, LHSUndef,
34482 if (SimplifyDemandedVectorElts(Op.getOperand(2), DemandedElts, RHSUndef,
34491 SDValue Src = Op.getOperand(0);
34510 SDValue Mask = Op.getOperand(0);
34520 SDValue Mask = Op.getOperand(1);
34529 SDValue Mask = Op.getOperand(2);
34555 extractSubVector(Op.getOperand(0), 0, TLO.DAG, DL, ExtSizeInBits);
34566 SDValue Src = Op.getOperand(0);
34591 extractSubVector(Op.getOperand(0), 0, TLO.DAG, DL, ExtSizeInBits);
34593 TLO.DAG.getNode(Opc, DL, Ext0.getValueType(), Ext0, Op.getOperand(1));
34607 SDValue Ext = extractSubVector(Op.getOperand(0), 2, TLO.DAG, DL, 128);
34632 extractSubVector(Op.getOperand(0), 0, TLO.DAG, DL, ExtSizeInBits);
34634 extractSubVector(Op.getOperand(1), 0, TLO.DAG, DL, ExtSizeInBits);
34719 SDValue LHS = Op.getOperand(0);
34720 SDValue RHS = Op.getOperand(1);
34744 SDValue Op0 = Op.getOperand(0);
34745 SDValue Op1 = Op.getOperand(1);
34759 if (auto *Shift2Imm = dyn_cast<ConstantSDNode>(Op0.getOperand(1))) {
34763 return TLO.CombineTo(Op, Op0.getOperand(0));
34767 NewOpc, SDLoc(Op), VT, Op0.getOperand(0),
34788 if (auto *ShiftImm = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
34795 if (SimplifyDemandedBits(Op.getOperand(0), DemandedMask,
34809 SDValue Op0 = Op.getOperand(0);
34810 SDValue Op1 = Op.getOperand(1);
34824 if (Op0.getOpcode() == X86ISD::VSHLI && Op1 == Op0.getOperand(1)) {
34825 SDValue Op00 = Op0.getOperand(0);
34860 SDValue Vec = Op.getOperand(0);
34861 auto *CIdx = dyn_cast<ConstantSDNode>(Op.getOperand(1));
34889 Op, TLO.DAG.getNode(Opc, SDLoc(Op), VT, V, Op.getOperand(1)));
34898 SDValue Vec = Op.getOperand(0);
34899 SDValue Scl = Op.getOperand(1);
34900 auto *CIdx = dyn_cast<ConstantSDNode>(Op.getOperand(2));
34938 if (SimplifyDemandedBits(Op.getOperand(0), SignMask, DemandedLHS,
34941 if (SimplifyDemandedBits(Op.getOperand(1), SignMask, DemandedRHS,
34951 ISD::isBuildVectorAllZeros(Op.getOperand(0).getNode()))
34952 return TLO.CombineTo(Op, Op.getOperand(1));
34955 SDValue Src = Op.getOperand(0);
35003 SDValue Vec = Op.getOperand(0);
35004 auto *CIdx = dyn_cast<ConstantSDNode>(Op.getOperand(2));
35141 LdNode = LdNode.getOperand(0);
35181 return Src.getOperand(0).getValueSizeInBits() == Size;
35185 return checkBitcastSrcVectorSize(Src.getOperand(0), Size) &&
35186 checkBitcastSrcVectorSize(Src.getOperand(1), Size);
35202 signExtendBitcastSrcVector(DAG, SExtVT, Src.getOperand(0), DL),
35203 signExtendBitcastSrcVector(DAG, SExtVT, Src.getOperand(1), DL));
35226 (Src.getOperand(0).getValueType() == MVT::v16i8 ||
35227 Src.getOperand(0).getValueType() == MVT::v32i8 ||
35228 Src.getOperand(0).getValueType() == MVT::v64i8);
35323 SDValue In = Op.getOperand(Idx);
35363 SDValue LHS = Op.getOperand(0);
35364 SDValue RHS = Op.getOperand(1);
35367 LHS.getOperand(0).getValueType() == DstVT)
35368 return DAG.getNode(Op.getOpcode(), SDLoc(N), DstVT, LHS.getOperand(0),
35372 RHS.getOperand(0).getValueType() == DstVT)
35374 DAG.getBitcast(DstVT, LHS), RHS.getOperand(0));
35480 N0.getOperand(0).getValueType() == MVT::v4i32 &&
35481 ISD::isBuildVectorAllZeros(N0.getOperand(1).getNode()) &&
35482 cast<CondCodeSDNode>(N0.getOperand(2))->get() == ISD::SETLT) {
35483 SDValue N00 = N0.getOperand(0);
35487 N00.getOperand(0).getValueType() == MVT::v4f32)) {
35516 SDValue LastOp = N0.getOperand(N0.getNumOperands() - 1);
35544 N0.getOperand(0).getValueType() == MVT::v16i1 &&
35545 isNullConstant(N0.getOperand(1)))
35547 DAG.getBitcast(MVT::i16, N0.getOperand(0)));
35586 N0.getOperand(0).getValueType() == SrcVT.getScalarType()) {
35589 SDValue Op = N0.getOperand(i);
35594 SDValue N00 = N0.getOperand(0);
35613 isNullConstant(N0.getOperand(1))) {
35614 SDValue N00 = N0.getOperand(0);
35670 SDValue LogicOp0 = N0.getOperand(0);
35671 SDValue LogicOp1 = N0.getOperand(1);
35676 LogicOp0.hasOneUse() && LogicOp0.getOperand(0).getValueType() == VT &&
35677 !isa<ConstantSDNode>(LogicOp0.getOperand(0))) {
35679 return DAG.getNode(FPOpcode, DL0, VT, LogicOp0.getOperand(0), CastedOp1);
35683 LogicOp1.hasOneUse() && LogicOp1.getOperand(0).getValueType() == VT &&
35684 !isa<ConstantSDNode>(LogicOp1.getOperand(0))) {
35686 return DAG.getNode(FPOpcode, DL0, VT, LogicOp1.getOperand(0), CastedOp0);
35700 Op0 = AbsOp1.getOperand(0);
35701 Op1 = AbsOp1.getOperand(1);
35705 Op0.getOperand(0).getValueType().getVectorElementType() != MVT::i8 ||
35707 Op1.getOperand(0).getValueType().getVectorElementType() != MVT::i8)
35719 EVT InVT = Zext0.getOperand(0).getValueType();
35726 Ops[0] = Zext0.getOperand(0);
35729 Ops[0] = Zext1.getOperand(0);
35990 Root = Root.getOperand(0);
36058 SDValue SrcOp = SrcBC.getOperand(0);
36085 Src = extract128BitVector(Src.getOperand(0), 0, DAG, dl);
36182 EVT OpVT = Vec.getOperand(0).getValueType().getScalarType();
36189 Vec.getOperand(0), Index);
36191 Vec.getOperand(1), Index);
36192 return DAG.getNode(Vec.getOpcode(), DL, VT, Ext0, Ext1, Vec.getOperand(2));
36205 Vec.getOperand(0).getOpcode() == ISD::SETCC &&
36206 Vec.getOperand(0).getValueType().getScalarType() == MVT::i1 &&
36207 Vec.getOperand(0).getOperand(0).getValueType() == VecVT) {
36207 Vec.getOperand(0).getOperand(0).getValueType() == VecVT) {
36211 Vec.getOperand(0).getValueType().getScalarType(),
36212 Vec.getOperand(0), Index);
36214 Vec.getOperand(1), Index);
36216 Vec.getOperand(2), Index);
36420 InputVector.getOperand(2) == EltIdx) {
36421 assert(SrcVT == InputVector.getOperand(0).getValueType() &&
36423 SDValue Scl = InputVector.getOperand(1);
36440 SDValue MMXSrc = InputVector.getOperand(0);
36450 SDValue MMXSrc = InputVector.getOperand(0);
36577 SDValue CC = Cond.getOperand(2);
36580 Cond.getOperand(0).getValueType().isInteger());
36581 Cond = DAG.getSetCC(DL, CondVT, Cond.getOperand(0), Cond.getOperand(1),
36581 Cond = DAG.getSetCC(DL, CondVT, Cond.getOperand(0), Cond.getOperand(1),
36840 ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
36844 if (DAG.isEqualTo(LHS, Cond.getOperand(0)) &&
36845 DAG.isEqualTo(RHS, Cond.getOperand(1))) {
36913 } else if (DAG.isEqualTo(LHS, Cond.getOperand(1)) &&
36914 DAG.isEqualTo(RHS, Cond.getOperand(0))) {
36991 ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
36992 SDValue AndNode = Cond.getOperand(0);
36994 isNullConstant(Cond.getOperand(1)) &&
36995 isOneConstant(AndNode.getOperand(1))) {
37026 isTargetShuffle(Op.getOperand(0).getOpcode()) &&
37027 isNullConstant(Op.getOperand(1)) &&
37028 TLI.isTypeLegal(Op.getOperand(0).getValueType()) &&
37029 Op.hasOneUse() && Op.getOperand(0).hasOneUse();
37038 EVT SrcVT = SelectableLHS ? LHS.getOperand(0).getValueType()
37039 : RHS.getOperand(0).getValueType();
37074 DAG.isEqualTo(LHS, Cond.getOperand(0)) &&
37075 DAG.isEqualTo(RHS, Cond.getOperand(1))) {
37076 ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
37083 Cond.getOperand(0), Cond.getOperand(1), NewCC);
37083 Cond.getOperand(0), Cond.getOperand(1), NewCC);
37096 ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
37109 Other->getOperand(0) == Cond.getOperand(0)) {
37165 ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
37181 SDValue OpLHS = Other.getOperand(0), OpRHS = Other.getOperand(1);
37181 SDValue OpLHS = Other.getOperand(0), OpRHS = Other.getOperand(1);
37273 SDValue CmpLHS = Cmp.getOperand(0);
37274 SDValue CmpRHS = Cmp.getOperand(1);
37283 SDValue OpRHS = CmpLHS.getOperand(2);
37306 /*Chain*/ CmpLHS.getOperand(0), /*LHS*/ CmpLHS.getOperand(1),
37306 /*Chain*/ CmpLHS.getOperand(0), /*LHS*/ CmpLHS.getOperand(1),
37366 SDValue Op1 = Cmp.getOperand(0);
37367 SDValue Op2 = Cmp.getOperand(1);
37395 if (isOneConstant(SetCC.getOperand(0)))
37397 if (isOneConstant(SetCC.getOperand(1)))
37401 SetCC = SetCC.getOperand(OpIdx);
37404 SetCC = SetCC.getOperand(0);
37423 return SetCC.getOperand(1);
37426 ConstantSDNode *FVal = dyn_cast<ConstantSDNode>(SetCC.getOperand(0));
37427 ConstantSDNode *TVal = dyn_cast<ConstantSDNode>(SetCC.getOperand(1));
37433 SDValue Op = SetCC.getOperand(0);
37437 Op = Op.getOperand(0);
37461 return SetCC.getOperand(3);
37515 if (isAllOnesConstant(EFLAGS.getOperand(1))) {
37516 SDValue Carry = EFLAGS.getOperand(0);
37522 isOneConstant(Carry.getOperand(1))))
37523 Carry = Carry.getOperand(0);
37528 SDValue CarryOp1 = Carry.getOperand(1);
37541 !isa<ConstantSDNode>(CarryOp1.getOperand(1))) {
37544 CarryOp1.getOperand(1), CarryOp1.getOperand(0));
37544 CarryOp1.getOperand(1), CarryOp1.getOperand(0));
37552 isOneConstant(CarryOp1.getOperand(1)))
37705 (CmpAgainst = dyn_cast<ConstantSDNode>(Cond.getOperand(1))) &&
37706 !isa<ConstantSDNode>(Cond.getOperand(0))) {
37716 SDValue Ops[] = {FalseOp, Cond.getOperand(0),
37766 Cond.getOpcode() == X86ISD::CMP && isNullConstant(Cond.getOperand(1))) {
37775 if (Const == Cond.getOperand(0))
37776 Const = Cond.getOperand(1);
37780 Add.hasOneUse() && isa<ConstantSDNode>(Add.getOperand(1)) &&
37781 (Add.getOperand(0).getOpcode() == ISD::CTTZ_ZERO_UNDEF ||
37782 Add.getOperand(0).getOpcode() == ISD::CTTZ) &&
37783 Add.getOperand(0).getOperand(0) == Cond.getOperand(0)) {
37783 Add.getOperand(0).getOperand(0) == Cond.getOperand(0)) {
37783 Add.getOperand(0).getOperand(0) == Cond.getOperand(0)) {
37786 SDValue Diff = DAG.getNode(ISD::SUB, DL, VT, Const, Add.getOperand(1));
37788 DAG.getNode(X86ISD::CMOV, DL, VT, Diff, Add.getOperand(0),
37790 return DAG.getNode(ISD::ADD, DL, VT, CMov, Add.getOperand(1));
38045 N0.getOperand(0).getScalarValueSizeInBits() <= 8) &&
38047 N1.getOperand(0).getScalarValueSizeInBits() <= 8))
38262 N0.getOperand(1).getOpcode() == ISD::Constant) {
38263 SDValue N00 = N0.getOperand(0);
38281 N00.getOperand(0).getOpcode() == X86ISD::SETCC_CARRY) {
38285 N00.getOperand(0).getOpcode() == X86ISD::SETCC_CARRY) {
38286 MaskOK = Mask.isIntN(N00.getOperand(0).getValueSizeInBits());
38330 N0.getOperand(1).getOpcode() != ISD::Constant)
38333 SDValue N00 = N0.getOperand(0);
38334 SDValue N01 = N0.getOperand(1);
38383 auto *AndC = dyn_cast<ConstantSDNode>(N0.getOperand(1));
38407 SDValue NewShift = DAG.getNode(ISD::SRL, DL, VT, N0.getOperand(0), N1);
38490 N0.getOperand(0).getValueType() == MVT::v8i32) {
38495 return DAG.getNode(X86ISD::VTRUNC, SDLoc(N), VT, N0.getOperand(0));
38500 N0.getOperand(0), DAG.getUNDEF(MVT::v8i32));
38583 unsigned ShiftVal2 = cast<ConstantSDNode>(N0.getOperand(1))->getZExtValue();
38587 return DAG.getNode(X86ISD::VSRAI, SDLoc(N), VT, N0.getOperand(0),
38659 SDValue CMP0 = N0.getOperand(1);
38660 SDValue CMP1 = N1.getOperand(1);
38809 if (N0.getOperand(0).getValueType() != VT)
38814 N1.getOperand(0).getValueType() == VT;
38825 N0 = N0.getOperand(0);
38827 N1 = N1.getOperand(0);
38859 SDValue N00 = N0.getOperand(0);
38860 SDValue N10 = N1.getOperand(0);
38929 SDValue ShiftedIndex = Base.getOperand(0);
38934 return ShiftedIndex.getOperand(0);
39064 SDValue X = N0.getOperand(0);
39126 !N->getOperand(0).getOperand(0).hasOneUse())
39130 SDValue Src = N->getOperand(0).getOperand(0);
39141 SDValue SubVec = Src.getOperand(0);
39150 EVT SetccVT = SubVec.getOperand(0).getValueType();
39249 isa<ConstantSDNode>(N->getOperand(0).getOperand(1))) {
39251 SDValue SrcVec = N->getOperand(0).getOperand(0);
39281 N->getOperand(0).getOperand(1));
39307 !N0.getOperand(1).hasOneUse() || !N1.getOperand(1).hasOneUse()))
39307 !N0.getOperand(1).hasOneUse() || !N1.getOperand(1).hasOneUse()))
39313 if (!getTargetConstantBitsFromNode(N0.getOperand(1), 8, UndefElts0, EltBits0,
39316 if (!getTargetConstantBitsFromNode(N1.getOperand(1), 8, UndefElts1, EltBits1,
39331 DAG.getNode(X86ISD::ANDNP, DL, VT, DAG.getBitcast(VT, N0.getOperand(1)),
39332 DAG.getBitcast(VT, N1.getOperand(0)));
39352 Mask = N1.getOperand(0);
39353 X = N1.getOperand(1);
39356 if (N0.getOperand(0) == Mask)
39357 Y = N0.getOperand(1);
39358 else if (N0.getOperand(1) == Mask)
39359 Y = N0.getOperand(0);
39491 SDValue Cmp = Op.getOperand(1);
39492 EVT VT = Cmp.getOperand(0).getValueType();
39533 isNullConstant(N->getOperand(1).getOperand(1)) &&
39667 SDValue ShAmt0 = N0.getOperand(1);
39670 SDValue ShAmt1 = N1.getOperand(1);
39677 isa<ConstantSDNode>(ShAmt0.getOperand(1)) &&
39680 ShAmt0 = ShAmt0.getOperand(0);
39684 isa<ConstantSDNode>(ShAmt1.getOperand(1)) &&
39687 ShAmt1 = ShAmt1.getOperand(0);
39691 ShAmt0 = ShAmt0.getOperand(0);
39693 ShAmt1 = ShAmt1.getOperand(0);
39697 SDValue Op0 = N0.getOperand(0);
39698 SDValue Op1 = N1.getOperand(0);
39721 SDValue Sum = ShAmt1.getOperand(0);
39723 SDValue ShAmt1Op1 = ShAmt1.getOperand(1);
39725 isa<ConstantSDNode>(ShAmt1Op1.getOperand(1)) &&
39728 ShAmt1Op1 = ShAmt1Op1.getOperand(0);
39731 ShAmt1Op1 = ShAmt1Op1.getOperand(0);
39742 SDValue Mask = ShAmt1.getOperand(1);
39745 SDValue ShAmt1Op0 = ShAmt1.getOperand(0);
39747 ShAmt1Op0 = ShAmt1Op0.getOperand(0);
39751 isa<ConstantSDNode>(Op1.getOperand(1)) &&
39753 return GetFunnelShift(Op0, Op1.getOperand(0), ShAmt0);
39757 Op1.getOperand(0) == Op1.getOperand(1)) {
39757 Op1.getOperand(0) == Op1.getOperand(1)) {
39758 return GetFunnelShift(Op0, Op1.getOperand(0), ShAmt0);
39789 SDValue Shift = N0.getOperand(0);
39799 if (!isa<ConstantSDNode>(Shift.getOperand(1)) ||
39807 SDValue ShiftOp = Shift.getOperand(0);
39854 isConstOrConstSplat(Shift.getOperand(1), /*AllowUndefs*/ true);
39861 return DAG.getNode(X86ISD::PCMPGT, SDLoc(N), VT, Shift.getOperand(0), Ones);
39891 ISD::isConstantSplatVector(V.getOperand(1).getNode(), Limit))
39892 return V.getOperand(0);
39912 return DAG.getNode(ISD::SMAX, DL, InVT, SMin, In.getOperand(1));
39936 ISD::isConstantSplatVector(V.getOperand(1).getNode(), C) && C == Limit)
39937 return V.getOperand(0);
40119 auto LHS = In.getOperand(0);
40120 auto RHS = In.getOperand(1);
40128 Operands[0] = LHS.getOperand(0);
40129 Operands[1] = LHS.getOperand(1);
40140 Operands[0].getOperand(0).getValueType() == VT) {
40147 { Operands[0].getOperand(0), Operands[1] },
40155 Op0 = V.getOperand(0);
40156 Op1 = V.getOperand(1);
40161 V = V.getOperand(0);
40163 !DAG.haveNoCommonBitsSet(V.getOperand(0), V.getOperand(1)))
40163 !DAG.haveNoCommonBitsSet(V.getOperand(0), V.getOperand(1)))
40165 Op0 = V.getOperand(0);
40166 Op1 = V.getOperand(1);
40189 Operands[j].getOperand(0).getValueType() != VT)
40191 Operands[j] = Operands[j].getOperand(0);
40478 TLI.isTruncStoreLegal(Value.getOperand(0).getValueType(),
40480 return DAG.getMaskedStore(Mst->getChain(), SDLoc(N), Value.getOperand(0),
40515 StoredVal.getOperand(0).getValueType() == MVT::i8) {
40516 return DAG.getStore(St->getChain(), dl, StoredVal.getOperand(0),
40605 St->getValue().getOperand(0).getValueType() == MVT::v16i16 &&
40617 TLI.isTruncStoreLegal(StoredVal.getOperand(0).getValueType(), VT)) {
40620 dl, StoredVal.getOperand(0), St->getBasePtr(),
40735 SDValue ExtOp0 = OldExtract.getOperand(0);
40740 BitCast, OldExtract.getOperand(1));
40787 if (!Op.getOperand(0).isUndef())
40788 N0 = Op.getOperand(0);
40789 if (!Op.getOperand(1).isUndef())
40790 N1 = Op.getOperand(1);
40797 Op.getOperand(0).getValueType().is256BitVector() &&
40798 llvm::isNullConstant(Op.getOperand(1))) {
40799 Op = Op.getOperand(0);
40955 Op.getOperand(0).getScalarValueSizeInBits() <= TruncSizeInBits)
40988 SDValue Op0 = Src.getOperand(0);
40989 SDValue Op1 = Src.getOperand(1);
41002 return TruncateArithmetic(Src.getOperand(0), Src.getOperand(1));
41002 return TruncateArithmetic(Src.getOperand(0), Src.getOperand(1));
41005 SDValue Op0 = Src.getOperand(0);
41006 SDValue Op1 = Src.getOperand(1);
41015 SDValue Op0 = Src.getOperand(0);
41016 SDValue Op1 = Src.getOperand(1);
41173 Src.getOperand(0).getOpcode() != ISD::MUL)
41191 if (!ISD::isConstantSplatVector(Src.getOperand(1).getNode(), ShiftAmt) ||
41195 SDValue LHS = Src.getOperand(0).getOperand(0);
41195 SDValue LHS = Src.getOperand(0).getOperand(0);
41196 SDValue RHS = Src.getOperand(0).getOperand(1);
41196 SDValue RHS = Src.getOperand(0).getOperand(1);
41204 LHS = LHS.getOperand(0);
41205 RHS = RHS.getOperand(0);
41240 SDValue N0 = SSatVal.getOperand(0);
41241 SDValue N1 = SSatVal.getOperand(1);
41246 SDValue N00 = N0.getOperand(0);
41247 SDValue N01 = N0.getOperand(1);
41248 SDValue N10 = N1.getOperand(0);
41249 SDValue N11 = N1.getOperand(1);
41266 N00 = N00.getOperand(0);
41267 N01 = N01.getOperand(0);
41268 N10 = N10.getOperand(0);
41269 N11 = N11.getOperand(0);
41295 SDValue N00Elt = N00.getOperand(i);
41296 SDValue N01Elt = N01.getOperand(i);
41297 SDValue N10Elt = N10.getOperand(i);
41298 SDValue N11Elt = N11.getOperand(i);
41305 auto *ConstN00Elt = dyn_cast<ConstantSDNode>(N00Elt.getOperand(1));
41306 auto *ConstN01Elt = dyn_cast<ConstantSDNode>(N01Elt.getOperand(1));
41307 auto *ConstN10Elt = dyn_cast<ConstantSDNode>(N10Elt.getOperand(1));
41308 auto *ConstN11Elt = dyn_cast<ConstantSDNode>(N11Elt.getOperand(1));
41324 SDValue N00In = N00Elt.getOperand(0);
41325 SDValue N01In = N01Elt.getOperand(0);
41326 SDValue N10In = N10Elt.getOperand(0);
41327 SDValue N11In = N11Elt.getOperand(0);
41383 SDValue BCSrc = Src.getOperand(0);
41448 SDValue InsVector = Op.getOperand(0);
41449 SDValue InsVal = Op.getOperand(1);
41455 NegInsVal, Op.getOperand(2));
41462 SDValue Op1 = Op.getOperand(1);
41463 SDValue Op0 = Op.getOperand(0);
41562 SDValue NewNode = DAG.getNode(X86ISD::FNMSUB, DL, VT, Arg.getOperand(0),
41563 Arg.getOperand(1), Zero);
41621 char V = isNegatibleForFree(Op.getOperand(i), DAG, LegalOperations,
41662 char V = isNegatibleForFree(Op.getOperand(i), DAG, LegalOperations,
41665 NewOps[i] = getNegatedExpression(Op.getOperand(i), DAG, LegalOperations,
41677 NewOps[i] = Op.getOperand(i);
41831 if (N0.getOpcode() == X86ISD::FXOR && isAllOnesConstantFP(N0.getOperand(1)))
41832 return DAG.getNode(X86ISD::FANDN, DL, VT, N0.getOperand(0), N1);
41835 if (N1.getOpcode() == X86ISD::FXOR && isAllOnesConstantFP(N1.getOperand(1)))
41836 return DAG.getNode(X86ISD::FANDN, DL, VT, N1.getOperand(0), N0);
42115 N0 = N0.getOperand(0);
42122 SDValue CMovOp0 = N0.getOperand(0);
42123 SDValue CMovOp1 = N0.getOperand(1);
42151 N0.getOperand(2), N0.getOperand(3));
42151 N0.getOperand(2), N0.getOperand(3));
42179 SDValue N00 = N0.getOperand(0);
42228 auto *AddOp1 = dyn_cast<ConstantSDNode>(Add.getOperand(1));
42249 SDValue AddOp0 = Add.getOperand(0);
42283 SDValue CMovOp0 = CMovN.getOperand(0);
42284 SDValue CMovOp1 = CMovN.getOperand(1);
42309 CMovN.getOperand(2), CMovN.getOperand(3));
42309 CMovN.getOperand(2), CMovN.getOperand(3));
42348 SDValue N00 = N0.getOperand(0);
42349 EVT SclVT = N0.getOperand(0).getValueType();
42432 ISD::CondCode CC = cast<CondCodeSDNode>(N0.getOperand(2))->get();
42437 EVT N00VT = N0.getOperand(0).getValueType();
42442 SDValue Res = DAG.getSetCC(dl, VT, N0.getOperand(0), N0.getOperand(1), CC);
42442 SDValue Res = DAG.getSetCC(dl, VT, N0.getOperand(0), N0.getOperand(1), CC);
42468 isAllOnesConstant(N0.getOperand(1)) && N0.hasOneUse()) {
42473 SDValue Zext = DAG.getNode(ISD::ZERO_EXTEND, DL, VT, N0.getOperand(0));
42519 isNullConstant(V.getOperand(1))) {
42520 SDValue Vec = V.getOperand(0);
42525 NegVal, V.getOperand(1));
42587 N0.getOperand(0).hasOneUse()) {
42588 SDValue N00 = N0.getOperand(0);
42590 if (!isOneConstant(N0.getOperand(1)))
42594 N00.getOperand(0), N00.getOperand(1)),
42594 N00.getOperand(0), N00.getOperand(1)),
42601 N0.getOperand(0).hasOneUse()) {
42602 SDValue N00 = N0.getOperand(0);
42606 N00.getOperand(0), N00.getOperand(1)),
42606 N00.getOperand(0), N00.getOperand(1)),
42633 VT.getScalarSizeInBits() == N0.getOperand(0).getScalarValueSizeInBits()) {
42634 SDValue N00 = N0.getOperand(0);
42635 SDValue N01 = N0.getOperand(1);
42668 X.getOperand(0).getOpcode() == ISD::XOR &&
42669 X.getOperand(1).getOpcode() == ISD::XOR;
42728 SDValue OrigX = X.getOperand(0);
42758 SDValue A = ScalarToVector(X.getOperand(0).getOperand(0));
42758 SDValue A = ScalarToVector(X.getOperand(0).getOperand(0));
42759 SDValue B = ScalarToVector(X.getOperand(0).getOperand(1));
42759 SDValue B = ScalarToVector(X.getOperand(0).getOperand(1));
42760 SDValue C = ScalarToVector(X.getOperand(1).getOperand(0));
42760 SDValue C = ScalarToVector(X.getOperand(1).getOperand(0));
42761 SDValue D = ScalarToVector(X.getOperand(1).getOperand(1));
42761 SDValue D = ScalarToVector(X.getOperand(1).getOperand(1));
42827 if (LHS.getOpcode() == ISD::SUB && isNullConstant(LHS.getOperand(0)) &&
42829 SDValue Add = DAG.getNode(ISD::ADD, DL, OpVT, RHS, LHS.getOperand(1));
42834 if (RHS.getOpcode() == ISD::SUB && isNullConstant(RHS.getOperand(0)) &&
42836 SDValue Add = DAG.getNode(ISD::ADD, DL, OpVT, LHS, RHS.getOperand(1));
42854 (LHS.getOperand(0).getValueType().getVectorElementType() == MVT::i1);
42858 assert(VT == LHS.getOperand(0).getValueType() &&
42865 return DAG.getNOT(DL, LHS.getOperand(0), VT);
42869 return LHS.getOperand(0);
42910 if (!Src.getOperand(Idx).isUndef() &&
42920 Src.getOperand(0).getScalarValueSizeInBits() == EltWidth)
42921 return DAG.getNode(X86ISD::MOVMSK, SDLoc(N), VT, Src.getOperand(0));
43007 Index.getOperand(0).getScalarValueSizeInBits() <= 32 &&
43124 if (auto *BV = dyn_cast<BuildVectorSDNode>(N->getOperand(0).getOperand(1))) {
43157 SDValue ExtElt = Trunc.getOperand(0);
43159 !isNullConstant(ExtElt.getOperand(1)))
43170 EVT SrcVecVT = ExtElt.getOperand(0).getValueType();
43174 SDValue BitcastVec = DAG.getBitcast(BitcastVT, ExtElt.getOperand(0));
43177 BitcastVec, ExtElt.getOperand(1));
43372 Op.hasOneUse() && isa<ConstantSDNode>(Op.getOperand(1)) &&
43382 Op = DAG.getNode(ISD::AND, dl, VT, Op.getOperand(0),
43394 Op = Op.getOperand(0);
43406 if (isa<ConstantSDNode>(Op.getOperand(1)))
43427 SDValue Op0 = DAG.getNode(ISD::TRUNCATE, dl, VT, Op.getOperand(0));
43428 SDValue Op1 = DAG.getNode(ISD::TRUNCATE, dl, VT, Op.getOperand(1));
43492 return DAG.getNode(X86ISD::SBB, SDLoc(N), N->getVTList(), Op0.getOperand(0),
43493 Op0.getOperand(1), N->getOperand(2));
43549 Y = Y.getOperand(0);
43578 Y.getOperand(1));
43586 !isa<ConstantSDNode>(EFLAGS.getOperand(1))) {
43592 EFLAGS.getOperand(1), EFLAGS.getOperand(0));
43592 EFLAGS.getOperand(1), EFLAGS.getOperand(0));
43606 DAG.getConstant(0, DL, VT), Y.getOperand(1));
43619 !isa<ConstantSDNode>(EFLAGS.getOperand(1))) {
43622 EFLAGS.getOperand(1), EFLAGS.getOperand(0));
43622 EFLAGS.getOperand(1), EFLAGS.getOperand(0));
43633 SDValue Cmp = Y.getOperand(1);
43635 !X86::isZeroNode(Cmp.getOperand(1)) ||
43636 !Cmp.getOperand(0).getValueType().isInteger())
43639 SDValue Z = Cmp.getOperand(0);
43711 (Op->isOnlyUserOf(Op.getOperand(0).getNode()) &&
43712 Op->isOnlyUserOf(Op.getOperand(1).getNode())));
43934 { Mul.getOperand(0), Mul.getOperand(1) },
43934 { Mul.getOperand(0), Mul.getOperand(1) },
43955 SDValue N00 = N0.getOperand(0);
43956 SDValue N01 = N0.getOperand(1);
43957 SDValue N10 = N1.getOperand(0);
43958 SDValue N11 = N1.getOperand(1);
43969 N00 = N00.getOperand(0);
43970 N01 = N01.getOperand(0);
43971 N10 = N10.getOperand(0);
43972 N11 = N11.getOperand(0);
43995 SDValue N00Elt = N00.getOperand(i);
43996 SDValue N01Elt = N01.getOperand(i);
43997 SDValue N10Elt = N10.getOperand(i);
43998 SDValue N11Elt = N11.getOperand(i);
44005 auto *ConstN00Elt = dyn_cast<ConstantSDNode>(N00Elt.getOperand(1));
44006 auto *ConstN01Elt = dyn_cast<ConstantSDNode>(N01Elt.getOperand(1));
44007 auto *ConstN10Elt = dyn_cast<ConstantSDNode>(N10Elt.getOperand(1));
44008 auto *ConstN11Elt = dyn_cast<ConstantSDNode>(N11Elt.getOperand(1));
44024 SDValue N00In = N00Elt.getOperand(0);
44025 SDValue N01In = N01Elt.getOperand(0);
44026 SDValue N10In = N10Elt.getOperand(0);
44027 SDValue N11In = N11Elt.getOperand(0);
44099 Op0.getOperand(0).getValueType().getVectorElementType() == MVT::i1 &&
44100 TLI.isTypeLegal(Op0.getOperand(0).getValueType())) {
44102 SDValue SExt = DAG.getNode(ISD::SIGN_EXTEND, DL, VT, Op0.getOperand(0));
44107 Op1.getOperand(0).getValueType().getVectorElementType() == MVT::i1 &&
44108 TLI.isTypeLegal(Op1.getOperand(0).getValueType())) {
44110 SDValue SExt = DAG.getNode(ISD::SIGN_EXTEND, DL, VT, Op1.getOperand(0));
44141 SDValue MaxLHS = Op0.getOperand(0);
44142 SDValue MaxRHS = Op0.getOperand(1);
44151 SDValue MinLHS = Op1.getOperand(0);
44152 SDValue MinRHS = Op1.getOperand(1);
44218 isa<ConstantSDNode>(Op1.getOperand(1))) {
44222 Op1.getOperand(0),
44304 return DAG.getNode(Op0.getOpcode(), DL, VT, Op0.getOperand(0));
44308 (Subtarget.hasAVX2() || MayFoldLoad(Op0.getOperand(0))))
44311 Op0.getOperand(0),
44317 (VT.getScalarSizeInBits() >= 32 && MayFoldLoad(Op0.getOperand(0)))) &&
44318 Op0.getOperand(0).getValueType() == VT.getScalarType())
44319 return DAG.getNode(X86ISD::VBROADCAST, DL, VT, Op0.getOperand(0));
44336 Subtarget.hasInt256() && Op0.getOperand(1) == Ops[1].getOperand(1)) {
44336 Subtarget.hasInt256() && Op0.getOperand(1) == Ops[1].getOperand(1)) {
44339 Src.push_back(Ops[i].getOperand(0));
44342 Op0.getOperand(1));
44348 Subtarget.hasAVX() && Op0.getOperand(1) == Ops[1].getOperand(1)) {
44348 Subtarget.hasAVX() && Op0.getOperand(1) == Ops[1].getOperand(1)) {
44351 Src.push_back(DAG.getBitcast(MVT::v4f32, Ops[i].getOperand(0)));
44354 Op0.getOperand(1));
44362 LHS.push_back(Ops[i].getOperand(0));
44363 RHS.push_back(Ops[i].getOperand(1));
44365 MVT SrcVT = Op0.getOperand(0).getSimpleValueType();
44429 ISD::isBuildVectorAllZeros(SubVec.getOperand(0).getNode())) {
44433 SubVec.getOperand(1),
44442 isNullConstant(SubVec.getOperand(1)) &&
44443 SubVec.getOperand(0).getOpcode() == ISD::INSERT_SUBVECTOR) {
44444 SDValue Ins = SubVec.getOperand(0);
44445 if (isNullConstant(Ins.getOperand(2)) &&
44446 ISD::isBuildVectorAllZeros(Ins.getOperand(0).getNode()) &&
44447 Ins.getOperand(1).getValueSizeInBits() <= SubVecVT.getSizeInBits())
44450 Ins.getOperand(1), N->getOperand(2));
44461 SubVec.getOperand(0).getSimpleValueType() == OpVT &&
44475 return DAG.getVectorShuffle(OpVT, dl, Vec, SubVec.getOperand(0), Mask);
44500 return DAG.getNode(X86ISD::VBROADCAST, dl, OpVT, SubVec.getOperand(0));
44530 !collectConcatOps(Sel.getOperand(0).getNode(), CatOps))
44540 MVT SelCondVT = Sel.getOperand(0).getSimpleValueType();
44571 SDValue ExtCond = extract128BitVector(Sel.getOperand(0), ExtIdx, DAG, DL);
44572 SDValue ExtT = extract128BitVector(Sel.getOperand(1), ExtIdx, DAG, DL);
44573 SDValue ExtF = extract128BitVector(Sel.getOperand(2), ExtIdx, DAG, DL);
44611 if (isConcatenatedNot(InVecBC.getOperand(0)) ||
44612 isConcatenatedNot(InVecBC.getOperand(1))) {
44672 InVec.hasOneUse() && isNullConstant(InVec.getOperand(2)) &&
44673 ISD::isBuildVectorAllZeros(InVec.getOperand(0).getNode()) &&
44674 InVec.getOperand(1).getValueSizeInBits() <= VT.getSizeInBits()) {
44678 InVec.getOperand(1), InVec.getOperand(2));
44678 InVec.getOperand(1), InVec.getOperand(2));
44685 InVec.getOperand(0).getValueSizeInBits() <= VT.getSizeInBits())
44686 return DAG.getNode(X86ISD::VBROADCAST, SDLoc(N), VT, InVec.getOperand(0));
44709 InVec.getOperand(0).getValueType() == MVT::v4i32) {
44710 return DAG.getNode(X86ISD::CVTSI2P, SDLoc(N), VT, InVec.getOperand(0));
44714 InVec.getOperand(0).getValueType() == MVT::v4i32) {
44715 return DAG.getNode(X86ISD::CVTUI2P, SDLoc(N), VT, InVec.getOperand(0));
44719 InVec.getOperand(0).getValueType() == MVT::v4f32) {
44720 return DAG.getNode(X86ISD::VFPEXT, SDLoc(N), VT, InVec.getOperand(0));
44730 InVec.getOperand(0).getSimpleValueType().is128BitVector()) {
44732 return DAG.getNode(ExtOp, SDLoc(N), VT, InVec.getOperand(0));
44735 InVec.getOperand(0).getValueType().is256BitVector() &&
44736 InVec.getOperand(1).getValueType().is256BitVector() &&
44737 InVec.getOperand(2).getValueType().is256BitVector()) {
44739 SDValue Ext0 = extractSubVector(InVec.getOperand(0), 0, DAG, DL, 128);
44740 SDValue Ext1 = extractSubVector(InVec.getOperand(1), 0, DAG, DL, 128);
44741 SDValue Ext2 = extractSubVector(InVec.getOperand(2), 0, DAG, DL, 128);
44759 if (auto *C = dyn_cast<ConstantSDNode>(Src.getOperand(1)))
44762 Src.getOperand(0));
44766 Src.hasOneUse() && Src.getOperand(0).getValueType().isVector() &&
44767 Src.getOperand(0).getValueType().getVectorElementType() == MVT::i1)
44768 if (auto *C = dyn_cast<ConstantSDNode>(Src.getOperand(1)))
44770 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, VT, Src.getOperand(0),
44771 Src.getOperand(1));
44777 Src.getOperand(0).getScalarValueSizeInBits() <= 32)
44780 DAG.getAnyExtOrTrunc(Src.getOperand(0), DL, MVT::i32)));
44817 LHS.getOperand(0).getValueType() == MVT::v4i32) {
44819 LHS = DAG.getVectorShuffle(MVT::v4i32, dl, LHS.getOperand(0),
44820 LHS.getOperand(0), { 0, -1, 1, -1 });
44827 RHS.getOperand(0).getValueType() == MVT::v4i32) {
44829 RHS = DAG.getVectorShuffle(MVT::v4i32, dl, RHS.getOperand(0),
44830 RHS.getOperand(0), { 0, -1, 1, -1 });
45104 isa<ConstantSDNode>(Op.getOperand(1));
45147 SDValue N0 = Op.getOperand(0);
45161 SDValue N0 = Op.getOperand(0);
45162 SDValue N1 = Op.getOperand(1);
lib/Target/XCore/XCoreISelDAGToDAG.cpp 96 if ((FIN = dyn_cast<FrameIndexSDNode>(Addr.getOperand(0)))
97 && (CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1)))
127 OutOps.push_back(Op.getOperand(0));
lib/Target/XCore/XCoreISelLowering.cpp 345 SDValue Chain = Op.getOperand(0);
346 SDValue Table = Op.getOperand(1);
347 SDValue Index = Op.getOperand(2);
544 SDValue LHS = Op.getOperand(0);
545 SDValue RHS = Op.getOperand(1);
561 SDValue LHS = Op.getOperand(0);
562 SDValue RHS = Op.getOperand(1);
583 SDValue N0 = Op.getOperand(0);
584 SDValue N1 = Op.getOperand(1);
602 Mul0 = OtherOp.getOperand(0);
603 Mul1 = OtherOp.getOperand(1);
604 Addend0 = AddOp.getOperand(0);
605 Addend1 = AddOp.getOperand(1);
608 if (AddOp.getOperand(0).getOpcode() == ISD::MUL) {
610 if (requireIntermediatesHaveOneUse && !AddOp.getOperand(0).hasOneUse())
612 Mul0 = AddOp.getOperand(0).getOperand(0);
612 Mul0 = AddOp.getOperand(0).getOperand(0);
613 Mul1 = AddOp.getOperand(0).getOperand(1);
613 Mul1 = AddOp.getOperand(0).getOperand(1);
614 Addend0 = AddOp.getOperand(1);
618 if (AddOp.getOperand(1).getOpcode() == ISD::MUL) {
620 if (requireIntermediatesHaveOneUse && !AddOp.getOperand(1).hasOneUse())
622 Mul0 = AddOp.getOperand(1).getOperand(0);
622 Mul0 = AddOp.getOperand(1).getOperand(0);
623 Mul1 = AddOp.getOperand(1).getOperand(1);
623 Mul1 = AddOp.getOperand(1).getOperand(1);
624 Addend0 = AddOp.getOperand(0);
648 Mul.getOperand(0), DAG.getConstant(0, dl, MVT::i32));
650 Mul.getOperand(1), DAG.getConstant(0, dl, MVT::i32));
656 unsigned LHSSB = DAG.ComputeNumSignBits(Mul.getOperand(0));
657 unsigned RHSSB = DAG.ComputeNumSignBits(Mul.getOperand(1));
658 if (DAG.MaskedValueIsZero(Mul.getOperand(0), HighMask) &&
659 DAG.MaskedValueIsZero(Mul.getOperand(1), HighMask)) {
677 Mul.getOperand(0), DAG.getConstant(1, dl, MVT::i32));
679 Mul.getOperand(1), DAG.getConstant(1, dl, MVT::i32));
767 return DAG.getStore(Op.getOperand(0), dl, Addr, Op.getOperand(1),
767 return DAG.getStore(Op.getOperand(0), dl, Addr, Op.getOperand(1),
778 if (cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue() > 0)
794 if (cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue() > 0)
822 SDValue Chain = Op.getOperand(0);
823 SDValue Offset = Op.getOperand(1);
824 SDValue Handler = Op.getOperand(2);
856 return Op.getOperand(0);
861 SDValue Chain = Op.getOperand(0);
862 SDValue Trmp = Op.getOperand(1); // trampoline
863 SDValue FPtr = Op.getOperand(2); // nested function
864 SDValue Nest = Op.getOperand(3); // 'nest' parameter value
866 const Value *TrmpAddr = cast<SrcValueSDNode>(Op.getOperand(4))->getValue();
916 unsigned IntNo = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
922 Op.getOperand(1), Op.getOperand(2) , Op.getOperand(3));
922 Op.getOperand(1), Op.getOperand(2) , Op.getOperand(3));
922 Op.getOperand(1), Op.getOperand(2) , Op.getOperand(3));
933 return DAG.getNode(XCoreISD::MEMBARRIER, DL, MVT::Other, Op.getOperand(0));
1833 unsigned IntNo = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();